DETAILED ACTION
1. This action is in response to the application filed on 2/4/25.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
4. Claims 1-5, 7-13 and 17-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Qianming Xu (Analysis and Control of M3C-Based UPQC for Power Quality Improvement in Medium/High-Voltage Power Grid. Cited in the IDS filed on 2/4/25).
Regarding claim 1: Xu discloses an electrical power system (i.e. figs. 2-3 and 7) comprising:
a first electrical sub-system (i.e. system for Us) having a first voltage (i.e. Us);
a second electrical sub-system (i.e. system for load) having a second voltage (i.e. voltage for load);
a power converter (i.e. power converter of figs. 2-3 and/or rectifier) connected between the first electrical sub-system (i.e. system for Us) and the second electrical sub-system (i.e. system for load) and configured to convert between the first voltage (i.e. Us) and the second voltage (i.e. voltage for load);
an impedance synthesizer (i.e. M3C-UPQC) connected in an intermediate circuit (i.e. circuit of figure 7 connected to M3C-UPQC) that connects the power converter (i.e. power converter of figs. 2-3 and/or rectifier) to the first electrical sub-system (i.e. system for Us), the impedance synthesizer (i.e. circuit of figure 7 connected to M3C-UPQC) comprising an active bridge circuit (i.e. see figure 1 of M3C-UPQC); and
a control system (i.e. controller for M3C-UPQC) configured to control a switching operation of a plurality of power semiconductor switches (i.e. switches of M3C-UPQC) of the active bridge circuit (i.e. see figure 1 of M3C-UPQC) to control an output voltage (Vogt) (i.e. output voltage of M3C-UPQC) of the impedance synthesizer (i.e. M3C-UPQC), whereby the impedance synthesizer emulates a Differential-Mode filter or a Common-Mode filter (i.e. See equations 23-25. Subsection IV and A. External compensation control section. Pages 8188-8191).
Regarding claim 2: (i.e. figs. 2-3 and 7) wherein the control system is further configured to: receive (i.e. by the controller of figure 6) an indication of a current (i.e. current from M3C-UPQC) at an input terminal of the impedance synthesizer (i.e. M3C-UPQC); determine, based on the current and an impedance for emulating the Differential-Mode filter or Common-Mode filter (i.e. See equations 23-25. Subsection IV and A. External compensation control section. Pages 8188-8191), an output voltage (Vout) (i.e. voltage to the controller of figure 6) for emulating the impedance (i.e. M3C-UPQC); and control the switching operation of the plurality of power semiconductor switches (i.e. see figure 1 of M3C-UPQC) of the impedance synthesizer according to the output voltage (Vout) (i.e. voltage to the controller of figure 6).
Regarding claim 3: (i.e. figs. 2-3 and 7) further comprising one or more sensors (i.e. current sensor to measure current from M3C-UPQC) for measuring the current at the input terminal of the impedance synthesizer (i.e. M3C-UPQC).
Regarding claim 4: (i.e. figs. 2-3 and 7) wherein the control system is further configured to: monitor one or more operating parameters (i.e. parameter in figure 6) of the electrical power system; and in response to determining a change in one or more of the operating parameters, change the switching operation of the plurality of power semiconductor switches (i.e. see figure 1 of M3C-UPQC) so that the impedance synthesizer emulates a Differential-Mode filter or a Common-Mode filter having a different impedance (i.e. See equations 23-25. Subsection IV and A. External compensation control section. Pages 8188-8191).
Regarding claim 5: (i.e. figs. 2-3 and 7) wherein changing the switching operation of the plurality of power semiconductor switches (i.e. see figure 1 of M3C-UPQC) changes a frequency response (i.e. frequency of equation 9, page 8185 section III) of the Differential-Mode filter or Common-Mode filter emulated by the impedance synthesizer (i.e. See equations 23-25. Subsection IV and A. External compensation control section. Pages 8188-8191).
Regarding claim 7: (i.e. figs. 2-3 and 7) wherein: the impedance synthesizer comprises a plurality of parallel-connected active bridge circuits (i.e. see figure 2C), each of the plurality of active bridge circuits comprising a plurality of power semiconductor switches (i.e. switches of figure 2c); and the control system (i.e. controller for M3C-UPQC) is configured to control a switching operation of the plurality of power semiconductor switches(i.e. switches of M3C-UPQC) of each of the plurality of active bridge circuits and thereby control the output voltage (Vogt) (i.e. voltage output from M3C-UPQC) of the impedance synthesizer (i.e. M3C-UPQC).
Regarding claim 8: (i.e. figs. 2-3 and 7) wherein the control system is configured to time-interleave the switching operation (i.e. CPS-PWM) of the plurality parallel-connected of active bridge circuits of the impedance synthesizer (i.e. Section V. Experimental varication).
Regarding claim 9: (i.e. figs. 2-3 and 7) wherein: the plurality of parallel-connected active bridge circuits of the impedance synthesizer comprises P groups of Q active bridge circuits (i.e. see switches group of figure 2a connected in parallel), P and Q being integers greater than one (i.e. swiches of group P and Q); and the control system (i.e. controller for M3C-UPQC) is configured to temporally synchronize the switching operation (i.e. provide by CPS-PWM) of the Q active bridge circuits of each group and time-interleave the switching operation of the P groups (i.e. swiches of group P and Q) (i.e. Section V. Experimental varication).
Regarding claim 10: (i.e. figs. 2-3 and 7) the impedance synthesizer comprises a plurality of series-connected active bridge circuits (i.e. see figure 2C), each of the plurality of series-connected active bridge circuits comprising a plurality of power semiconductor switches (i.e. switches of figure 2C); and the control system (i.e. controller for M3C-UPQC) is configured to control a switching operation of the plurality of power semiconductor switches of each of the plurality of series-connected active bridge circuits (i.e. see figure 2C) and thereby control the output voltage (Vout) of the impedance synthesizer (i.e. M3C-UPQC) (i.e. Section V. Experimental varication).
Regarding claim 11: (i.e. figs. 2-3 and 7) wherein: the impedance synthesizer (i.e. M3C-UPQC) comprises a plurality of series-connected cells (i.e. cell of figure 3C), each cell of the plurality of series-connecting cells comprising a plurality of parallel-connected active bridge circuits (i.e. see figure 2a-c for the connection of series and parallel), each of the plurality active bridge circuits comprising a plurality of power semiconductor switches (i.e. switches of M3C-UPQC); and the control system (i.e. controller for M3C-UPQC) is configured to control a switching operation of the plurality of power semiconductor switches (i.e. switches of M3C-UPQC) of each of the plurality of active bridge circuits (i.e. see figure 2a) and thereby control the output voltage of the impedance synthesizer (i.e. M3C-UPQC).
Regarding claim 12: (i.e. figs. 2-3 and 7) comprising a plurality of impedance synthesizers (i.e. see figure 2c), each impedance synthesizer connected in one of either the intermediate circuit that connects the power converter (i.e. power converter of figs. 2-3 and/or rectifier) to the first electrical sub-system or an intermediate circuit (i.e. circuit of figure 2b) that connects the power converter to the second electrical sub-system, each impedance synthesizer (i.e. M3C-UPQC) comprising an active bridge circuit, wherein, for each respective impedance synthesizer, the control system (i.e. controller for M3C-UPQC) is configured to control a switching operation of a plurality of power semiconductor switches (i.e. switches of M3C-UPQC) of the respective active bridge circuit to control an output voltage (Vout) (i.e. output of M3C-UPQC) of the respective impedance synthesizer, whereby the respective impedance synthesizer emulates a Differential-Mode filter or a Common-Mode filter (i.e. See equations 23-25. Subsection IV and A. External compensation control section. Pages 8188-8191).
Regarding claim 13: (i.e. figs. 2-3 and 7) wherein the active bridge circuit of each of the plurality of impedance synthesizers (i.e. see figure 2C) has an identical circuit topology.
Regarding claims 17-20: the method steps will be met during the normal operation of the apparatus described above. (Examiner notes: For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Qianming Xu (Analysis and Control of M3C-Based UPQC for Power Quality Improvement in Medium/High-Voltage Power Grid. Cited in the IDS filed on 2/4/25).
Regarding claim 6: Qianming Xu discloses (i.e. figs. 2-3 and 7) wherein: the power converter is further configured to control a switching operation of the power converter (i.e. power converter of figs. 2-3 and/or rectifier); the control system (i.e. controller for M3C-UPQC) is configured to switch (i.e. switches of M3C-UPQC except for the plurality of power semiconductor switches of the impedance synthesizer at a frequency that is higher than a frequency at which it switches the power converter. It would have been obvious to one having ordinary skill in the art at the time of the invention was made to modify Qianming Xu’s invention to have the plurality of power semiconductor switches of the impedance synthesizer at a frequency that is higher than a frequency at which it switches the power converter for increasing the efficiency of the power converter, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
7. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Qianming Xu (Analysis and Control of M3C-Based UPQC for Power Quality Improvement in Medium/High-Voltage Power Grid. Cited in the IDS filed on 2/4/25) in view of Yinka Leo (Insulation Monitoring in Ungrounded Electrical System for More Electric Aircrafts. Cited in the IDS filed on 2/4/25).
Regarding claim 15: Qianming Xu disclose the limitation of the claim(s) as discussed above, but does not specifically disclose one of the first and second electrical sub-systems is an AC electrical sub-system; one of the first and second electrical sub-systems is a DC electrical sub-system; and the power converter is an AC:DC power converter.
Yinka Leo disclose (i.e. figure 1) a power supply comprising one of the first and second electrical sub-systems is an AC electrical sub-system (i.e. AC); one of the first and second electrical sub-systems is a DC electrical sub-system (i.e. DC); and the power converter is an AC:DC power converter (i.e. AC-DC power converter).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Qianming Xu’s invention with the power supply as disclose by Yinka Leo to increase the efficiency and power density of the power supply.
8. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Qianming Xu (Analysis and Control of M3C-Based UPQC for Power Quality Improvement in Medium/High-Voltage Power Grid. Cited in the IDS filed on 2/4/25) in view of Raju (US 20170279361).
Regarding claim 16: Qianming Xu disclose the limitation of the claim(s) as discussed above, but does not specifically disclose both the first and second electrical sub-systems are DC electrical sub-systems; and the power converter is a DC: DC power converter.
Raju discloses a power converter comprising both the first and second electrical sub-systems (i.e. system for V1, V2) are DC electrical sub-systems; and the power converter is a DC:DC power converter (i.e. converter of figure 3).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Qianming Xu’s invention with the power converter as disclose by Raju to increase reliability and efficiency of power converter.
Allowable Subject Matter
9. Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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/Nguyen Tran/ Primary Examiner, Art Unit 2838
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