DETAILED ACTION
Status of the Application
This office action is a non-final rejection in response to the filing of the applicant’s response to the election / restriction filed on 03/16/2026. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species B (claim 1-17) in the reply filed on 03/17/2026 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6,8-9,11-12,14-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Qiao et al US Patent (US 10,574,154 B1).
Regarding claim 1, Qiao et al discloses a modulation scheme (see SVPWM scheme, column 1, lines 40-67, Figs 1-20) for a three-phase multi-source inverter (MSI) (100) (see Figs 1-20, claims 4,11), comprising:
defining a stationary aβ plan of the three-phase voltages comprising six sectors I to VI, wherein each sector has seven existing space voltage vectors (see multiple sectors I-VI in Figs 1A-3,4A-7, column 1, lines 40-67; column 4, line 63 to column 5, line 30);
defining Vref as a three-phase reference voltage vector in the aβ plan (see Figs 1-7 and column 1, lines 55-67);
for each sector, calculating new space voltage vectors VM, Vs, and VR as linear combinations of at least two of the existing space voltage vectors (see Figs 1-7 and column 4, line 63 to column 5, line 30);
dividing each sector into nine operating regions (see Figs 1-9, column 1, lines 40-67);
determining switching signals for switching devices of the MSI (100) in each operating region in each sector using the Vref, selected new space voltage vectors, and selected existing space voltage vectors (see switching sequences in Figs 1-11 and 20, and column 1, lines 40-67, column 3, lines 44-67, column 4, line 63 to column 5, line 30, column 5, lines 31-54,
in addition, while features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997) (The absence of a disclosure in a prior art reference relating to function did not defeat the Board's finding of anticipation of claimed apparatus because the limitations at issue were found to be inherent in the prior art reference); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). "Apparatus claims cover what a device is, not what a device does." Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990) (emphasis in original). (see MPEP 2114).
Furthermore, it has been held that a claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim. Exparte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). (See MPEP 2114)).
Regarding claim 2, Qiao et al discloses the modulation scheme of claim 1, wherein the generating switching signals comprises using four selected existing space voltage vectors (see multiples vectors in Figs 1A-3,4A-7 and column 6, lines 6-67).
Regarding claim 3, Qiao et al discloses the modulation scheme of claim 2, wherein the four selected existing space voltage vectors include V3-V6 (see multiples vectors in Figs 1A-3,4A-7 and column 6, lines 6-67).
Regarding claim 4, Qiao et al discloses the modulation scheme of claim 1, comprising: calculating the new space voltage vectors for one sector selected from sectors I to VI (see Figs 1-9 and column 7, line 60 to column 8, line 63 disclosing the calculation of the duty cycles for the nearest three vectors);
determining corresponding new space voltage vectors in other sectors by interchanging the new space voltage vectors determined for the selected sector (see Figs 1-9 and column 7, line 60 to column 8, line 63).
Regarding claim 5, Qiao et al discloses a non-transitory computer readable media compatible with a processor (106) (see Figs 1-20, column 5, line 33-53), the non-transitory computer readable media storing an algorithm that directs the processor (106) to implement a space vector modulation (SVM) scheme (see SVPWM scheme, column 1, lines 40-67, Figs 1-20) for an MSI (see Figs 1-20, claims 4,11);
wherein the SVM scheme comprises:
defining a stationary aβ plan of the three-phase voltages comprising six sectors I to VI, wherein each sector has seven existing space voltage vectors (see multiple sectors I-VI in Figs 1A-3,4A-7, column 1, lines 40-67; column 4, line 63 to column 5, line 30);
defining Vref as a three-phase reference voltage vector in the aβ plan (see Figs 1-7 and column 1, lines 55-67);
for each sector, calculating new space voltage vectors VM, Vs, and VRas linear combinations of at least two of the existing space voltage vectors (see Figs 1-7 and column 4, line 63 to column 5, line 30);
dividing each sector into nine operating regions (see Figs 1-9, column 1, lines 40-67);
determining switching signals for switching devices of the MSI in each operating region in each sector using the Vref, selected new space voltage vectors, and selected existing space voltage vectors (see switching sequences in Figs 1-11 and 20, and column 1, lines 40-67, column 3, lines 44-67, column 4, line 63 to column 5, line 30, column 5, lines 31-54).
Regarding claim 6, Qiao et al discloses a controller (106) for a three-phase MSI, comprising:
a processor (108) that executes an algorithm that implements the modulation scheme of claim 1 (see Figs 1-20, column 5, line 33-53); and
an output circuit that outputs the switching signals to switches of the MSI according to the modulation scheme (see output circuits in Figs 1-20 and column 5, line 33-53, column 11, line 54 to column 12, line 8).
Regarding claim 8 Qiao et al discloses a three-phase multi-source inverter (MSI) (100) comprising the controller (106) of claim 6 (see Figs 1-20, column 5, line 33-53).
Regarding claim 9, Qiao et al discloses a three-phase multi-source inverter (100) (MSI) (see Figs 1-20), comprising:
a first switch (104A) having an input terminal adapted to receive a positive side of a first DC source (VDC1) (102A) (see Figs 1-20, specifically Fig 14 and 20, column 5, lines 33-55, column 12, line 19-66, in addition, it has been held that the recitation that an element is “adapted to” perform a function is not a positive limitation but only requires the ability to so perform. It does not constitute a limitation in any patentable sense. In re Hutchison, 69 USPQ 138);
a second switch (104B) having an input terminal adapted to receive a negative side of the first DC source (VDC1) (102A) and a negative side of a second DC source (VDC2) (102B, 102C) (see Figs 1-20, specifically Fig 14 and 20, column 5,lines 33-55, column 12, line 19-66, in addition, it has been held that the recitation that an element is “adapted to” perform a function is not a positive limitation but only requires the ability to so perform. It does not constitute a limitation in any patentable sense. In re Hutchison, 69 USPQ 138);
an output of the first switch connected to inputs of third, fifth, seventh, and nineth switches; the third switch having an output terminal adapted to receive a positive side of the second DC source (VDC2) (102B, 102C) and connected to an input of a fourth switch (see Figs 1-20, specifically Fig 14 and 20, column 5,lines 33-55, column 12, line 19-66, in addition, it has been held that the recitation that an element is “adapted to” perform a function is not a positive limitation but only requires the ability to so perform. It does not constitute a limitation in any patentable sense. In re Hutchison, 69 USPQ 138);
outputs of the fifth, seventh, and nineth switches connected to inputs of sixth, eighth, and tenth switches and to output nodes corresponding to respective MSI three-phase output currents ia, ib, and ic; outputs of the second, fourth, sixth, eighth, and tenth switches connected together (see switching structure in Figs 1-20, specifically Fig 14 and 20).
Regarding claim 11, Qiao et al discloses the three-phase MSI of claim 9, wherein the first DC source (102A) comprises a high voltage source (power storage/generation devices) and the second DC source comprises a low voltage source (102B) (battery pack) (see Fig 14 and column 5, lines 33-54; column 12, lines 7-47).
Regarding claim 12, Qiao et al discloses the three-phase MSI of claim 9, wherein the first DC source (102A) comprises a high voltage source (power storage/generation devices) and the second DC source (102B) comprises a battery (battery pack), a super capacitor, or an ultra capacitor (see Fig 14 and column 5, lines 33-54; column 12, lines 7-47).
Regarding claim 14, Qiao et al discloses the three-phase MSI of claim 9, comprising a controller (106) (see Fig 14, column 5, line 33-53).
Regarding claim 15, Qiao et al discloses the three-phase MSI of claim 14, wherein the controller (106) controls switches of the MSI (100) according to a space vector modulation (SVM) scheme (see SVPWM scheme, column 1, lines 40-67, Figs 1-20).
Regarding claim 16, Qiao et al discloses the three-phase MSI of claim 15, wherein the SVM scheme (see SVPWM scheme, column 1, lines 40-67, Figs 1-20) comprises:
defining a stationary aβ plan of the three-phase voltages comprising six sectors I to VI, wherein each sector has seven existing space voltage vectors (see multiple sectors I-VI in Figs 1A-3,4A-7, column 1, lines 40-67; column 4, line 63 to column 5, line 30);
defining Vref as a three-phase reference voltage vector in the aβ plan (see Figs 1-7 and column 1, lines 55-67);
for each sector, calculating new space voltage vectors VM, Vs, and VR as linear combinations of at least two of the existing space voltage vectors (see Figs 1-7 and column 4, line 63 to column 5, line 30);
dividing each sector into nine operating regions (see Figs 1-9, column 1, lines 40-67);
determining switching signals for switching devices of the MSI (100) in each operating region in each sector using the Vref, selected new space voltage vectors, and selected existing space voltage vectors (see switching sequences in Figs 1-11 and 20, and column 1, lines 40-67, column 3, lines 44-67, column 4, line 63 to column 5, line 30, column 5, lines 31-54).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 7,13 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Qiao et al US Patent (US 10,574,154 B1) in view of Mao et al US Patent Application Publication (US 2012/0147639 A1).
Regarding claim 7, Qiao et al discloses the controller of claim 6;
Qiao et al does not clearly the controller of claim 6 implemented in an electric vehicle;
However, Mao et al is an analogous art pertinent to the problem to be solved in this application in which discloses Systems and methods for controlling a modular three-phase converter including two or more interleaved, parallel connected Voltage Source Converters (VSCs) utilizing a hybrid Space Vector Pulse Width Modulation (SVM) control scheme are provided. For the hybrid SVM control scheme, six active vectors utilized for SVM define six sectors in a space vector plane. Each sector is divided into two or more regions having corresponding optimal SVM switching sequences. In operation, a revolving reference voltage vector is sampled to provide a reference voltage vector. The SVM controller then identifies one of the regions in one of the sectors that corresponds to an angle and, in some embodiments, a magnitude of the revolving reference voltage vector and applies the corresponding optimal SVM switching sequence to the two or more interleaved, parallel connected VSCs and further discloses the use of the controller implemented in an electric vehicle (see Figs 1-28 and par. [0095]);
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Qiao et al with the teaching of Mao et al by including the use of the controller implemented in an electric vehicle in order to provide a hybrid SVM control schemes in electric (plug-in) vehicles, this provides improved efficiency and stable operation.
Regarding claims 13 and 17, Qiao et al discloses the three-phase MSI of claim 9 and 16, respectively;
Qiao et al does not clearly discloses the three-phase MSI configured for use in an electric vehicle;
However, Mao et al is an analogous art pertinent to the problem to be solved in this application in which discloses Systems and methods for controlling a modular three-phase converter including two or more interleaved, parallel connected Voltage Source Converters (VSCs) utilizing a hybrid Space Vector Pulse Width Modulation (SVM) control scheme are provided. For the hybrid SVM control scheme, six active vectors utilized for SVM define six sectors in a space vector plane. Each sector is divided into two or more regions having corresponding optimal SVM switching sequences. In operation, a revolving reference voltage vector is sampled to provide a reference voltage vector. The SVM controller then identifies one of the regions in one of the sectors that corresponds to an angle and, in some embodiments, a magnitude of the revolving reference voltage vector and applies the corresponding optimal SVM switching sequence to the two or more interleaved, parallel connected VSCs and further discloses the use of the three-phase MSI configured for use in an electric vehicle (see Figs 1-28 and par. [0095]);
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Qiao et al with the teaching of Mao et al by including the three-phase MSI configured for use in an electric vehicle in order to provide a hybrid SVM control schemes in electric (plug-in) vehicles, this provides improved efficiency and stable operation.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Qiao et al US Patent (US 10,574,154 B1) in view of Song et al US Patent Application Publication (US 2021/0057978 A1).
Regarding claim 10, Qiao et al discloses the three-phase MSI of claim 9;
Qiao et al does not clearly discloses further comprising at least one DC-DC converter that provides the first DC source or the second DC source.
However, Song et al is an analogous art pertinent to the problem to be solved in this application in which discloses an automotive power converter with rail-powered clamping circuitry (see Figs 1-5) and further discloses an electric drive system (10) for a vehicle (12) including at least one DC-DC converter (16) that provides the first DC source (14) or the second DC source (28) (see Fig 1; par. [0014]-[0016]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Qiao et al with the teaching of Song et al by including further comprising at least one DC-DC converter that provides the first DC source or the second DC source in order to provide a stable output voltage. This stability is crucial for sensitive electronic devices that require consistent power levels for optimal performance.
Examiner Note
8. The examiner cites particular columns and lines numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Conclusion
9. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please see the cited prior art in the PTO-892 form attached.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFONSO PEREZ BORROTO whose telephone number is (571) 270-1714. The examiner can normally be reached on M-F (9am-4pm).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached on (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Primary Examiner, Art Unit 2836
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