Prosecution Insights
Last updated: October 27, 2026
Application No. 19/046,843

USING A VOLTAGE CONTROL LOOP TO MODIFY VOLTAGES IN A PROCESSING UNIT

Non-Final OA §102§103§112
Filed
Feb 06, 2025
Examiner
CLEARY, THOMAS J
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
International Business Machines Corporation
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
551 granted / 757 resolved
+17.8% vs TC avg
Strong +16% interview lift
Without
With
+15.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
23 currently pending
Career history
784
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
34.9%
-5.1% vs TC avg
§102
22.9%
-17.1% vs TC avg
§112
27.4%
-12.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 757 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “processing unit” in Claim 1. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 Claim(s) 11 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 11 recites the limitation "the count" in Line 4. There is insufficient antecedent basis for this limitation in the claim. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “a count of the counter”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 7-12, 14-17, 19-20, and 22-24 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication Number 2024/0028095 to Webel et al. (“Webel”). In reference to Claim 1, Webel discloses a computer implemented method (See Paragraphs 44-46) for adjusting voltage (See Paragraphs 78 and 82) at a processing unit (See Figure 1 Number 220), comprising: calculating a performance degradation value for the processing unit based on instances of a mitigation measure performed when an output value of a sensor (See Figure 2 Number 224) satisfies a threshold condition (See Figure 5 Numbers 504 and 506 and Paragraphs 67-71); inputting the performance degradation value to a function to output a voltage increase, wherein the function provides different voltage increases for different performance degradation values (See Paragraphs 78-79 and 82); and increasing the voltage supplied to the processing unit by the voltage increase (See Figure 5 Number 512 and Paragraph 78). In reference to Claim 2, Webel discloses the limitations as applied to Claim 1 above. Webel further discloses determining whether the performance degradation value exceeds a degradation threshold value (See Figure 5 Number 506 and Paragraphs 67-71), wherein the inputting the performance degradation value to the function is performed in response to determining that the performance degradation value exceeds the degradation threshold value (See Paragraphs 78-79 and 82). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining that the performance degradation value exceeds the degradation threshold value” as requiring the occurrence of the determining that the performance degradation value exceeds the degradation threshold value. In reference to Claim 3, Webel discloses the limitations as applied to Claim 1 above. Webel further discloses determining whether the performance degradation value exceeds a degradation threshold value (See Figure 6 Number 606 and Paragraphs 82-83); and decreasing the voltage in response to determining that the performance degradation value is below the degradation threshold value (See Figure 6 Number 608 and Paragraph 84). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining that the performance degradation value is below the degradation threshold value” as requiring the occurrence of the determining that the performance degradation value is below the degradation threshold value. In reference to Claim 4, Webel discloses the limitations as applied to Claim 3 above. Webel further discloses that the voltage is decreased by a fixed amount (See Figure 6 Number 608 and Paragraphs 78 and 84 [voltage decreased by predetermined amount/step]). In reference to Claim 7, Webel discloses the limitations as applied to Claim 1 above. Webel further discloses determining whether to implement the voltage increase by considering factors selected from the group consisting of a temperature at the processing unit (See Paragraph 33), whether the processing unit is in a maintenance mode, whether a current voltage is within a limit (See Figure 5 Number 510 and Paragraph 77), whether the current voltage increased by the voltage increase is within the limit when the current voltage is not within the limit, whether power is within a limit (See Figure 5 Number 508 and Paragraph 74), and whether the power of other system components are within a limit (See Figure 5 Number 508 and Paragraph 74); and forwarding a command to a controller to adjust the voltage supplied in response to determining to implement the voltage increase (See Figure 2 Number 232 and Paragraphs 45 and 76). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining to implement the voltage increase” as requiring the occurrence of the determining to implement the voltage increase. In reference to Claim 8, Webel discloses a computer implemented method (See Paragraphs 44-46) for adjusting voltage (See Paragraphs 78 and 82) at a processor (See Figure 2 Number 204) having a plurality of cores (See Figure 2 Numbers 220), comprising: implementing timing protection control loops for the cores, wherein a timing protection control loop of the timing protection control loops processes an output value from a sensor to determine whether to implement a mitigation measure to throttle instruction execution at a core (See Paragraphs 29, 34, and 56-57); implementing a voltage control loop for a plurality of the cores to perform: calculating a performance degradation value based on instances output values calculated by timing protection loops at the cores satisfied a threshold condition (See Figure 5 Numbers 504 and 506 and Paragraphs 67-71); inputting the performance degradation value to a function to output a voltage increase, wherein the function provides different voltage increases for different performance degradation values (See Paragraphs 78-79 and 82); and increasing the voltage supplied to the processor and the cores by the voltage increase (See Figure 5 Number 512 and Paragraph 78). In reference to Claim 9, Webel discloses the limitations as applied to Claim 8 above. Webel further discloses that the timing protection control loops operate more frequently than the voltage control loop (See Paragraphs 29, 33-34, 52, 66, 69, and 80-81 [timing protection control loop/droop sensor operates continuously as workloads are processed; voltage control loop can range up to 24 hours between cycles]). In reference to Claim 10, Webel discloses the limitations as applied to Claim 8 above. Webel further discloses that the threshold condition is satisfied in response to the output value being equal or less than a threshold output value, wherein the output value is based on an operation margin at the processor (See Paragraphs 32-34), further comprising: incrementing, by the timing protection control loops, a counter in response to output values being equal or less than the threshold output value (See Figure 5 Number 504 and Paragraphs 67-68); and using, by the voltage control loop, the counter to calculate the performance degradation value, wherein a higher a value of the counter corresponds to a higher performance degradation value (See Figure 5 Number 506 and Paragraph 70). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to output values being equal or less than a threshold output value” as requiring the occurrence of the output values being equal or less than the threshold output value. In reference to Claim 11, Webel discloses the limitations as applied to Claim 10 above. Webel further discloses that the operation margin comprises a timing margin to execute an instruction, wherein the mitigation measure comprises increasing number of cycles at a core to execute an instruction (See Paragraphs 49 and 55-56), wherein the count indicates a number of cycles during which the cores were not submitting instructions, and wherein the performance degradation value indicates a percentage of cycles not executing instructions (See Paragraph 70). In reference to Claim 12, Webel discloses the limitations as applied to Claim 8 above. Webel further discloses incrementing, by the timing protection control loops, first counter in response to output values being equal or less than a threshold output value (See Figure 5 Number 504 and Paragraphs 67-68); and incrementing, by the timing protection control loops, second counter indicating a total number of times the output value was produced, wherein the voltage control loop calculates the performance degradation value comprises dividing a first value of the first counter by a second value of in the second counter (See Paragraph 70 [by definition of “percent”, calculating a percent performance degradation value requires dividing the number of times the output values were equal or less than a threshold output value by the total number of times the output value was produced]). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to output values being equal or less than a threshold output value” as requiring the occurrence of the output values being equal or less than the threshold output value. In reference to Claim 14, Webel discloses the limitations as applied to Claim 8 above. Webel further discloses modifying the voltage increases the function outputs for different performance degradation values to enable low-power modes by allowing more performance loss or higher performance modes by reducing performance loss at expense of higher power (See Paragraphs 6-7, 32, 34, and 36). Claims 15 and 22 recite limitations which are substantially equivalent to those of Claim 1 and are rejected under similar reasoning. Claims 16 and 23 recites limitations which are substantially equivalent to those of Claim 2 and are rejected under similar reasoning. Claims 17 and 24 recite limitations which are substantially equivalent to those of Claim 3 and are rejected under similar reasoning. Claim 19 recites limitations which are substantially equivalent to those of Claim 8 and is rejected under similar reasoning. Claim 20 recites limitations which are substantially equivalent to those of Claim 10 and is rejected under similar reasoning. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5, 18, and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Webel as applied to Claims 3, 17, and 24 above. In reference to Claim 5, Webel discloses the limitations as applied to Claim 3 above. Webel does not explicitly disclose determining whether the performance degradation value is below the degradation threshold value in a predetermined number of consecutive calculations of the performance degradation value, wherein the voltage is decreased in response to determining that the performance degradation value is below the degradation threshold value the predetermined number of consecutive calculations. However, Webel does disclose, for a different value, determining whether a value is below a threshold value in a predetermined number of consecutive calculations of the value, wherein a setting is adjusted in response to determining that the value is below the threshold value the predetermined number of consecutive calculations (See Paragraph 55 [multiple events are used when comparing to a threshold as a single event may be an aberration]). It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Webel using the setting adjustment in response to determining that the value is below the threshold value the predetermined number of consecutive calculations of Webel for the performance degradation value, performance degradation threshold, and voltage decrease, resulting in the invention of Claim 5, in order to yield the predictable result of preventing the voltage decrease from being triggered when the detection of the performance degradation value being below the threshold is an aberration (See Paragraph 55 of Webel). For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining that the performance degradation value is below the degradation threshold value the predetermined number of consecutive calculations” as requiring the occurrence of the determining that the performance degradation value is below the degradation threshold value the predetermined number of consecutive calculations. Claims 18 recites limitations which are substantially equivalent to those of Claim 5 and is rejected under similar reasoning. Claims 25 recites limitations which are substantially equivalent to those of Claim 24 and is rejected under similar reasoning. Claim Objections Applicant is advised that should Claims 15-18 be found allowable, Claims 22-25 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Claims 15-18 differ, respectively, from Claims 22-25 only in the recitation of a system comprising the processor. However, no additional details of the system beyond the processor are claimed in Claim 15. As all of the functionality of Claims 15 and 22 is performed by the claimed processor, the claimed processor is, by itself, a system. Thus, Claims 15-18 are identical in scope, respectively, to Claims 22-25. Allowable Subject Matter Claim(s) 13 and 21 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to disclose, either alone or in combination, all of the claimed limitations in the combinations as claimed. The most relevant prior art is Webel as applied in the above rejections. Webel discloses incrementing, by the timing protection control loops, first counters in response to output values being equal or less than a threshold output value (See Figure 5 Number 504 and Paragraphs 67-68); and determining, by the voltage control loop, whether the performance degradation value exceeds a degradation threshold value (See Figure 6 Number 606 and Paragraphs 82-83). However, Webel does not explicitly disclose, in the combinations as claimed, incrementing, by the timing protection control loops, second counters in response to output values being one output value above the threshold output value; in response to determining that the performance degradation value is below the degradation threshold value, determining, by the voltage control loop, whether a second counter condition is satisfied based on the second counters, wherein a higher value of the second counters increases a likelihood of the second counters satisfying the second counter condition; and decreasing, by the voltage control loop, the voltage in response to determining that the second counter condition is not satisfied. Furthermore, such features would not have been obvious to one of ordinary skill in the art in the combinations as claimed in view of the prior art. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining that the performance degradation value is below the degradation threshold value” as requiring the occurrence of the determining that the performance degradation value is below the degradation threshold value. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the phrase “in response to determining that the second counter condition is not satisfied” as requiring the occurrence of the determining that the second counter condition is not satisfied. Information Disclosure Statement The information disclosure statement (IDS) submitted on 23 April 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. The information disclosure statement (IDS) submitted on 21 July 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Conclusion The art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS J CLEARY whose telephone number is (571)272-3624. The examiner can normally be reached Monday-Friday 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS J. CLEARY/Primary Examiner, Art Unit 2175
Read full office action

Prosecution Timeline

Feb 06, 2025
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §102, §103, §112
Oct 19, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
88%
With Interview (+15.7%)
2y 7m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 757 resolved cases by this examiner. Grant probability derived from career allowance rate.

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