DETAILED ACTION
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-15 and 19-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,247,481. Although the claims at issue are not identical, they are not patentably distinct from each other because the conflicting claims are anticipated by the patented claims [Wingdings font/0xE0] claims are reproduced in a table below for comparison.
Claim No.: __ of application 19/047,821
Claim No.: __ of U.S.P. 12,247,481
1. An apparatus comprising: a set of components; a set of configurable switch elements programmed to make connections associated with one or more inputs or outputs of the set of components; a first input that receives a set of configuration information, wherein the set of configurable switch elements are programmed to perform a function in the analog domain based on receipt of the first set of configuration information via the first input; and a second input that receives a signal, wherein the function is performed in the analog domain based on receipt of the signal via the second input.
1. An apparatus comprising: a set of components; a set of configurable switch elements that make connections to at least a subset of the set of components via controlled programming of the set of configurable switch elements; a first input that receives a first set of configuration information, wherein the set of configurable switch elements are programmed to perform a function in an analog domain based on a receipt of the first set of configuration information via the first input; and a second input that receives a sensor signal, wherein the function is performed in the analog domain based on receipt of the sensor signal to generate a second signal.
2. The apparatus of claim 1, wherein the signal is an analog signal and the set of components include an analog component.
1. and 5 “…sensor signal” is an analog signal and “wherein the set of components includes analog components”.
3. The apparatus of claim 1, wherein the performance of the function generates a second signal.
1. “…wherein the function is performed in the analog domain based on receipt of the sensor signal to generate a second signal”
4. The apparatus of claim 3, further comprising: an analog to digital converter (ADC) that converts the second signal into a set of bits.
2. The apparatus of claim 1, further comprising: an analog to digital converter (ADC) that converts the second signal into a set of bits.
5. The apparatus of claim 4, further comprising: a set of digital electronics that receives the set of bits and performs an additional function based on receipt of the set of bits.
4. The apparatus of claim 2, further comprising: a set of digital electronics that receives the set of bits and performs an additional function based on receipt of the set of bits.
6. The apparatus of claim 1, wherein the set of components includes a digital component.
6. The apparatus of claim 5, wherein the set of components includes digital components.
7. The apparatus of claim 1, further comprising: storing information associated with temperature compensation.
7. The apparatus of claim 4, further comprising a data storage that stores a lookup table with information associated with compensating for temperature.
8. The apparatus of claim 4, further comprising: a control computer that provides the set of configuration information.
8. The apparatus of claim 4, further comprising: a control computer…provides data associated with the set of bits to the control computer.
9. The apparatus of claim 4, further comprising: a memory; and a processor that executes instructions out of the memory to perform a second function based on receiving the set of bits.
9. The apparatus of claim 2, further comprising: a memory; and a processor that executes instructions out of the memory to perform a function based on receiving the set of bits.
10. The apparatus of claim 1, wherein the set of configurable switch element are located in a wellbore.
10. The apparatus of claim 2, wherein: the set of components, the set of configurable switch elements, and the ADC are located in a wellbore and a value associated with the set of bits is adjusted based on a condition associated with the wellbore.
11. A method comprising: setting one or more switches of a set of configurable switch elements, wherein the one or more switches of the set of configurable switch elements connects to at least one analog component and configures the at least one analog component to perform a function in the analog domain; receiving an analog signal, wherein the function is performed on the analog domain based on the at least one analog component being configured to perform the function in the analog domain; and generating a second signal that corresponds to the function being performed on the analog signal.
11. A method comprising: setting a configuration of a set of configurable switch elements and analog components according to a set of received data; receiving an analog signal from a sensor; performing a computation in the analog domain based on the configuration of the configurable switch elements and the analog components, the computation performed in the analog domain on the analog signal received from the sensor; and generating a second signal that corresponds to the computation in the analog domain.
12. The method of claim 11, further comprising: converting the second signal to a series of bits based on operation of an analog to digital converter (ADC).
12. The method of claim 11, further comprising converting the second signal to the digital domain by sampling the second signal by an analog to digital converter (ADC) that converts the second signal into a set of bits.
13. The method of claim 12, further comprising: providing the series of bits to a computing device; and performing a second function by the computing device based on the series of bits being provided to the computing device.
13. The method of claim 12, further comprising providing the set of bits to a computing device for processing in the digital domain.
14. The method of claim 12, further comprising: performing a second function in the digital domain based on the second signal being converted to the series of bits.
14. The method of claim 12, further comprising: performing a processing function by a set of digital electronics that receives the set of bits.
15. The method of claim 11, further comprising: accessing a set of characterization data that identifies one or more temperature related changes in operational characteristics of the at least one analog component.
15. The method of claim 14, further comprising accessing a data storage that stores lookup table information associated with compensating for temperature related changes.
19. The method of claim 15, wherein the operational characteristics include one or more of noise, bias offsets, or gain values that change with temperature.
17. The method of claim 16, wherein the adjustment compensates for at least one of a bias, Johnson noise, or a gain that varies with temperature.
20. The method of claim 15, further comprising: performing a compensation according to the set of characterization data that identifies the one or more temperature related changes in the operational characteristics.
17. The method of claim 16, wherein the adjustment compensates for at least one of a bias, Johnson noise, or a gain that varies with temperature.
Allowable Subject Matter
Claims 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 16, the prior art of record, when taken alone or in combination, cannot be construed as reasonably teaching or suggesting all of the elements of the claimed invention as arranged or provided in the manner as claimed by the applicant. Added for emphasis, the claim recitation “identifying a resistance value to connect to the at least one analog component, wherein the setting of the one or more switches connect one or more resistors that correspond to the identified resistor value to the at least one analog component” is not found in the prior art of record.
Regarding claims 17-18, the prior art of record, when taken alone or in combination, cannot be construed as reasonably teaching or suggesting all of the elements of the claimed invention as arranged or provided in the manner as claimed by the applicant. Added for emphasis, the claim recitation “identifying a value of a compensation resistance to compensate for a temperature related operational characteristic of the at least one analog component, wherein the one or more switches are set to compensate for the temperature related operational characteristic of the at least one analog component” is not found in the prior art of record.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAI M NGUYEN whose telephone number is (571)272-1809. The examiner can normally be reached Mon-Fri: 8:00 am - 4:30pm.
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/KHAI M NGUYEN/Primary Examiner, Art Unit 2845
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