DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 15 and 20 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Lee et al. (US Pat Pub 2024/0170038).
Regarding claims 1, 15 and 20, Lee et al. disclose a memory device (for example figs. 1 – 10 and all related texts), comprising:
rewritable memory cells configured to store data (referred to as nonvolatile memory such as Flash, para 0061); and
a refresh circuit (to perform refresh operation, see para 0023) coupled to the rewritable memory cells (see fig. 5-1) and configured to sequentially implement (see fig. 7) at least:
a first data refresh (for example the first refresh initiation signal 518-1 for Array 1 in fig. 5-2 or 618-1 in fig. 6-2),
a second data refresh after a first delay from the first data refresh (referred to as the second fresh signal 518-2 applied to Array 2 of fig. 5-2 or 618-2 of fig. 6-2, with time d delayed after the first refresh signal),
a third data refresh after a second delay from the second data refresh (referred to as the signal 518-3 of fig. 5-2 for Array 3, or 618-3 of fig. 6-2 for Array 3 with delay time 2d), and
a fourth refresh operation after a third delay from the third data refresh (referred to in fig. 5-2 as signal 518-4 delayed at time 3d for Array 4, or signal 618-4 in fig. 6-2),
wherein each of the first, second, and third delays successively increase according to a predetermined pattern (referred to as delay pattern Nd time-delay duration 518-N of fig. 5-2 or 618-N for Array N in fig. 6-2).
Allowable Subject Matter
Claims 2 – 14 and 16 – 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior arts of record fail to teach or reasonably suggest the memory device/apparatus as set forth above, further comprising, in combination, the features and limitations additionally claimed at least in claims 2, 4, 7, and 14 (with respect to independent claim 1), claims 16 and 17 (with respect to independent claim 15).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
See additional cited references for related disclosures to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LY D PHAM whose telephone number is (571)272-1793. The examiner can normally be reached M-F: 8am-5pm.
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LY D. PHAM
Examiner
Art Unit 2827
/LY D PHAM/Primary Examiner, Art Unit 2827 July 10, 2026