Prosecution Insights
Last updated: August 16, 2026
Application No. 19/057,258

USER DATA BLOCK LEVEL ACCESS COUNTER

Non-Final OA §102§103§112§Other
Filed
Feb 19, 2025
Priority
Mar 19, 2024 — provisional 63/567,195
Examiner
MCMAHON, DANIEL F
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
931 granted / 1039 resolved
+29.6% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
22 currently pending
Career history
1050
Total Applications
across all art units

Statute-Specific Performance

§101
8.6%
-31.4% vs TC avg
§103
29.9%
-10.1% vs TC avg
§102
22.4%
-17.6% vs TC avg
§112
31.2%
-8.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1039 resolved cases

Office Action

§102 §103 §112 §Other
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1 – 20 are presented for examination. Priority Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) is acknowledged. Specification The abstract of the disclosure is objected to because the language “may receive”, “may access” and “may increment” are speculative and fail to provide a concise statement of the technical disclosure of the patent. Applicant is reminded of the proper content of an abstract of the disclosure. A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). Claim Objections Claims 3 and 18 objected to because of the following informalities: The language “further configured to one of:” appears incomplete. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3, 4, 18, and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 3 and 18, claims 3 as representative, the limitation “mask beats associated with the access counter” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “beats”. Applicant disclosure, paragraph 0037 – 0039 and 0061, disclose “beats” in relation to a hot counter (HC) and a “CXL device”. However, the disclosure is silent to regarding the scope of the term. One of ordinary skill in the art, at the time of filing, be unclear what is “masked” in relation the access counter. Regarding claim 4, the limitation “wherein one or more components” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the one or more components previously disclosed or additional one or more components. Regarding claim 19, the limitation “wherein one or more components” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the one or more components previously disclosed or additional one or more components. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: Claim 1 one or more components configured to: Figure 1 receive, from a host device, a request to access host data stored in a user data block, Figure 1 wherein the user data block includes: a data portion in which the host data is stored, an error correction portion in which error correction bits associated with correcting errors in the host data are stored, a metadata portion in which metadata bits associated with the host data are stored, and an access counter portion in which an access counter associated with a quantity of accesses to the user data block is stored; Figure 2A access the user data block; and Figure 1 increment the access counter based on accessing the user data block. Figure 1, element 115; Figure 2B Claim 2 multiple memory components, Figure 1 wherein the data portion is associated with a first subset of memory components, of the memory components, wherein the error correction portion is associated with a second subset of memory components, of the memory components, and wherein the access counter portion and the metadata portion are included on a memory component of the second subset of memory components. Claim 3 the one or more components are further configured to one of: Figure 1, element 115 mask beats associated with the access counter when determining channel parity information for the user data block, or use a fixed value in place of the beats associated with the access counter when performing at least one of a read operation or a write operation for the user data block. Claim 4 one or more components, to increment the access counter, are configured to: Figure 1, element 115 activate the access counter portion and multiple other access counter portions associated with multiple other access counters; increment the access counter; and refrain from incrementing the multiple other access counters. Claim 5 the one or more components are further configured to: Figure 1, element 115 identify, using the access counter, that the quantity of accesses to the user data block satisfies a threshold; and cause an alert signal to be transmitted based on identifying that the quantity of accesses to the user data block satisfies the threshold. Claim 6 the one or more components are further configured: Figure 1 determine that a time period has elapsed; and reduce the access counter based on determining that the time period has elapsed. Claim 7 the one or more components are further configured to reduce multiple access counters associated with multiple other user data blocks based on determining that the time period has elapsed. Figure 1 Claim 9 the one or more components are further configured to receive configuration information configuring one or more parameters associated with the access counter via one or more mode registers associated with the user data block. Figure 1 Claim 17 one or more components configured to: Figure 1 receive, from a host device, a request to access host data stored in a user data block, Figure 1, element 115 wherein the user data block includes: a data portion in which the host data is stored, an error correction portion in which error correction bits associated with correcting errors in the host data are stored, a metadata portion in which metadata bits associated with the host data are stored, and an access counter portion in which multiple access counters associated with a quantity of accesses to the user data block are stored; Figure 2A access the user data block; Figure 1 increment a first access counter, of the multiple access counters, based on accessing the user data block; and Figure 1, element 115; Figure 2B reduce a second access counter, of the multiple access counters, concurrently with incrementing the first access counter. Figure 1, element 115; Figure 2B Claim 18 the one or more components are further configured to one of: Figure 1 mask beats associated with the access counter when determining channel parity information for the user data block, or use a fixed value in place of the beats associated with the access counter when performing at least one of a read operation or a write operation for the user data block. Claim 19 one or more components, to increment the first access counter, are configured to: Figure 1, element 115 activate the access counter portion and multiple other access counter portions associated with multiple other access counters; increment the first access counter; and refrain from incrementing the multiple other access counters. Claim 20 the one or more components are further configured to: Figure 1, element 115 identify, using the first access counter, that the quantity of accesses to the user data block satisfies a threshold; and cause an alert signal to be transmitted based on identifying that the quantity of accesses to the user data block satisfies the threshold. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 – 3, 5, 9, 10, 12, and 14 are rejected under 35 U.S.C. 102(a0(1) as being anticipated by Coulson, U.S. Publication 2003/0058681 (herein Coulson). Regarding claim 1, Coulson discloses: A memory device, comprising: one or more components configured to: receive, from a host device, a request to access host data stored in a user data block (figure 2, element 20), wherein the user data block includes: a data portion in which the host data is stored, an error correction portion in which error correction bits associated with correcting errors in the host data are stored, a metadata portion in which metadata bits associated with the host data are stored (paragraph 0013), and an access counter portion in which an access counter associated with a quantity of accesses to the user data block is stored (paragraph 0016, 0017); access the user data block (figure 3, 4); and increment the access counter based on accessing the user data block (figure 2, element 22). Regarding claim 2, Coulson discloses: the user data block includes multiple memory components, wherein the data portion is associated with a first subset of memory components, of the memory components (paragraph 0015 “The memory controller may not be a separately dedicated controller”; 0016 “In one embodiment the memory blocks and memory chip are comprised of polymer ferroelectric memory”; figure 1, element 14, 16), wherein the error correction portion is associated with a second subset of memory components, of the memory components (paragraph 0015 “The memory controller may not be a separately dedicated controller”; 0016 “In one embodiment the memory blocks and memory chip are comprised of polymer ferroelectric memory”; figure 1, element 14, 16), and wherein the access counter portion and the metadata portion are included on a memory component of the second subset of memory components (paragraph 0015 “The memory controller may not be a separately dedicated controller”; 0016 “In one embodiment the memory blocks and memory chip are comprised of polymer ferroelectric memory”; figure 1, element 14, 16). Regarding claim 3, Coulson discloses: The memory device of claim 1, wherein the one or more components are further configured to one of: mask beats associated with the access counter when determining channel parity information for the user data block, or use a fixed value in place of the beats associated with the access counter when performing at least one of a read operation or a write operation for the user data block (paragraph 0017 “The counter is incremented to reflect the new access cycle”). Regarding claim 5, Coulson discloses: identify, using the access counter, that the quantity of accesses to the user data block satisfies a threshold (paragraph 0018 “the counter is checked against a predetermined threshold of a number of access cycles”); and cause an alert signal to be transmitted based on identifying that the quantity of accesses to the user data block satisfies the threshold (paragraph 0018 “memory controller or software will "remap" this sector of memory”). Regarding claim 9, Coulson discloses: receive configuration information configuring one or more parameters associated with the access counter via one or more mode registers associated with the user data block (paragraph 0035 “implemented in hardware using counters and registers within a controller”). Regarding claim 10, Coulson discloses: an access-counter threshold, a size of the access counter portion, enablement of the access counter, support of the access counter, enablement of a reduction of the access counter, a reduction type for reducing the access counter, a type of one or more accesses to the user data block that are to be counted by the access counter, or enablement of one access counter, of multiple access counters associated with the user data block. (paragraph 0018 “the counter is checked against a predetermined threshold of a number of access cycles”; 0029). Regarding claim 12, Coulson discloses: A method, comprising: receiving, by a memory device from a host device, a request to access host data stored in a user data block (figure 2, element 20), wherein the user data block includes: a data portion in which the host data is stored, an error correction portion in which error correction bits associated with correcting errors in the host data are stored, a metadata portion in which metadata bits associated with the host data are stored (paragraph 0013), and an access counter portion in which an access counter associated with a quantity of accesses to the user data block is stored (paragraph 0016, 0017); accessing, by a memory device, the user data block (figure 3, 4); and incrementing, by the memory device, the access counter based on accessing the user data block (figure 2, element 22). Regarding claim 14, Coulson discloses: identifying, by the memory device using the access counter, that the quantity of accesses to the user data block satisfies a threshold (paragraph 0018 “the counter is checked against a predetermined threshold of a number of access cycles”); and causing, by the memory device, an alert signal to be transmitted based on identifying that the quantity of accesses to the user data block satisfies the threshold (paragraph 0018 “memory controller or software will "remap" this sector of memory”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 6, 8, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Song et al., U.S. Publication 2025/0147904 (herein Song), in view of Coulson. Regarding claim 6, Coulson does not explicitly teach: determine that a time period has elapsed; and reduce the access counter based on determining that the time period has elapsed. Song teaches: determine that a time period has elapsed (paragraph 0026); and reduce the access counter based on determining that the time period has elapsed (paragraph 0026 “When the duration of time has expired to track memory access with the last counter of a region, tracking memory accesses to the region may continue by looping around to reset and use the first counter”). One of ordinary skill in the art, at the time of the effective filing date of the invention, would find it obvious to combine the teaching of Coulson: receive, from a host device, a request to access host data stored in a user data block; with the teaching of Song: reduce the access counter based on determining that the time period has elapsed for the purpose of tracking memory access patterns (paragraph 0026). Memory access is well-known in the art (figure 3, 4). Memory access counters are a well-known design choice in the art (paragraph 0014). Expiration of memory access counters is a well-known design choice to manage counters (paragraph 0026). One of ordinary skill in the art would recognize the use of well-known design choice would yield a predictable result. Regarding claim 8, Coulson and Song teach the limitations of the parent claim. Coulson does not explicitly teach: the time period is an integer multiple of a reference time period. Song teaches: the time period is an integer multiple of a reference time period (paragraph 0026). And in view of the motivation previously stated above, for claim 6, the claim is rejected. Regarding claim 15, Coulson does not explicitly teach: determining, by the memory device, that a time period has elapsed; and reducing, by the memory device, the access counter based on determining that the time period has elapsed. Song teaches: determining, by the memory device, that a time period has elapsed (paragraph 0026); and reducing, by the memory device, the access counter based on determining that the time period has elapsed (paragraph 0026 “When the duration of time has expired to track memory access with the last counter of a region, tracking memory accesses to the region may continue by looping around to reset and use the first counter”). And in view of the motivation previously stated above, for claim 6, the claim is rejected. Allowable Subject Matter Claims 17 and 20 are allowed. Claim 18 would be allowable if rewritten to overcome the claim objection, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Claim 19 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Claims 4, 7, 11, 13, and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The claimed invention, regarding claim 17 as representative, recites features such as: receive, from a host device, a request to access host data stored in a user data block and increment a first access counter, of the multiple access counters, based on accessing the user data block; and reduce a second access counter, of the multiple access counters, concurrently with incrementing the first access counter. The prior art of record (Coulson, U.S. Publication 2003/0058681, Song et al., U.S. Publication 2025/0147904, and Majumdar et al. U.S. Publication 2023/0297285, as examples of such prior art) do not teach the same. Closest Prior Arts of Record Stonelake et al., U.S. Publication 2021/0405913 teaches: A processing device in a memory system tracks a plurality of memory access operations directed to a plurality of segments of data on the memory device and maintains a plurality of access counters corresponding to the plurality of segments. The processing device sorts the plurality of segments based on values of the corresponding access counters and filters the plurality of segments to identify a subset of the plurality of segments for which the values of the corresponding access counters satisfy a threshold criterion. The processing device further generates a notification comprising an indication of the subset of the plurality of segments and provides the notification to a host system after the expiration of a periodic interval. Majumdar et al., U.S. Publication 2023/0297285 teaches: An apparatus can include a number of memory devices and a memory controller coupled to one or more of the number of memory devices. The memory controller can include a row hammer detector. The memory controller can be configured increment for a first time period a row counter in a first data structure and a refresh counter. The memory controller can be configured to increment for a second time period a row counter in a second data structure and the refresh counter. The memory controller can be configured to determine that a value of the refresh counter exceeds a refresh threshold and responsive to the determination that the value of the refresh counter exceeds the refresh threshold, issue a notification. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Musoll; Enrique et al. US 20240054072 A1 Abbas; Syed Yasir et al. US 10095635 B2 Jayasena; Nuwan US 20230095461 A1 Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL F MCMAHON whose telephone number is (571)270-3232. The examiner can normally be reached Monday-Thursday 9am - 5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at (571)270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Daniel F. McMahon/Primary Examiner, Art Unit 2111
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Prosecution Timeline

Feb 19, 2025
Application Filed
Jul 14, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
92%
With Interview (+2.3%)
2y 1m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1039 resolved cases by this examiner. Grant probability derived from career allowance rate.

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