DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A, FIGS. 1-8 in the reply filed on 12/15/2025 is acknowledged. The traversal is on the grounds that the search and examination of all claims may be made without serious burden. This is not found persuasive because Species A, FIGS. 1-8 is related to a display device comprising a pixel comprising a light-emitting element, first and second transistors, an emission control transistor, a storage capacitor is mutually exclusive from Species C, FIGS. 10-12 related to a display device comprising a substrate a first gate electrode disposed on the substrate, a first insulation layer disposed on the first gate electrode; an active layer disposed on the first insulation layer, overlapping the first gate electrode, and including an oxide semiconductor; a second insulation layer disposed on the active layer; and a second gate electrode disposed on the second insulation layer and overlapping the active layer is mutually exclusive from Species D, FIGS. 13-15 related to a display device comprising a demultiplexer selectively and electrically connect the channels to data lines.
Therefore, due to the independent and mutually exclusive inventions of Species A, FIGS. 1-8, Species C, FIGS. 10-12 and Species D, FIGS. 13-15, which would present a serious burden to examination, claims 11-15 are withdrawn from examination as being a non-elected species.
The requirement is still deemed proper and is therefore made FINAL.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 02/24/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: LIGHT EMITTING LED DISPLAY DEVICE REDUCING POWER CONSUMPTION AND DEAD SPACE OF THE LED DISPLAY DEVICE
Claim Objections
Claims 1 and 16 are objected to because of the following informalities:
As per claims 1 and 16, the limitation “and being an oxide n-channel metal oxide semiconductor (NMOS) transistor” should be “and the emission control transistor being an oxide n-channel metal oxide semiconductor (NMOS) transistor”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-10, 16-17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230075763) in view of Park (US 20170018237).
As per claim 1, Kim discloses a display device (Fig. 1, #1; [0052]) comprising:
a pixel (#PX; [0054]) comprising:
a light-emitting element (Fig. 2A, #ED; [0064]);
a first transistor (#T1) which controls a driving current flowing through the light-emitting element (#ED), and including a gate connected to a first node (#N3), a first electrode connected to a second node (#N1), and a second electrode connected to a third node (#N2; [0066]);
a second transistor (#T2) which transmits a data voltage to a fourth node (#N4) in response to a first gate signal ([0067]);
a storage capacitor (#CST) connected between the first node (#N3) and the fourth node (#N4; [0076]); and
an emission control transistor (#T9) which transmits a first power voltage to the second node (#N1) in response to a first emission signal, including a first gate which receives the first emission signal, and being an oxide n-channel metal oxide semiconductor (NMOS) transistor ([0074]-[0075]).
However, Kim does not teach an emission control transistor which transmits a first power voltage to the second node in response to a second gate signal, including a second gate which receives the second gate signal.
Park teaches a control transistor (Fig. 3A, #SW1) including a second gate (#GE2) which receives the second gate signal ([0090]; [0093]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the emission control transistor of Kim configured according to Park so as to provide a double-gate switching element that transmits a first power voltage to the second node in response to a second gate signal.
As per claims 2 and 17, Kim in view of Park discloses the display device (electronic apparatus) of claim 1 (claim 16), wherein the pixel further comprises:
a third transistor (Kim: #T3) which connects the first node (Kim: #N3) and the third node (Kim: #N2) in response to the second gate signal (Kim: [0068]);
a fourth transistor (Kim: #T4) which transmits a first initialization voltage to the first node (Kim: #N3) in response to a third gate signal (Kim: [0069]); and
a fifth transistor (Kim: #T5) which transmits a reference voltage to the fourth node (Kim: #N4) in response to the second gate signal (Kim: [0070]).
As per claims 4 and 19, Kim in view of Park discloses the display device (electronic apparatus) of claim 2 (claim 17), wherein the pixel further comprises:
a sixth transistor (Kim: #T6) which connects the third node (Kim: #N2) and an anode of the light-emitting element (Kim: #ED) in response to the first emission signal (Kim: [0071]; [0077]); and
a seventh transistor (Kim: #T7) which transmits a second initialization voltage to the anode of the light-emitting element (Kim: #ED) in response to a second emission signal (Kim: [0072]; [0077]).
As per claims 5 and 20, Kim in view of Park discloses the display device (electronic apparatus) of claim 4 (claim 19), wherein, in an emission period, the emission control transistor (Kim: #T9) is turned-on in response to the first emission signal having an activation level, and a path of the driving current is formed through the emission control transistor (Kim: #T9), the first transistor (Kim: #T1), and the sixth transistor (Kim: #T6; [0066]; [0071]; [0074]).
As per claim 6, Kim in view of Park discloses the display device of claim 4, wherein each of the first to seventh transistors is an oxide NMOS transistor (Kim: [0075]).
As per claim 7, Kim in view of Park discloses the display device of claim 4, wherein the pixel further comprises:
a hold capacitor (Kim: #CHD) including a first electrode connected to the fourth node (Kim: #N4) and a second electrode which receives the first power voltage (Kim: [0076]).
As per claim 8, Kim in view of Park discloses the display device of claim 4, wherein the pixel further comprises:
a bias control transistor (Kim: #T8) which provides a bias voltage to the second node (Kim: #N1) in response to the second emission signal (Kim: [0073]).
As per claim 9, Kim in view of Park discloses the display device of claim 8, wherein the first transistor is a polysilicon p-channel metal oxide semiconductor (PMOS) transistor, and wherein each of the second to sixth transistors is an oxide NMOS transistor (Kim: [0075]).
As per claim 10, Kim in view of Park discloses the display device of claim 8, wherein each of the seventh transistor and the bias control transistor is a polysilicon PMOS transistor (Kim: [0075]).
As per claim 16, Kim discloses an electronic apparatus (Fig. 30, #200; [0190]) comprising:
a display device (Fig.1, #1; [0052]) comprising:
a pixel (#PX; [0054]); and
a processor (#210) which controls the display device ([0191]-[0192]), the pixel comprising:
a light-emitting element (Fig. 2A, #ED; [0064]);
a first transistor (#T1) which controls a driving current flowing through the light-emitting element (#ED), and including a gate connected to a first node (#N3), a first electrode connected to a second node (#N1), and a second electrode connected to a third node (#N2; [0066]);
a second transistor (#T2) which transmits a data voltage to a fourth node (#N4) in response to a first gate signal ([0067]);
a storage capacitor (#CST) connected between the first node (#N3) and the fourth node (#N4; [0076]); and
an emission control transistor (#T9) which transmits a first power voltage to the second node (#N1) in response to a first emission signal, including a first gate which receives the first emission signal, and being an oxide n-channel metal oxide semiconductor (NMOS) transistor ([0074]-[0075]).
However, Kim does not teach an emission control transistor which transmits a first power voltage to the second node in response to a second gate signal, including a second gate which receives the second gate signal.
Park teaches a control transistor (Fig. 3A, #SW1) including a second gate (#GE2) which receives the second gate signal ([0090]; [0093]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the emission control transistor of Kim configured according to Park so as to provide a double-gate switching element that transmits a first power voltage to the second node in response to a second gate signal.
Allowable Subject Matter
Claims 3 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of a display device comprising a pixel comprising a light-emitting element, a first transistor which controls a driving current flowing through the light-emitting element, a second transistor which transmits a data voltage to a fourth node in response to a first gate signal, a storage capacitor connected between the first node and the fourth node, and an emission control transistor which transmits a first power voltage to the second node in response to a second gate signal or a first emission signal, including a first gate which receives the first emission signal and a second gate which receives the second gate signal does not teach or fairly suggest in a compensation period, the emission control transistor is turned-on in response to the second gate signal having an activation level, and the first power voltage for which a threshold voltage of the first transistor is compensated is applied to the first node through the emission control transistor, the first transistor, and the third transistor.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Nelson Lam/Examiner, Art Unit 2627