Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
i) Equation 4 is not clear. Needs correction. See “question mark i.e. ?” below.
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Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-2 and 8-9 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 3, 3, 8, 8 respectively of U.S. Patent No. 12,270,863. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant application claim is broader in every aspect than the patent claim and is therefore an obvious variant thereof. Although the conflicting claims are not identical, they are not patentably distinct from each other because claim 1 is generic to all that is recited in claim 1 of the patent. That is, claim 1 is anticipated by claim 1 of the patent. Similarly claims 2-3 are obvious to claims 1 and 2 respectively of the patent.
Claims 3-7 and 10-17, 19-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 2, 4, 5, 6, 7, 9, 11, 12, 13, 13/10, 13/10, 14, 13/9, 13 and 13/11 respectively of U.S. Patent No. 12,270,863 in view of Yi Lifang et al. (“Direct in-situ Measurement of Magnetic Loss in Power Electronic Circuits” Pages 3247-3257, Aug, 2020), hereafter Lifang. Because Lifang can determine the magnetic power loss further based on a parasitic capacitance of the inductor i.e. the second voltage waveform and the second current waveform are based on an overall capacitance based on a capacitance of the additional capacitor and a parasitic capacitance of the inductor.
Further, Lifang discloses a method (see page 3255 steps 1)-5) and following determination of actual magnetic loss) comprising: receiving, by one or more processors, a first voltage waveform and a first current waveform associated with a power converter circuit including an inductor (Fig. 3, Fig. 5, Fig. 6 plus equipment as disclosed in section “C: Experimental Verification”, in particular a computer system executing MATLAB; Step 1 of Page 3255); receiving, using the one or more processors, a second voltage waveform and a second current waveform associated with the power converter circuit including an additional capacitor (step 2 of page 3255, the change in slope S2 is achieved with addition CLX; “The slop of the inductor voltage is S = 20V/30ns without CLX and S = 20V /114ns with CLX”); determining, using the one or more processors and based on the first voltage waveform, first current waveform, second voltage waveform, and second current waveform, a first timing skew between voltage and current measurements from the power converter circuit (step 5 of page 3255; Fig. 10 determination of timing skew i.e. theta = -8.88ns); and determining, using the one or more processors, a magnetic power loss associated with the inductor of the power converter circuit based on the first timing skew (after step 5: “After obtaining the actual timing skew, the actual magnetic loss of an inductor can be readily found by reading the value, PLOSSMeas1. From the first curve.”; Fig. 10 determination of point (-8.88ns, 346.3mW)). Also processor of claim 8 of the patent is a measuring device for claim 15 of the application.
Lifang discloses the system, to perform the measurement with and without the additional capacitance CLX. It is considered obvious to the person skilled in the art that such two measurement possibilities would be implemented by a switchable capacitance, therefore discloses a switch is provided between the additional capacitor and the power converter circuit, and wherein the processor is further configured to computer-executable instructions to: modify a position of the switch to a closed position prior to measuring the second voltage waveform and the second current waveform., Lifang also discloses determining a first plot of a first measured magnetic power loss versus a second timing skew based on the first voltage waveform and the first current waveform (Section “IV Derivative Method" "A. Theoretical Analysis” Step "1) obtain PLOSSMeas1 versus theta with S1"; determining a second plot of a second measured magnetic power loss versus a third timing skew based on the second voltage waveform and the second current waveform ("Step 2) obtain PLOSSMeas2 versus theta with S2"); determining a third plot of a derivative of a third measured power loss versus a fourth timing skew based on the first plot and second plot (Step 4); Fig.10): and determining an actual timing skew (Step 5) Fig. 10 theta= - 8.88ns) by identifying a nadir point of the third plot, wherein the first timing skew is based on the actual timing skew.
Lifang further discloses a system (see page 3255 steps 1)-5) and following determination of actual magnetic loss and Fig. 5, Fig. 6 plus equipment as disclosed in section “C: Experimental Verification”, in particular a computer system executing MATLAB; Step 1 of Page 3255); comprising: a processor (implicit to the calculation e.g. MATLAB evaluation etc.); and memory storing computer-executable instructions, that when executed by the processor (implicit for MATLAB evaluation), cause the processor to: receive a first voltage waveform and a first current waveform associated with a power converter circuit including an inductor (page 3255: implicit for “1) obtain PLOSSMeas1 versus theta with S1”); receive a second voltage waveform and a second current waveform associated with the power converter circuit including an additional capacitor (implicit for “2) obtain PLOSSMeas1.bersus theta with S2” as it is disclosed on page 3253 the second slop is with additional CLX ; “The slop of the inductor voltage is S = 20V/30ns without CLX and S = 20V /114ns with CLX”); determine, based on the first voltage waveform, first current waveform, second voltage waveform, and second current waveform, a first timing skew between voltage and current measurements from the power converter circuit ((step 5 of page 3255; Fig. 10 determination of timing skew i.e. theta = -8.88ns); and determine a magnetic power loss associated with the inductor of the power converter circuit based on the first timing skew (after step 5: “After obtaining the actual timing skew, the actual magnetic loss of an inductor can be readily found by reading the value, PLOSSMeas1. From the first curve.”; Fig. 10 magnetic power loss of 346.3mW; Fig. 11b).
Therefore, a person having ordinary skill in the art before the effective filing date can modify the patent claims using teaching from Lifang in order to obtain claim inventions for advantages that Lifang have to offer.
.Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-8, 10-15 and 17-20 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Yi Lifang et al. (“Direct in-situ Measurement of Magnetic Loss in Power Electronic Circuits” Pages 3247-3257, Aug, 2020), hereafter Lifang.
Regarding claim 1, Lifang discloses a method (see page 3255 steps 1)-5) and following determination of actual magnetic loss) comprising: receiving, by one or more processors, a first voltage waveform and a first current waveform associated with a power converter circuit including an inductor (Fig. 3, Fig. 5, Fig. 6 plus equipment as disclosed in section “C: Experimental Verification”, in particular a computer system executing MATLAB; Step 1 of Page 3255); receiving, using the one or more processors, a second voltage waveform and a second current waveform associated with the power converter circuit including an additional capacitor (step 2 of page 3255, the change in slope S2 is achieved with addition CLX; “The slop of the inductor voltage is S = 20V/30ns without CLX and S = 20V /114ns with CLX”); determining, using the one or more processors and based on the first voltage waveform, first current waveform, second voltage waveform, and second current waveform, a first timing skew between voltage and current measurements from the power converter circuit (step 5 of page 3255; Fig. 10 determination of timing skew i.e. theta = -8.88ns), wherein the second voltage waveform and the second current waveform are based on an overall capacitance based on a capacitance of the additional capacitor and a parasitic capacitance of the inductor (implicit to inductor); and determining, using the one or more processors, a magnetic power loss associated with the inductor of the power converter circuit based on the first timing skew (after step 5: “After obtaining the actual timing skew, the actual magnetic loss of an inductor can be readily found by reading the value, PLOSSMeas1. From the first curve.”; Fig. 10 determination of point (-8.88ns, 346.3mW)).
Regarding claim 3, Lifang discloses the method of claim 2, to perform the measurement with and without the additional capacitance CLX. It is considered obvious to the person skilled in the art that such two measurement possibilities would be implemented by a switchable capacitance, therefore discloses a switch is provided between the additional capacitor and the power converter circuit, and wherein the method further comprises: modifying a position of the switch to a closed position prior to measuring the second voltage waveform and the second current waveform.
Regarding claim 4, Lifang discloses determining a first plot of a first measured magnetic power loss versus a second timing skew based on the first voltage waveform and the first current waveform (Section “IV Derivative Method" "A. Theoretical Analysis” Step "1) obtain PLOSSMeas1 versus theta with S1"; determining a second plot of a second measured magnetic power loss versus a third timing skew based on the second voltage waveform and the second current waveform ("Step 2) obtain PLOSSMeas2 versus theta with S2"); determining a third plot of a derivative of a third measured power loss versus a fourth timing skew based on the first plot and second plot (Step 4); Fig.10): and determining an actual timing skew (Step 5) Fig. 10 theta= - 8.88ns) by identifying a nadir point of the third plot, wherein the first timing skew is based on the actual timing skew.
Regarding claim 5, Lifang discloses a capacitance of 10 nF/5 nF; however, choice of a different capacitance value depends on the respective values of the other circuit elements and on the location of the capacitance. Thus the mere value of less than 20 pF alone does not provide a technical effect over the whole claimed range and thus cannot provide an inventive step on its own. Lifang therefore discloses a capacitance value of the added capacitor is less than 20 pF.
Regarding claim 6, Lifang discloses that a capacitance value of the added capacitor is based on a ratio of a first value and a second value, wherein the first value is determined based on an input voltage and an output voltage of the power converter circuit, and wherein the second value is determined based on an inductance of the inductor, a switching frequency of the power converter circuit, and a slop in voltage transition (cf. point 3.3). Therefore, Lifang discloses a capacitance value of the added capacitor is based on a ratio of a first value and a second value, wherein the first value is determined based on an input voltage and an output voltage of the power converter circuit, and wherein the second value is determined based on an inductance of the inductor, a switching frequency of the power converter circuit, and a slop in voltage transition.
Regarding claim 7, Lifang discloses that the first voltage waveform, first current waveform, second voltage waveform, and second current waveform are received while the power converter circuit is connected to a load and under operation (Section “C. Experimental Verification": "Five sets of inductor voltage and current waveforms are recorded when the dc-dc step-down buck converter is in the steady state in a thermally controlled environment, with and without the presence of CLX.). Lifang therefore discloses the first voltage waveform, first current waveform, second voltage waveform, and second current waveform are received while the power converter circuit is connected to a load and under operation.
Regarding claim 8, Lifang discloses a system (see page 3255 steps 1)-5) and following determination of actual magnetic loss and Fig. 5, Fig. 6 plus equipment as disclosed in section “C: Experimental Verification”, in particular a computer system executing MATLAB; Step 1 of Page 3255); comprising: a processor (implicit to the calculation e.g. MATLAB evaluation etc.); and memory storing computer-executable instructions, that when executed by the processor (implicit for MATLAB evaluation), cause the processor to: receive a first voltage waveform and a first current waveform associated with a power converter circuit including an inductor (page 3255: implicit for “1) obtain PLOSSMeas1 versus theta with S1”); receive a second voltage waveform and a second current waveform associated with the power converter circuit including an additional capacitor (implicit for “2) obtain PLOSSMeas1.bersus theta with S2” as it is disclosed on page 3253 the second slop is with additional CLX ; “The slop of the inductor voltage is S = 20V/30ns without CLX and S = 20V /114ns with CLX”), wherein the second voltage waveform and the second current waveform are based on an overall capacitance based on a capacitance of the additional capacitor and a parasitic capacitance of the inductor (implicit to an inductor); determine, based on the first voltage waveform, first current waveform, second voltage waveform, and second current waveform, a first timing skew between voltage and current measurements from the power converter circuit ((step 5 of page 3255; Fig. 10 determination of timing skew i.e. theta = -8.88ns); and determine a magnetic power loss associated with the inductor of the power converter circuit based on the first timing skew (after step 5: “After obtaining the actual timing skew, the actual magnetic loss of an inductor can be readily found by reading the value, PLOSSMeas1. From the first curve.”; Fig. 10 magnetic power loss of 346.3mW; Fig. 11b).
Regarding claim 10, Lifang discloses the system of claim 10, to perform the measurement with and without the additional capacitance CLX. It is considered obvious to the person skilled in the art that such two measurement possibilities would be implemented by a switchable capacitance, therefore discloses a switch is provided between the additional capacitor and the power converter circuit, and wherein the processor is further configured to computer-executable instructions to: modify a position of the switch to a closed position prior to measuring the second voltage waveform and the second current waveform.
Regarding claim 11, Lifang discloses determining a first plot of a first measured magnetic power loss versus a second timing skew based on the first voltage waveform and the first current waveform (Section “IV Derivative Method" "A. Theoretical Analysis” Step "1) obtain PLOSSMeas1 versus theta with S1"; determining a second plot of a second measured magnetic power loss versus a third timing skew based on the second voltage waveform and the second current waveform ("Step 2) obtain PLOSSMeas2 versus theta with S2"); determining a third plot of a derivative of a third measured power loss versus a fourth timing skew based on the first plot and second plot (Step 4); Fig.10): and determining an actual timing skew (Step 5) Fig. 10 theta= - 8.88ns) by identifying a nadir point of the third plot, wherein the first timing skew is based on the actual timing skew.
Regarding claim 12, Lifang discloses a capacitance of 10 nF/5 nF; however, choice of a different capacitance value depends on the respective values of the other circuit elements and on the location of the capacitance. Thus the mere value of less than 10 pF alone does not provide a technical effect over the whole claimed range and thus cannot provide an inventive step on its own. Lifang therefore discloses a capacitance value of the added capacitor is less than 20 pF.
Regarding claim 13, Lifang discloses that a capacitance value of the added capacitor is based on a ratio of a first value and a second value, wherein the first value is determined based on an input voltage and an output voltage of the power converter circuit, and wherein the second value is determined based on an inductance of the inductor, a switching frequency of the power converter circuit, and a slop in voltage transition (cf. point 3.3). Therefore, Lifang discloses a capacitance value of the added capacitor is based on a ratio of a first value and a second value, wherein the first value is determined based on an input voltage and an output voltage of the power converter circuit, and wherein the second value is determined based on an inductance of the inductor, a switching frequency of the power converter circuit, and a slop in voltage transition.
Regarding claim 14, Lifang discloses that the first voltage waveform, first current waveform, second voltage waveform, and second current waveform are received while the power converter circuit is connected to a load and under operation (Section “C. Experimental Verification": "Five sets of inductor voltage and current waveforms are recorded when the dc-dc step-down buck converter is in the steady state in a thermally controlled environment, with and without the presence of CLX.). Lifang therefore discloses the first voltage waveform, first current waveform, second voltage waveform, and second current waveform are received while the power converter circuit is connected to a load and under operation.
Regarding claim 15, Lifang discloses a system (for testing a magnetic loss of a power converter) (Fig.3,Fig.5,Fig.6) comprising: a power converter (Fig.3 DC-DC step-down buck converter); and an additional capacitor (Fig.3 " CLX ") connected to the power converter, wherein a capacitance value of the added capacitor is based on a ratio of a first value and a second value (unclear formulation, it appears that the capacitance value is predetermined when installing the capacitance; however, such unspecified ratio can always be found such that the disclosed values of section "C. Experimental Verification” of VH=20V, VL=10V (D=0.5 ), f = 100 KHz, L=10.2 µH and S=20V/36 ns result in the capacitance of 10 nF, e.g. 10 nF = const.* (20V-10V) / (100 KHz * 10.2 µH * 20V/36 ns) with const. ~ 0.05 ) wherein the first value (VH – VL = 10V) is determined based on an input voltage and an output voltage of the power converter, and wherein the second value (20 * (100 KHz * 10.2 µH * 20V/36 ns)) is determined based on an inductance of an inductor of the power converter, a switching frequency of the power converter, and a slop(e) in voltage transition; and a measurement device configured to measure a first voltage waveform and a first current waveform associated with the power converter circuit including an additional capacitor ((Fig. 3, Fig. 5, Fig. 6 plus equipment as disclosed in section “C: Experimental Verification”, in particular a computer system executing MATLAB; Step 1 of Page 3255) (step 2 of page 3255, the change in slope S2 is achieved with addition CLX; “The slop of the inductor voltage is S = 20V/30ns without CLX and S = 20V /114ns with CLX”)), wherein the first voltage waveform and the first current waveform are based on an overall capacitance based on a capacitance of the additional capacitor and a parasitic capacitance of the inductor (implicit to the inductor).
Regarding claim 17, Lifang discloses the system of claim 15, to perform the measurement with and without the additional capacitance CLX. It is considered obvious to the person skilled in the art that such two measurement possibilities would be implemented by a switchable capacitance, therefore discloses a switch (Q2 as an example) is provided between the additional capacitor and the power converter.
Regarding claim 18, Lifang discloses the system of claim 15, to perform the measurement with and without the additional capacitance CLX. Therefore, the measurement device is further configured to measure a second voltage waveform and a second current waveform associated with the power converter circuit without the additional capacitor.
Regarding claim 19, Lifang discloses the system of claim 15, further comprising a computing device configured to: determine, using one or more processors and based on the first voltage waveform, first current waveform, second voltage waveform, and second current waveform, a first timing skew between voltage and current measurements from the power converter circuit (step 5 of page 3255; Fig. 10 determination of timing skew i.e. theta = -8.88ns); and determine, using the one or more processors, a magnetic power loss associated with the inductor of the power converter circuit based on the first timing skew (after step 5: “After obtaining the actual timing skew, the actual magnetic loss of an inductor can be readily found by reading the value, PLOSSMeas1. From the first curve.”; Fig. 10 magnetic power loss of 346.3mW; Fig. 11b).
Regarding claim 20, Lifang discloses determining a first plot of a first measured magnetic power loss versus a second timing skew based on the first voltage waveform and the first current waveform (Section “IV Derivative Method" "A. Theoretical Analysis” Step "1) obtain PLOSSMeas1 versus theta with S1"; determining a second plot of a second measured magnetic power loss versus a third timing skew based on the second voltage waveform and the second current waveform ("Step 2) obtain PLOSSMeas2 versus theta with S2"); determining a third plot of a derivative of a third measured power loss versus a fourth timing skew based on the first plot and second plot (Step 4); Fig.10): and determining an actual timing skew (Step 5) Fig. 10 theta= - 8.88ns) by identifying a nadir point of the third plot, wherein the first timing skew is based on the actual timing skew.
Please note: Examiner has cited particular columns, line numbers, and figures in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teaching of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. Applicants are reminded that MPEP 2141.02 states: A prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention. W.L. Gore & Associates, Inc. V. Garlock, Inc., 721 F.2d 1540, 220 USPQ 303 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
Conclusion
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/PARESH PATEL/Primary Examiner, Art Unit 2858
August 4, 2026