DETAILED ACTION
This action is responsive to the following communications: the Application filed February 25, 2025, and the information disclosure statement (IDS) filed May 09, 2025 and June 22, 2026. This application is a CON of 18/120,133.
Claims 1-21 are pending. Claim 1 has been cancelled. Claims 2, 10 and 17 are independent.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on May 09, 2025 and June 22, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 2-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 2 recites “a plate …, wherein the plate is coupled with a first memory cell and a first digit line”. There is not disclosure that a plate of a memory specifically from the specification. Therefore, these languages constitute new matter. Clarification is required.
Claim 17 rejected for the same reason set forth above applied to claim 2.
Claims 3-9 and 18-21 are rejected due to claim dependency.
Claim 10 recites “a ground reference voltage”. There is not disclosure the claimed limitation from the specification. Therefore, these languages constitute new matter. Clarification is required.
Claims 11-16 are rejected due to claim dependency.
Claims 3 and 17 recites “refrain from applying the first voltage to the first digit line based at least in part on isolating the first digit line from the second digit line” There is no disclosure of these limitations from the specification. Therefore, these languages constitute new matter. Clarification is required.
Claims 18-21 are rejected due to claim dependency.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 2 recites “a plate” to a first voltage; and “a plate …, wherein the plate is coupled with a first memory cell and a first digit line”. It is not clear how the plate is coupled with a memory cell and a digital line and which plate among a number of plates defined in e.g., paragraph [0005] of the application’s specification, “a number of plates” associated with a memory array. Clarification is required.
Claim 17 rejected for the same reason set forth above applied to claim 2.
Claims 3-9 and 18-21 are rejected due to claim dependency.
Claim 10 recites “a first volage” and “a second voltage”, and defines the first voltage and the second voltage as being different from each other, with both being either negative voltage or a ground voltage. It is unclear how to generate different ground voltages. Clarification is required.
Claims 11-16 are rejected due to claim dependency.
Claims 3 and 17 recites “refrain from applying the first voltage to the first digit line based at least in part on isolating the first digit line from the second digit line” It is unclear what the applicant intended to claim as the invention. Clarification is required.
Claims 18-21 are rejected due to claim dependency.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of US Patent No. 12,249,362. Although the claims at issue are not identical, they are not patentably distinct from each other.
Instant Application
US Patent 12,249,362
Comment
Claim 2. A method, comprising:
setting a plate to a first voltage, wherein the plate is coupled with a first memory cell and a first digit line;
isolating the first digit line from a second digit line based at least in part on setting the plate to the first voltage;
coupling the plate with the second digit line based at least in part on isolating the first digit line from the second digit line; and
applying, based at least in part on coupling the plate with the second digit line, a second voltage to a word line that is coupled with the first memory cell.
Claim 1. A method, comprising:
setting a first voltage of a plate that is coupled with a first memory cell and a second memory cell, wherein the first memory cell is coupled with a first digit line;
isolating the first digit line from a second digit line that is coupled with the second memory cell based at least in part on setting the first voltage of the plate;
coupling the plate with the second digit line, wherein the first voltage is applied to the second digit line based at least in part on the coupling and is not applied to the
first digit line based at least in part on the isolating; and
applying, based at least in part on coupling the plate with the second digit line and isolating the first digit line from the second digit line, a second voltage to a word line that is coupled with the first memory cell and the second memory cell, and a third voltage to the first digit
line.
Note footnote1
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
.
Claims 10-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kamp (US 6,256,220).
Regarding independent claim 10, as best as can be understood, the claimed limitation of pre-charging operation and applying ground (or negative voltage) to bit lines is a well-known technology for a type of memory for its purpose. For support, of the above asserted facts, see for example, Kamp discloses a method, comprising:
determining, based at least in part on a precharge command, a logic state of a memory cell that is coupled with a digit line (e.g., col. 15, lines 12-14: … then BLm drops back down to zero via the precharge circuitry known in the art …; further it’s an inherent characteristic in a memory device);
applying a first voltage (FIGS. 6-7: BLm and FIGS. FIGS. 9-11: BLm voltage ) to the digit line based at least in part on the logic state of the memory cell, wherein whether the first voltage has a negative polarity or is a ground reference voltage is based at least in part on the logic state of the memory cell (see e.g., FIGS. 6-11, and accompanying disclosure); and
applying a second voltage to the digit line that is different than the first voltage based at least in part on the logic state of the memory cell (FIGS. 6-7: BLm and FIGS. FIGS. 9-11: BLm voltage ), wherein whether the second voltage has the negative polarity or is the ground reference voltage is based at least in part on the logic state of the memory cell (see e.g., FIGS. 6-11 and accompanying disclosure).
Regarding dependent claims 11-16 is rejected under e.g., Kamp as being anticipated and 112 rejections above.
Comments on the Rejections.
The claimed terms may be indefinite (see 112 rejections above) and there is a great deal of confusion and uncertainty as to the proper interpretation of the limitations of a claim, so it would not be proper to reject such a claim on the basis of prior art. Therefore, it is respectfully submitted that the examiner maintains the rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG IL CHO whose telephone number is (571)270-0137. The examiner can normally be reached M-Th, 7:30AM-5PM; Every other F, 7:30AM-4PM EST.
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/SUNG IL CHO/Primary Examiner, Art Unit 2825
1 Re independent claims 2, 10 and 17, claims of US Patent recites all the claimed limitations. The various dependent claims are anticipated by/obvious in view of the conflicting patent.
Prosecution Insights