Prosecution Insights
Last updated: October 02, 2026
Application No. 19/064,242

WAFER INSPECTION APPARATUS

Non-Final OA §103
Filed
Feb 26, 2025
Priority
Aug 19, 2024 — RE 10-2024-0110760
Examiner
COOK, JONATHON
Art Unit
2877
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
618 granted / 757 resolved
+13.6% vs TC avg
Strong +17% interview lift
Without
With
+17.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
32 currently pending
Career history
798
Total Applications
across all art units

Statute-Specific Performance

§101
3.4%
-36.6% vs TC avg
§103
49.7%
+9.7% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
17.1%
-22.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 757 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 9-11, & 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hill (PGPub 2007/0052953) (Hill) in view of Xia et al (PGPub 2023/0239053) (Xia). Regarding Claims 1, & 11, Hill discloses a wafer inspection apparatus (Paragraph 6, Figs. 1, 2, & 13) comprising: a light source (42) configured to output first tight; an optical arrangement (12 & 10) behind an image surface, the arrangement configured to receive the first light and output second light that is in a random pattern (Paragraphs 65, 67, & 97); an optical system (88) configured to provide the second light to an illuminated region of a wafer (78, Paragraph 41) that is behind a sample surface; and a detector (172, Fig. 13) behind a detection surface and configured to acquire a diffraction image formed on the detection surface by reflection of the second light from a detection region within the illuminated region of the wafer (Paragraphs 41, & 122). A patterned wafer will provide a diffraction image from light reflecting from it. Further, the detector itself is capable of acquiring a diffraction image regardless if it is produced or not and thus meets this limitation; wherein each of the sample surface, the detection surface, and the image surface is a virtual plane that is set in a direction perpendicular to a traveling direction of the second light, wherein the image surface is in a first light path from the light source to the spatial light modulator and in a second light path from the spatial light modulator to the optical system. Since these are arbitrarily assigned virtual planes it is entirely possible to set some planes on this apparatus that meet this limitation. Secondly an image plane with Hill that is after the diffuser and perpendicular to the direction of travel of light would be both in the first light path and second light path; and wherein the second light that is in the random pattern forms a random pattern image of a same shape on each of the sample surface, the detection surface, and the image surface. The light projected through the optics surface would maintain the shape of the wavefront through all of the surfaces; Hill fails to disclose the optical arrangement is a spatial light modulator (SLM); However, Xia teaches a SLM can be used to produce arbitrary light patterns (Fig. 13, Paragraph 419); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Hill with the optical arrangement is a spatial light modulator (SLM) because a SLM is functionally equivalent to the arrangement taught by Hill and would be used based upon availability and cost. Regarding Claims 9 & 17, Hill as modified by Xia discloses the aforementioned. Further, Hill discloses wherein the wafer comprises a periodic pattern on a surface thereof (Paragraph 41). A patterned wafer meets this limitation. Further, it is immaterial to the patentability of the claimed invention the type of sample being measured by the apparatus so long as the apparatus is capable of performing this task. Regarding Claim 10, Hill as modified by Xia discloses the aforementioned. Further, Hill discloses wherein the first light output from the light source comprises at least one of ultraviolet light, extreme ultraviolet light, X-rays, and visible light (Paragraph 56). Regarding Claim 16, Hill as modified by Xia discloses the aforementioned. Further, Hill discloses wherein the first light output from the light source comprises at least one of ultraviolet light, extreme ultraviolet light, X-rays, and visible light (Paragraph 56); Hill fails to disclose wherein the random pattern image comprises a speckle pattern image; However, Xia discloses wherein the random pattern image comprises a speckle pattern image (Fig. 13B, Paragraph 420); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Hill with wherein the random pattern image comprises a speckle pattern image because this is functionally equivalent to the arbitrary pattern disclosed and would be common sense to use. Regarding Claim 18, Hill discloses a wafer inspection apparatus (Paragraph 6, Figs. 1, 2, & 13) comprising: a light source (42); a stage configured to fix a wafer (78) that is behind a sample surface and that comprises a periodic pattern formed on a surface thereof. Inherently the sample has to have some form of stage supporting it thus this limitation is met; an optical arrangement (12 & 10) behind an image surface, the arrangement configured to receive the first light and output second light that is in a random pattern (Paragraphs 65, 67, & 97); a beam splitter in a first path of the second light and configured to transmit the second light toward the wafer (Paragraph 86); an objective lens (88) configured to focus the second light onto an illuminated region of the wafer; and a detector (172, Fig. 13) behind a detection surface and configured to acquire a diffraction image formed on the detection surface based on focused third light reflected from a detection region of the wafer (Paragraphs 41, & 122). A patterned wafer will provide a diffraction image from light reflecting from it. Further, the detector itself is capable of acquiring a diffraction image regardless if it is produced or not and thus meets this limitation; wherein each of the sample surface, the detection surface, and the image surface is a virtual plane set in a direction perpendicular to a traveling direction of the second light in the random pattern, wherein the image surface is in a second light path from the spatial light modulator to the beam splitter. Since these are arbitrarily assigned virtual planes it is entirely possible to set some planes on this apparatus that meet this limitation; and wherein the second light that is in the random pattern forms a random pattern image of a same shape on each of the sample surface, the detection surface, and the image surface. The light projected through the optics surface would maintain the shape of the wavefront through all of the surfaces; Hill fails to disclose the optical arrangement is a spatial light modulator (SLM); However, Xia teaches a SLM can be used to produce arbitrary light patterns (Fig. 13, Paragraph 419); Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Hill with the optical arrangement is a spatial light modulator (SLM) because a SLM is functionally equivalent to the arrangement taught by Hill and would be used based upon availability and cost. Allowable Subject Matter Claims 2-8, 12-15, 19, & 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: As to Claim 2 the prior art of record, taken alone or in combination, fails to disclose or render obvious a controller configured to control the spatial light modulator to move a position of the random pattern image on the image surface, wherein the illuminated region of the wafer and the detection region within the illuminated region are not changed while the position of the random pattern image is moved, in combination with the rest of the limitations of the claim. Claim 3-8 are allowable based upon their dependency. As to Claim 12 the prior art of record, taken alone or in combination, fails to disclose or render obvious a controller configured to control the spatial light modulator to move a position of the random pattern image on the image surface within a preset region such that the restricted region is included within the random pattern image formed on the image surface, in combination with the rest of the limitations of the claim. Claim 13-15 are allowable based upon their dependency. As to Claim 19 the prior art of record, taken alone or in combination, fails to disclose or render obvious wherein the wafer inspection apparatus further comprises a controller configured to control the spatial light modulator to move a position of the random pattern image on the image surface within a preset region such that the restricted region is included within the random pattern image formed on the image surface, in combination with the rest of the limitations of the claim. Claim 20 is allowable based upon its dependency. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHON COOK whose telephone number is (571)270-1323. The examiner can normally be reached 11am-7pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kara Geisel can be reached at 571-272-2416. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHON COOK/Examiner, Art Unit 2877 June 27, 2026 /Kara E. Geisel/Supervisory Patent Examiner, Art Unit 2877
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Prosecution Timeline

Feb 26, 2025
Application Filed
Jul 02, 2026
Non-Final Rejection mailed — §103
Jul 31, 2026
Interview Requested
Aug 06, 2026
Applicant Interview (Telephonic)
Aug 06, 2026
Examiner Interview Summary

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+17.0%)
2y 4m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 757 resolved cases by this examiner. Grant probability derived from career allowance rate.

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