Prosecution Insights
Last updated: April 19, 2026
Application No. 19/068,367

DISPLAY APPARATUS, METHOD OF DRIVING THE SAME AND ELECTRONIC APPARATUS INCLUDING THE SAME

Non-Final OA §102§103
Filed
Mar 03, 2025
Examiner
ZHOU, HONG
Art Unit
2629
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
94%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
674 granted / 876 resolved
+14.9% vs TC avg
Strong +18% interview lift
Without
With
+17.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
16 currently pending
Career history
892
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
12.0%
-28.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 876 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 15-18 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Lee et al. (US 2023/0154411). Regarding claim 1, Lee discloses a display apparatus (Figs 1-2; [0058], e.g., a display device 1) comprising: a display panel (e.g., display panel 10) comprising a pixel circuit including a light emitting element and a light sensing circuit including a light sensing element ([0059]-[0061], e.g., a pixel circuit includes a light emitting element EL and a photo sensor PS); a gate driver which outputs a gate signal to the pixel circuit and the light sensing circuit ([0072], [0076], e.g., a scan driver 230 outputs a gate signal to the pixel PX and the photo sensor PS); a data driver which outputs a data voltage to the pixel circuit ([0075], e.g., a data driver 220 outputs a data voltage to the pixel PX); and a sensing processor which receives a sensed signal from the light sensing circuit ([0081], e.g., the readout circuit 300 receives sensing data from the photo sensor PS), wherein a horizontal period of a normal frame, in which the sensed signal is not sensed from the light sensing circuit, is different from a horizontal period of a sensing frame in which the sensed signal is sensed from the light sensing circuit (Fig. 3; [0008], [0068]-[0069], e.g., in a first mode in which the display panel displays an image, a horizontal period of a normal frame FOM1 is about 3.2 µs. In a second mode in which the photo sensor senses a fingerprint, a horizontal period of a sensing frame FOM2 is about 12.8 µs). Regarding claim 15, Lee further discloses the display apparatus of claim 1, wherein the light sensing circuit further (Fig. 5; [0110]-[0121]) comprises: an eighth transistor including a control electrode connected to a fourth node (e.g., an eighth transistor LT1 includes a control electrode connected to a fourth node N1), a first electrode which receives a first voltage and a second electrode connected to a fifth node (e.g., a first electrode receives a first voltage Vint2 and a second electrode connected to a fifth node and LT2); a ninth transistor including a control electrode which receives a reset signal (e.g., a control electrode of a ninth transistor LT3 receives a reset signal RSTL), a first electrode which receives a reset voltage and a second electrode connected to the fourth node (e.g., a first electrode receives a reset voltage Vrst and a second electrode connected to the fourth node N1); and a tenth transistor including a control electrode which receives the gate signal (e.g., a control electrode of a tenth transistor LT2 receives the gate signal GWL1), a first electrode connected to the fifth node and a second electrode connected to a sensing line (e.g., a first electrode connected to the fifth node and a second electrode connected to a sensing line FRL), and wherein the light sensing element includes a first electrode connected to the fourth node and a second electrode which receives a second power voltage (e.g., the photo sensor PD includes a first electrode connected to the fourth node N1 and a second electrode which receives a second power voltage VSSL). Regarding claim 16, Lee further discloses the display apparatus of claim 15, wherein the pixel circuit (Fig. 5 and [0096]-[0110]) further comprises: a first transistor including a control electrode connected to a first node (e.g., a control electrode of a first transistor T1 connected to a first node), a first electrode connected to a second node and a second electrode connected to a third node (e.g., a first electrode of the T1 connected to a second node and a second electrode of T1 connected to a third node); a second transistor including a control electrode which receives the gate signal (e.g., a control electrode of a second transistor T2 receives the gate signal GCL), a first electrode which receives the data voltage and a second electrode connected to the second node (e.g., a first electrode of the T2 receives the data voltage DL and a second electrode connected to the second node); a third transistor including a control electrode which receives a compensation gate signal (e.g., a control electrode of a third transistor T3 receives a compensation gate signal GCL), a first electrode connected to the first node and a second electrode connected to the third node (e.g., a first electrode of the T3 connected to the first node and a second electrode connected to the third node); a fourth transistor including a control electrode which receives a data initialization gate signal (e.g., a control electrode of a fourth transistor T4 receives a data initialization gate signal GIL), a first electrode which receives a first initialization voltage and a second electrode connected to the first node (e.g., a first electrode of the T4 receives Vintl and a second electrode connected to the first node); a fifth transistor (e.g., T5) including a control electrode which receives an emission signal (e.g., EML), a first electrode which receives a first power voltage and a second electrode connected to the second node (e.g., a first electrode of the T5 receives VDD and a second electrode connected to the second node); a sixth transistor (e.g., T6) including a control electrode which receives the emission signal (e.g., EML), a first electrode connected to the third node and a second electrode connected to a first electrode of the light emitting element (e.g., a first electrode of the T6 connected to the third node and a second electrode connected to the first electrode of EL); and a seventh transistor (e.g., T7) including a control electrode which receives a light emitting element initialization gate signal (e.g., GWL2), a first electrode which receives a second initialization voltage (e.g., Vint1) and a second electrode connected to the first electrode of the light emitting element (e.g., connected to the first electrode of EL), and wherein a second electrode of the light emitting element receives the second power voltage (e.g., a second electrode of the EL receives the second power voltage VSSL). Regarding claim 17, Lee further discloses the display apparatus of claim 15, wherein the sensing processor (Fig. 9; [0163]-[0170]) comprises: an amplifier (e.g., the amplifier 310) including a first input terminal connected to the sensing line (e.g., first input terminal (-) connected to FRL), a second input terminal which receives a reference voltage (e.g., a second input terminal (+) receives Vin) and an output terminal (e.g., Vout); a first switch (e.g., the feedback reset switch SWRO) connected between the first input terminal of the amplifier and the output terminal of the amplifier; a first capacitor (e.g., the feedback capacitor Cfb) connected between the first input terminal of the amplifier and the output terminal of the amplifier; an analog-to-digital converter (e.g., the AD converter 330) including a first input node and a second input node; a second switch (e.g., SW1) connected between the output terminal of the amplifier and the first input node of the analog-to-digital converter; and a third switch (e.g., SW2) connected between the output terminal of the amplifier and the second input node of the analog-to-digital converter. Regarding claim 18, Lee discloses a method of driving a display apparatus (Figs 1-2; [0058], e.g., a display device 1), the method comprising: outputting a gate signal to a pixel circuit including a light emitting element and a light sensing circuit including a light sensing element ([0059]-[0061], [0072], [0076], e.g., a scan driver 230 outputs a gate signal to a pixel including the pixel PX and the photo sensor PS); outputting a data voltage to the pixel circuit ([0075], e.g., a data driver 220 outputs a data voltage to the pixel PX); and receiving a sensed signal from the light sensing circuit ([0081], e.g., the readout circuit 300 receives sensing data from the photo sensor PS), wherein a horizontal period of a normal frame, in which the sensed signal is not sensed from the light sensing circuit, is different from a horizontal period of a sensing frame in which the sensed signal is sensed from the light sensing circuit (Fig. 3; [0008], [0068]-[0069], e.g., in a first mode in which the display panel displays an image, a horizontal period of a normal frame FOM1 is about 3.2 µs. In a second mode in which the photo sensor senses a fingerprint, a horizontal period of a sensing frame is about 12.8 µs). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 20 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0154411) in view of Park et al. (US 2023/0326404). Regarding claim 20, Lee discloses an electronic apparatus (Figs 1-2; [0058], e.g., an electronic device 1) comprising: a display panel (e.g., display panel 10) comprising a pixel circuit including a light emitting element and a light sensing circuit including a light sensing element ([0059]-[0061], e.g., a pixel circuit includes a light emitting element EL and a photo sensor PS); a gate driver which outputs a gate signal to the pixel circuit and the light sensing circuit ([0072], [0076], e.g., a scan driver 230 outputs a gate signal to the pixel PX and the photo sensor PS); a data driver which outputs a data voltage to the pixel circuit ([0075], e.g., a data driver 220 outputs a data voltage to the pixel PX); a sensing processor which receives a sensed signal from the light sensing circuit ([0081], e.g., the readout circuit 300 receives sensing data from the photo sensor PS); a driving controller which controls the gate driver and the data driver ([0072], e.g., the timing controller 210 controls the scan driver 230, the data driver 220); and a processor which outputs input image data and an input control signal to the driving controller ([0066], e.g., a processor 100 outputs an image signal and control signals to the timing controller 210), wherein a horizontal period of a normal frame, in which the sensed signal is not sensed from the light sensing circuit, is different from a horizontal period of a sensing frame in which the sensed signal is sensed from the light sensing circuit (Fig. 3; [0008], [0068]-[0069], e.g., in a first mode in which the display panel displays an image, a horizontal period of a normal frame FOM1 is about 3.2 µs. In a second mode in which the photo sensor senses a fingerprint, a horizontal period of a sensing frame is about 12.8 µs). Lee does not specifically disclose wherein the driving controller controls the sensing processor. However, Park discloses an electronic apparatus (Fig. 3; [0074], e.g., a display device DD) comprising: a display panel (e.g., display panel DP) comprising a pixel circuit including a light emitting element and a light sensing circuit including a light sensing element (Fig. 6; [0081], e.g., a pixel circuit includes a light emitting element ED and a light sensor FX); a gate driver which outputs a gate signal to the pixel circuit and the light sensing circuit (Fig. 1; [0077], e.g., a scan driver 300 outputs a gate signal to the pixel PX and the light sensor FX); a data driver which outputs a data voltage to the pixel circuit ([0076], e.g., a data driver 200 outputs a data voltage to the pixel PX); a sensing processor which receives a sensed signal from the light sensing circuit ([0089], e.g., the readout circuit 500 receives sensing data from the light sensor FX); and a driving controller which controls the gate driver, the data driver and the sensing processor ([0075], [0089], e.g., the drive controller 100 controls the scan driver 300, the data driver 200 and the readout circuit 500). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use the teachings of Park in the invention of Lee for receiving a read control signa from a driving controller in order to read sensing signals from sensing lines in response to the read control signal. Allowable Subject Matter Claims 2-14 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim (US 2024/0029658) discloses a display apparatus comprising: a display panel comprising a pixel circuit including a light emitting element and a light sensing circuit; a scan driver configured to sequentially output scan write signals to scan write lines in response to a scan control signal; a read-out circuit configured to receive light sensing signals of optical sensors from sensing lines in response to a first sampling signal; and a timing controller configured to control the scan driver and the read-out circuit, wherein an interval between pulses of the first sampling signal has a first horizontal period, and an interval between pulses of each of the scan write signals has a second horizontal period, wherein the first horizontal period is longer than the second horizontal period. Jo et al. (US 2023/0069681) discloses a display apparatus comprising: a display panel comprising a non-sensing area and a sensing area, wherein one frame includes a first horizontal period corresponding to the non-sensing period and a second horizontal period corresponding to the sensing area. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HONG ZHOU whose telephone number is (571)270-5372. The examiner can normally be reached 9:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BENJAMIN C LEE can be reached at 571-272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HONG ZHOU/Primary Examiner, Art Unit 2629
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Prosecution Timeline

Mar 03, 2025
Application Filed
Jan 20, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
94%
With Interview (+17.5%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 876 resolved cases by this examiner. Grant probability derived from career allow rate.

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