Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending in this action.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/05/2025 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims of U.S. Patent No. 11,853,599. Although the claims at issue are not identical, they are not patentably distinct from each other because the limitations of the pending claims are almost completely included in patented claims.
Instant Application
US 11,853,599 (for example)
As per claim 1:
An information processing system comprising: a memory system including a non-volatile memory and a controller that includes
a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and
As per claim 1:
A memory system comprising: a non-volatile memory; and a controller that includes a first memory
… control the non-volatile memory and write log data to the first memory, the log data including a history of commands for controlling the memory system,
…
As per claim 11:
A computer system comprising:
a memory system including a non-volatile memory and
a controller that includes a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and …
As per claim 1:
A memory system comprising: a non-volatile memory; and a controller that includes a first memory
… control the non-volatile memory and write log data to the first memory, the log data including a history of commands for controlling the memory system, …
As per claim 14:
A method of controlling a memory system including a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non- volatile memory;
As per claim 18:
A method of controlling a memory system including a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non- volatile memory;
As per claim 1:
A memory system comprising: a non-volatile memory; and a controller that includes a first memory
… control the non-volatile memory and write log data to the first memory, the log data including a history of commands for controlling the memory system,
The US patent 11,853,599 (see in figure 18 and columns 13-14, starting at line 30 of col 18) discloses that as a result of comparison, when the transmitted value and the expected value do not match, the information processing terminal 5 transmits an operation stop signal to the memory system 1. It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate the method of Patent 11,853,599 of comparing the expected value and transmitted value into the system in order to prevent further transmission in comparison does not match the expected transmission value.
The US patent 11,853,599 (in figure 20 and columns 14-15, starting at line 20) discloses that the external environmental information and error correction code is written … to the NAND flash memory, thereby the failure analysis becomes easier. The NAND flash memory 2 is easily affected by the external environment such as temperature and voltage when writing. It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate the method of Patent 11,853,599 of writing external environmental information such as temperature and voltage into the system so that to make the failure analysis of input data become easier.
Claims 1-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims of copending Application No 18/501,943 (reference application). This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Instant Application
Co-Pending Application 18/501,943
As per claim 1:
An information processing system comprising: a memory system including a non-volatile memory and a controller that includes
a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and
As per claim 1:
A method of controlling a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non-volatile memory; writing the log data from the first memory…
As per claim 11:
A computer system comprising:
a memory system including a non-volatile memory and
a controller that includes a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and …
As per claim 1:
A method of controlling a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non-volatile memory; writing the log data from the first memory…
As per claim 14:
A method of controlling a memory system including a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non- volatile memory;
As per claim 1:
A method of controlling a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non-volatile memory; writing the log data from the first memory…
As per claim 18:
A method of controlling a memory system including a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non- volatile memory;
As per claim 1:
A method of controlling a non-volatile memory, the method comprising:
writing log data to a first memory, the log data including a history of commands for controlling the non-volatile memory; writing the log data from the first memory…
Co-pending Application (in figure 18 and paragraph 0097-0098) discloses that as a result of comparison, when the transmitted value and the expected value do not match, the information processing terminal 5 transmits an operation stop signal to the memory system 1. It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate the method of Patent 11,853,599 of comparing the expected value and transmitted value into the system in order to prevent further transmission in comparison does not match the expected transmission value.
Co-pending Application (in figure 20 and paragraph 0102) discloses that the external environmental information and error correction code is written … to the NAND flash memory, thereby the failure analysis becomes easier. The NAND flash memory 2 is easily affected by the external environment such as temperature and voltage when writing. It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate the method of Co-pending Application of writing external environmental information such as temperature and voltage into the system so that to make the failure analysis of input data become easier.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-10, 14-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang (US 2018/0,239,557), in view of Tousek (US 2006/0,179,380)
As per claim 1:
Yang discloses:
An information processing system comprising:
a memory system including a non-volatile memory and a controller that includes
(Yang, [0074] … controller 1210 may include a host interface unit 1211, a control unit 1212, a random access memory 1213, an error correction code (ECC) unit 1214, and a memory interface unit 1215)
a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and
(Yang, [0040] The memory cell region 110 may include a user data area UDA, a metadata area MDA and a history data area HDA which may be divided depending on a use or the kind of data to be stored)
(Yang, [0052] At step S110, the nonvolatile memory device 100 may receive a command and an address from the external device, for example, the controller 200 of FIG. 6)
(Yang, [0053] At step S120, the nonvolatile memory device 100 may store the received command and address in the history data area HDA….the nonvolatile memory device 100 may perform … of storing the history data)
Yang does not disclose:
an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value.
Tousek discloses:
an information processing device configured to store an expected value and
(Tousek [0025] The DBG 13 … support to allow an external debugger 14 to communicate…)
(Tousek [0034] a debugger … may send a memory address and a corresponding expected value to the DBG 300. The DBG 300 .. to receive …the corresponding expected value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
to transmit a signal that instructs the memory system to stop when a value of the log data (Touse, an actual memory value) transmitted from the memory system does not match the expected value. (Tousek, expected value)
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate Tousek’s method of sending a stop signal in order to notifying the external system when the actual value does not match the expected value as indicated by the host.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 2:
Yang-Tousek discloses:
wherein the information processing device is further configured to compare the expected value and transmitted value.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 3:
Yang-Tousek discloses:
wherein the expected value and the transmitted value are based on the log data of the memory system.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 4:
Yang-Tousek discloses:
Wherein the information processing device is configured to acquire the log data from the memory system during a normal operation of the memory system.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 5:
Yang-Tousek discloses:
wherein the information processing device compares the expected value and transmitted value in response to satisfaction of a first trigger condition.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 6:
Yang-Tousek discloses:
wherein the first trigger condition is that a value of a timer is a first value.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 7:
Yang-Tousek discloses:
wherein the first trigger condition is a request from the information processing device to the controller.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 8:
Yang-Tousek discloses:
wherein the log data is written each time the controller issues a command to the non-volatile memory.
(Yang, [0049], command CMD instructing a read or erase operation and an address ADD where the read)
(Yang, [0040] The memory cell region 110 may include a user data area UDA, a metadata area MDA and a history data area HDA which may be divided depending on a use or the kind of data to be stored)
(Yang, [0052] At step S110, the nonvolatile memory device 100 may receive a command and an address from the external device, for example, the controller 200 of FIG. 6)
(Yang, [0053] At step S120, the nonvolatile memory device 100 may store the received command and address in the history data area HDA….the nonvolatile memory device 100 may perform … of storing the history data)
As per claim 9:
Yang-Tousek discloses:
wherein commands issued by the controller include a command to the non-volatile memory, the command including an instruction of a write operation, an erase operation, or a read operation.
(Yang, [0049], command CMD instructing a read or erase operation and an address ADD where the read)
(Yang, [0040] The memory cell region 110 may include a user data area UDA, a metadata area MDA and a history data area HDA which may be divided depending on a use or the kind of data to be stored)
(Yang, [0052] At step S110, the nonvolatile memory device 100 may receive a command and an address from the external device, for example, the controller 200 of FIG. 6)
(Yang, [0053] At step S120, the nonvolatile memory device 100 may store the received command and address in the history data area HDA….the nonvolatile memory device 100 may perform … of storing the history data)
As per claim 10:
Yang-Tousek discloses:
wherein the expected value is read from the non-volatile memory.
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
Claims 14-17 recite similar limitation as claims 1-10. See rejection above also.
As per claim 14:
Yang discloses:
A method of controlling a memory system including a non-volatile memory, the method comprising:
(Yang, [0074] … controller 1210 may include a host interface unit 1211, a control unit 1212, a random access memory 1213, an error correction code (ECC) unit 1214, and a memory interface unit 1215)
writing log data to a first memory, the log data including a history of commands for controlling the non- volatile memory;
(Yang, [0040] The memory cell region 110 may include a user data area UDA, a metadata area MDA and a history data area HDA which may be divided depending on a use or the kind of data to be stored)
(Yang, [0052] At step S110, the nonvolatile memory device 100 may receive a command and an address from the external device, for example, the controller 200 of FIG. 6)
(Yang, [0053] At step S120, the nonvolatile memory device 100 may store the received command and address in the history data area HDA….the nonvolatile memory device 100 may perform … of storing the history data)
Yang does not disclose:
storing an expected value; determining that a value of the log data does not match the expected value; and in response to determining that the value of the log data does not match the expected value, transmitting a signal that instructs the memory system to stop.
Tousek discloses:
storing an expected value; determining that a value of the log data does not match the expected value; and
(Tousek [0025] The DBG 13 … support to allow an external debugger 14 to communicate…)
(Tousek [0034] a debugger … may send a memory address and a corresponding expected value to the DBG 300. The DBG 300 .. to receive …the corresponding expected value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
in response to determining that the value of the log data does not match the expected value, transmitting a signal that instructs the memory system to stop.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
It would have been obvious before the effective filing date of the claimed to a person having ordinary skill in the art to incorporate Tousek’s method of sending a stop signal in order to notifying the external system when the actual value does not match the expected value as indicated by the host.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 15:
Yang-Tousek discloses:
wherein the expected value and the value of the log data are calculated based on the log data.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 16:
Yang-Tousek discloses:
comparing the expected value and the value of the log data in response to satisfaction of a first trigger condition.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
As per claim 17:
Yang-Tousek discloses:
wherein the first trigger condition is that a value of a timer is a first value.
(Tousek [0038] trigger a halt of SUD execution (an execution stop) by sending a logical 1 to a "DBG_STOP" register 318 when there is a mismatch between an expected memory value and an actual memory value)
(Tousek [0039] The "not equal comparator" 310 may show a logical 1 when the data in the DBG_DATA register 308 (the expected value) does not match the data in the MEM_WDATA signal 307 (the actual value))
Allowable Subject Matter
Claims 11-13, 18-20 are allowed if Applicant can overcome the rejection above.
The following is an examiner’s statement of reasons for allowance:
The prior arts of record do not disclose “a computer system comprising:
a memory system including a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, the log data including a history of commands for controlling the memory system; and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value, wherein the controller is further configured to write environmental information including at least temperature information and voltage information of the non-volatile memory to the non-volatile memory, user data that is received from a host to the non-volatile memory, and an error correction code correcting the environmental information and the user data to the non-volatile memory” as recited in claim 11 and in similar claim 18.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Rajbharti (US 2008/0,126,662) in paragraph 0019 discloses a method of a) determining whether a pattern detection is used; b) storing start addresses for a source address and a destination address; c) if a pattern detection is used storing a pattern; …; d) reading data from the source address; e) storing data in the destination address; f) if a pattern detection is used, comparing the data with the pattern and terminating the transmission upon a match…
Li (US 2020/0,322,266) in paragraph [0111] disclose that the first device may report failure of communication of the data and may terminate communications…
Muzzetto et al (US 2024/0,038,301) in paragraph 0067 discloses a method of store different voltage offset values that correspond to different temperature ranges of the memory device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THIEN DANG NGUYEN whose telephone number is (571)272-9189. The examiner can normally be reached Monday-Friday 7 AM - 3:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached on 571-270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Thien Nguyen/ Primary Examiner, Art Unit 2111
Prosecution Insights