Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 1-3, and 5-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claims 1, 18, 19, and dependent claims thereof,
closest document related to features claimed, US 20250118254, as cited in previous office action has been disqualified as prior art pursuant to statement of common ownership filed by applicant (applicant’s argument / remarks, 02/03/26)
other related reference, US 20250391325 A1, is also commonly owned by applicant
closest cited prior art not commonly owned by applicant, Lee et al., US 20200211452 A1, discloses in general a pixel circuit comprising:
a first transistor (fig. 2, Tdr) including a control electrode connected to a first node (fig. 2, N4), a first electrode configured to be connected to a line of a high power supply voltage (fig. 2, N3, ELVDD), and a second electrode connected to a second node (fig. 2, N1); a second transistor (fig. 2 Tds) including a control electrode configured to receive a data write gate signal (fig. 2, SC1(n)), a first electrode connected to a data line configured to provide a data voltage (fig. 2, DL, Vdata), and a second electrode connected to the second node (fig. 2, N1); a third transistor (fig. 2, Til) including a control electrode configured to receive a reset gate signal (fig. 2, SC1(n)), a first electrode connected to the first node (fig. 2, N4), and a second electrode connected to a third node (fig. 2, VL, Vini);
however, none of cited prior art disclose alone or in combination as a whole:
a first capacitor including a first electrode connected to the second node and a second electrode connected to the first node; a second capacitor including a first electrode connected to the third node and a second electrode connected to a fourth node; and a light emitting element including an anode connected to the fourth node and a cathode connected to a line of a low power supply voltage, in combination with connection relationship of electrodes of first/second/third transistors, and first/second/third nodes as claimed.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4, which depends on claims 1 and 2, recites: “the pixel circuit of claim 2, further comprising:
a fifth transistor configured to selectively connect the second electrode of the first transistor and the second node based on a first emission signal”.
It is noted the term of “selectively connect” based on a control signal, under plain meaning, indicate that the claimed transistor may connect or disconnect the second node and the second electrode of the first transistor.
However, claim 1 already require that the second node and the second electrode of the first transistor to be connected, as in: “a first transistor including a control electrode connected to a first node, a first electrode configured to be connected to a line of a high power supply voltage, and a second electrode connected to a second node”.
Hence, the full scope of claim 1 cover the instance wherein the second node is constantly connected with the second electrode of the first transistor, yet the scope of claim 4, by reciting “selectively”, cover the instance wherein the second node is not connected with the second electrode of the first transistor. The feature of claim 4 therefore partly contradict with feature of claim 1, and the scope of claim 4 is indefinite with regard to connection status of corresponding parts.
Furthermore, reviewing corresponding disclosure, the claimed fifth transistor correspond to transistor T5 in fig. 2, it is noted that transistor T5 is connected between the claimed first electrode of the first transistor T1 and high power supply voltage ELVDD, and no transistor is disposed between the second electrode of the first transistor Tr1 and the second node N2
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PEIJIE SHEN whose telephone number is (571)272-5522. The examiner can normally be reached Monday - Friday 10AM - 6PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Patrick Edouard can be reached at 5712727603. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PEIJIE SHEN/Examiner, Art Unit 2622
/PATRICK N EDOUARD/Supervisory Patent Examiner, Art Unit 2622
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