DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I (claims1-11) in the reply filed on 02/26/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2, 4-5, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Narla et al. (US 2016/0315498) in view of Tang et al. (CN114884202).
Regarding claim 1, Narla teaches A Virtual Synchronous Condenser System (see figures 1-9) comprising a surge power source/sink (fig. 1@ 120) connected to a low-voltage bus (see figure 1: a connecting between Battery 120 and DC/DC converter 118), boost converter (fig. 1@ 118) connected between the low-voltage bus and a medium-voltage bus (see figure 1: a connecting between DC/DC converter 118 and 112), boost converter (fig. 1@ DC/DC converter 112) connected between the medium-voltage bus and a first bus (see figure 1: a connecting between DC/DC converter 112 and capacitor), boost converter (fig. 1@ DC/DC converter 106) connected between a first bus and a bridge bus (see figure 1: a connecting between capacitor and 102), a buck inverter (fig. 1@ DC/AC inverter 108) connected across the bridge bus that produces an AC power waveform on a power circuit (DC/AC inverter converts DC to AC power waveform).
However, Narla does not explicitly teach multiple bi-boost converter and a fast-dump circuit connected across that power circuit.
Tang teaches multiple bi-boost converter and a fast-dump circuit connected across that power circuit (see Abstract “an uninterruptible power supply device, which comprises a first quick switch, a first bidirectional converter, an energy storage unit, a second bidirectional converter and a second quick switch which are connected in sequence”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla with the teachings of Tang by having multiple bi-boost converter and a fast-dump circuit connected across that power circuit in order to controlling energy release, optimizing efficiency, reliability, and scalability.
Regarding claim 2, the combination teaches wherein the surge power source/sink is a battery (Battery 120), (see figure 1; Narla).
Regarding claim 4, the combination teaches wherein a bulk storage battery (120) is connected to the medium-voltage bus (see figure 1; Narla).
Regarding claim 5, the combination teaches wherein a renewable energy resource (fig. 1@ PV 102) is connected to the first bus (see figure 1; Narla).
Regarding claim 11, the combination teaches a balancer-based power optimizer circuits (fig. 1@ Multiple MPPT) that interface to PV panels (102) within an array (see figure 1; Narla).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Narla et al. (US 2016/0315498) in view of Tang et al. (CN114884202) and further in view of Zhu et al. (CN106787707).
Regarding claim 3, the combination teaches the apparatus of claim one, but does not explicitly teach wherein the surge power source/sink is a supercapacitor bank.
Zhu teaches the surge power source/sink is a supercapacitor bank (see figure 14: supercapacitor [Uc]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla and Tang with the teachings of Zhu by having the surge power source/sink is a supercapacitor bank in order to provides high-speed transient management, load leveling, system protection, and enhanced reliability.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Narla et al. (US 2016/0315498) in view of Tang et al. (CN114884202) and further in view of Averbukh et al. (US 2016/0327007).
Regarding claim 6, the combination teaches the apparatus, but not explicitly teach wherein the power source/sink is an external automotive starter battery.
Averbukh teaches the power source/sink is an external automotive starter battery (see Abstract “The ultracapacitor-based power source is suitable for backup starting of a starter powered by a starter battery”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla with the teachings of Tang by having the power source/sink is an external automotive starter battery in order to provides reliable backup power, protects the primary battery, and enables operation of accessories without compromising vehicle starting ability.
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Narla et al. (US 2016/0315498) in view of Tang et al. (CN114884202) and further in view of Ou et al. (US 2015/0036390).
Regarding claim 7, the combination teaches the apparatus, but does not explicitly teach wherein a bi-boost stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially even intervals of a switching period.
Ou teaches a bi-boost stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially even intervals of a switching period, (see figure 2A; and Abstract and par. [0024] “During the bidirectional mode, energy is delivered from the primary circuit side to the secondary circuit side and from the secondary circuit side to the primary circuit side. The synchronous rectifiers are driven using a specified duty cycle or on-time instead of varying the duty cycle with the inductor current”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla and Tang with the teachings of Ou by having a bi-boost stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially even intervals of a switching period in order to operate the synchronous rectifiers synchronously with the primary switches when inductor current at the inductor is greater than or equal to a reference inductor current, and operate the synchronous rectifiers in a bidirectional mode when the inductor current is less than the reference inductor current, wherein energy is delivered from the primary side to the secondary side and from the secondary side to the primary side during the bidirectional mode.
Regarding claim 8, the combination teaches the apparatus, but does not explicitly teach wherein an inverter stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially at even intervals of a switching period.
Ou teaches an inverter stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially at even intervals of a switching period (see figure 2A; and Abstract and par. [0024]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla and Tang with the teachings of Ou by having an inverter stage comprises a plurality of inductor-isolated half-bridge circuits that change a switch state at substantially at even intervals of a switching period in order to provides higher power density, improved efficiency, and reduced RMS capacitor current.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Narla et al. (US 2016/0315498) in view of Tang et al. (CN114884202) and further in view of Orr et al. (US 2016/0329715).
Regarding claim 10, the combination teaches the apparatus, but does not explicitly teach further comprising a plurality of PV-panel rapid-shutdown circuits that interface to PV panels within an array.
Orr teaches a plurality of PV-panel rapid-shutdown circuits that interface to PV panels within an array (see figure 2B and par. [0047-0053]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Narla and Tang with the teachings of Orr by having a plurality of PV-panel rapid-shutdown circuits that interface to PV panels within an array in order to optimize energy harvest and performance.
Allowable Subject Matter
Claim 9 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XUAN LY whose telephone number is (571)272-9885. The examiner can normally be reached M-F 9am-5pm.
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/XUAN LY/Examiner, Art Unit 2836
/REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836