DETAILED ACTION
This action is responsive to the application filed on 3/11/2025. Claims 1-20 are pending and have been examined. This action is Non-final.
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
Claim Rejections – 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 9-15 are rejected under 35 U.S.C. 101 because the claimed inventions are directed to non-statutory subject matter.
As per claim 9, the claim limitation recites, “A computer-readable medium storing instructions executable by at least one processor”. However, the use of “computer-readable medium” is broad enough to include “non-transitory” and “transitory” media. The specification does not further limit the utilization to a non-statutory computer-readable medium. Therefore, the broadest reasonable interpretation of the claim covers a signal per se, and the claim must be rejected under 35 U.S.C. § 101 as covering non-statutory subject matter. See In re Nuijten, 500 F.3d 1346, 1356-57 (Fed. Cir. 2007) (transitory embodiments are not directed at statutory subject matter).
The examiner suggests that the applicant amend the limitation to state “A non-transitory computer-readable medium” as to correct the issue.
Claims 10-15 are similarly rejected for the same reasons as claim 9 above.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321 or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminel-disclaimer.
Claims 1 and 2 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 2 of U.S. Patent No. 12,248,784. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the reference patent comprise the same limitations as the examined claims, and/or more specific and therefore anticipate the examined claims. See the table below for illustration of claims 1 and 2:
Examined Application 19/075,937
Reference Patent 12,248,784
A device comprising:
a bias value generator circuit configured to supply a set of bias values in a range;
a pipeline;
and a circuit coupled to the pipeline and the bias value generator circuit and configured to:
receive a first instruction that specifies the range of the set of bias values;
receive a second instruction that specifies an operation;
and based on the first instruction and the second instruction, cause the pipeline to perform iterations of the operation, wherein each of the iterations of the operation utilizes a respective bias value of the set of bias values.
An electronic device comprising:
a bias value generator circuit having a counter register, the bias value generator circuit configured to supply a set of bias values in a range;
a pipeline register;
an instruction circuit coupled to the pipeline register and the bias value generator circuit and configured to:
receive a first instruction that specifies the range of the bias value generator circuit;
receive a second instruction having an operand;
and repeatedly issue the second instruction to the pipeline register by providing a set of instructions to the pipeline register that each include a micro-opcode based on the second instruction and a respective operand based on the operand of the second instruction and on a respective bias value of the set of bias values;
and a scan controller coupled to the counter register and the pipeline register.
The device of claim 1, wherein the first instruction further specifies a count of the iterations of the operation.
2. The electronic device of claim 1, wherein the first instruction further specifies a number of instructions in the set of instructions.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(b) the invention was patented or described in a printed publication in this or a foreign country or in public use or on sale in this country, more than one year prior to the date of application for patent in the United States.
Claim(s) 1-2, 9-11, 16 and 19 is/are rejected under pre-AIA 35 U.S.C. 102(b) as being anticipated by Masse, PGPUB No. 2003/0093656.
In regard to claim 1, Masse discloses A device (See Fig. 1 and [0037]) comprising: a bias value generator circuit configured to supply a set of bias values in a range ([0091-0093]: wherein combination of loop counter register and decrement unit(elements 922 and 924) are the bias value generator supplying a set of bias values (counter values) in a range set by the value in the CSR register) a pipeline ([0020, 0094]: wherein a pipeline is disclosed (also see Figs. 5 and 10-11)) and a circuit coupled to the pipeline and the bias value generator circuit ([0091-0096]: wherein circuitry is coupled to the pipeline and the loop counter register and decrement unit (elements 922 and 924, e.g. bias value generator circuit) (See figs. 5 and 10-11) and configured to: receive a first instruction that specifies the range of the set of bias values ([0086-0087 and 0094]: wherein the repeat instruction specifies the range of the set of bias values (e.g. the CSR register setting the number of times to repeat next instruction) receive a second instruction that specifies an operation ([0082, 0089 and 0094-0096]: wherein a multiply accumulate instruction is disclosed) and based on the first instruction and the second instruction, cause the pipeline to perform iterations of the operation, wherein each of the iterations of the operation utilizes a respective bias value of the set of bias values. ([0089-0096]: wherein the pipeline performs iterations of the multiply accumulate operation, wherein each of the iterations utilizes a respective count value of the set of count values. Wherein the loop counter dictates the number of iterations (e.g. counter values that decrement and stop iterations at 0) of the operation thus each iteration is "utilizing" (e.g. making use of) said counter values)
Claim 9 is similarly rejected on the same basis as claim 1 above as claim 9 is the computer readable medium corresponding to the device of claim 1 above. (See [0005 and Figs. 1, 5 and 7]: for discussion of memory storing computer readable program instructions)
Claim 16 is similarly rejected on the same basis as claim 1 above as claim 16 is the method corresponding to the device of claim 1 above.
In regard to claim 2, Masse discloses The device of claim 1 (see rejection of claim 1 above) wherein the first instruction further specifies a count of the iterations of the operation. ([0087 and 0094-0096])
Claim 10 is similarly rejected on the same basis as claim 2 above as claim 10 is the computer readable medium corresponding to the device of claim 2 above.
Claim 19 is similarly rejected on the same basis as claim 2 above as claim 19 is the method corresponding to the device of claim 2 above.
In regard to claim 11, Masse discloses The computer-readable medium of claim 10 (see rejection of claim 10 above) wherein the first instruction includes a field that specifies both the set of bias values and the count of the iterations. ([0087 and 0094-0096]: wherein the field indicates a count of iterations and the count values indicated by the count of iterations are the set of bias values. Thus, the field indicates both the set of bias values and the count of iterations)
Claim Rejections - 35 USC § 103
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 15 and 20 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Masse, and further in view of NPL reference, “TMS320C55x DSP Mnemonic Instruction Set Reference Guide” hereby referred to as DSP.
In regard to claim 15, Masse discloses The computer-readable medium of claim 9 (see rejection of claim 9 above).
Masse does not disclose wherein the operation includes either a push or a pop operation. Masse discloses the repeatable operation including a multiply accumulate, but not a push or pop.
DSP discloses a repeatable operation including either a push or pop (pages 5-356 to 5-357 and pages 5-365 to 5-367)
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the device of Masse which repeats instruction operations to repeat push or pop operations as taught in DSP. It would have been obvious to one of ordinary skill in the art because it would have been the simple substitution of one known element (repeating a push or pop operation as taught in DSP) for another (repeating other types of instructions as taught in Masse) to yield predictable results (repeating a push or pop operation following a repeat instruction) for the benefit of added flexibility (MPEP 2143, Example B).
Claim 20 is similarly rejected on the same basis as claim 15 above as claim 20 is the method corresponding to the computer-readable medium of claim 15 above.
Allowable Subject Matter
Claims 3-8 and 17-18 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all the limitations of the base claim and any intervening claims.
Claims 12-14 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 101, set forth in this Office action and to include all the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject
matter:
The prior art of record, alone or in combination, fail to disclose or render obvious
claim 3 filed on 3/11/2025. The prior art of record has not taught either individually or in
combination and together with all other claimed features “…a set of registers, wherein: the second instruction specifies a first indicator of a first register of the set of registers; and each of the iterations of the operation utilizes a respective register of the set of registers associated with a function of the first indicator and the respective bias value of the set of bias values” as claimed in claim 3.
The closest prior art of record, Masse discloses a multiply accumulate operation which uses a set of registers (AR1 and AR2) and each iteration utilizes the set of registers associated with the set of bias values. However, Masse does not disclose “…wherein: the second instruction specifies a first indicator of a first register of the set of registers; and each of the iterations of the operation utilizes a respective register of the set of registers associated with a function of the first indicator and the respective bias value of the set of bias values” as claimed.
Furthermore, while some limitations may be broadly disclosed in the references
above and in the pertinent art section below, the specific combination of limitations
would not be obvious as claimed absent impermissible hindsight.
Claims 12 and 17-18 are similarly rejected on the same basis as claim 3 above.
Claims 4-6 and 13-14 are dependent upon one of claims 3 and 12 above and
therefore, are similarly allowable for the same reasons as claims 3 and 12.
13. The following is a statement of reasons for the indication of allowable subject
matter:
The prior art of record, alone or in combination, fail to disclose or render obvious claim 7 filed on 3/11/2025. The prior art of record has not taught either individually or in combination and together with all other claimed features “…a set of registers, wherein: the operation is a pop operation; and each of the iterations of the operation utilizes a respective destination register of the set of registers that is based on the respective bias value of the set of bias values” as claimed in claim 7.
The closest prior art of record, DSP discloses push and pop instructions which can be repeated following a repeat instruction, however the push and pop instructions repeat each iteration using the same register, and not respective registers of a set of registers for each iteration. Thus, DSP does not disclose “…wherein: the operation is a pop operation; and each of the iterations of the operation utilizes a respective destination register of the set of registers that is based on the respective bias value of the set of bias values” as claimed.
Furthermore, while some limitations may be broadly disclosed in the references
above and in the pertinent art section below, the specific combination of limitations
would not be obvious as claimed absent impermissible hindsight.
Claim 8 is similarly rejected on the same basis as claim 7 above.
Conclusion
14. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Zou, PGPUB No. 2004/0044885 for teaching string operations that include a repeat prefix to repeat a number of iterations of operations using both iteration remaining and iteration done counters. Wherein offsets are used to access memory elements using iteration done counter
15. Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY P SPANN whose telephone number is (571)431-0692. The examiner can normally be reached M-F, 9am-6pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/COURTNEY P SPANN/Primary Examiner, Art Unit 2183
Prosecution Insights