DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. 15/077,009, filed on 22 March 2016.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 14 March 2025 is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites “wherein the second conductive layer, the third conductive layer, and the fourth conductive layer are provided under the second insulating layer.” However, claim 13, from which claim 14 depends, recites “a second conductive layer in direct contact with the second insulating layer…a third conductive layer in direct contact with the second insulating layer…a fourth conductive layer in direct contact with the second insulating layer; a third insulating layer over and in direct contact with the second conductive layer, the third conductive layer, and the fourth conductive layer…” Thus, due to the direct contact nature of claim 13, it is unclear how the second, third and fourth conductive layers can be under both of the second and third insulating layers while also somehow in direct contact with both the second and third insulating layers.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-5, 7-11, 13 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2011/0228188) in view of Chen et al. (US 2011/0025969).
Regarding claim 1, Kim et al. disclose a display device (Figure 5) comprising:
a semiconductor layer over a substrate, the semiconductor layer comprising a channel formation region (Figure 5, semiconductor layer 113 is over substrate 101. See paragraph [0053].);
a first conductive layer comprising a region configured to serve as a gate electrode (Figure 5, 120 is a first conductive layer that serves as a gate electrode. See paragraph [0054].);
a first insulating layer comprising a region configured to serve as a gate insulating layer (Figure 5, 116 is a first insulating layer that serves as a gate insulating layer. See paragraph [0054].);
a second insulating layer over the first insulating layer and the semiconductor layer (Figure 5, 140 is a second insulating layer over 116 and 113. See paragraph [0058].);
a second conductive layer in contact with the second insulating layer, the second conductive layer comprising a region configured to serve as a source electrode (Figure 5, 133 is a second conductive layer in contact with 140, where 133 serves as a source electrode. See paragraph [0052].);
a third conductive layer in contact with the second insulating layer, the third conductive layer comprising a region configured to serve as a drain electrode (Figure 5, 136 is a third conductive layer in contact with 140, where 136 serves as a drain electrode. See paragraph [0052].);
a fourth conductive layer in contact with the second insulating layer (Figure 5, 130 is a fourth conductive layer in contact with 140. See paragraph [0056].);
a third insulating layer over the second conductive layer and the third conductive layer (Figure 5, 145 is a third insulating layer over 133 and 136. See paragraph [0058].);
a fifth conductive layer over the third insulating layer, the fifth conductive layer comprising a region configured to serve as one electrode of a touch sensor (Figure 5, Ysl/150 is a fifth conductive layer over 145, where Ysl serves as one electrode of a touch sensor. See paragraphs [0047]-[0049].);
a fourth insulating layer over the fifth conductive layer (Figure 5, 155 is a fourth insulating layer over Ysl/150.); and
a sixth conductive layer over the fourth insulating layer, the sixth conductive layer comprising a region configured to serve as a pixel electrode (Figure 5, 160 is a sixth conductive layer over 155, where 160 serves as a pixel electrode. See paragraph [0063].),
wherein the first conductive layer and the semiconductor layer overlap each other (Figure 5 shows 120 and 113 overlap each other.),
wherein the fourth conductive layer is electrically connected to the fifth conductive layer (Figure 5, 130 is electrically connected to Ysl/150. See paragraph [0060].),
wherein the sixth conductive layer comprises a slit (Figure 5 shows pixel electrode 160 comprises a slit. See also Figure 4.), and
wherein the sixth conductive layer is electrically connected to one of the second conductive layer and the third conductive layer (Figure 5, 160 is connected to 136 through the drain contact hole 157. See paragraph [0063].).
Kim et al. fail to teach wherein the second conductive layer, the third conductive layer, and the fourth conductive layer comprise the same material.
Chen et al. disclose wherein a second conductive layer, a third conductive layer, and a fourth conductive layer comprise the same material (Paragraph [0021]).
Therefore, it would have been obvious to “one of ordinary skill” in the art before the effective filing date of the claimed invention to use the teachings of Chen et al. to make the second conductive layer, the third conductive layer, and the fourth conductive layer taught by Kim et al. comprise the same material. The motivation to combine would have been in order to reduce manufacturing time by forming the elements in the same fabrication process, thus easing manufacturing and cost.
Regarding claim 2, Kim et al. and Chen et al. disclose the display device according to claim 1, wherein the second conductive layer, the third conductive layer, and the fourth conductive layer are provided under the second insulating layer (Kim et al.: Figure 5, 133, 136 and 130 are all under 140.).
Regarding claim 3, Kim et al. and Chen et al. disclose the display device according to claim 1, further comprising a coloring layer over the sixth conductive layer (Kim et al.: Figure 5, the color filter layer 175 [coloring layer] is over 160. See paragraph [0065].).
Regarding claim 4, Kim et al. and Chen et al. disclose the display device according to claim 1, wherein the sixth conductive layer is provided in an opening of the fourth insulating layer (Kim et al.: Figure 5 shows 155 [fourth insulating layer] has a dip, i.e. “opening” where 160 [sixth conductive layer] is provided.).
Regarding claim 5, Kim et al. and Chen et al. disclose the display device according to claim 1, wherein the sixth conductive layer is in direct contact with a top surface of the one of the second conductive layer and the third conductive layer (Kim et al.: Figure 5, 160 is in direct contact [through the contact hole] with a top surface of 136.).
Regarding claim 7, Kim et al. disclose a display device (Figure 5) comprising:
a semiconductor layer over a substrate, the semiconductor layer comprising a channel formation region (Figure 5, semiconductor layer 113 is over substrate 101. See paragraph [0053].);
a first conductive layer comprising a region configured to serve as a gate electrode (Figure 5, 120 is a first conductive layer that serves as a gate electrode. See paragraph [0054].);
a first insulating layer comprising a region configured to serve as a gate insulating layer (Figure 5, 116 is a first insulating layer that serves as a gate insulating layer. See paragraph [0054].);
a second insulating layer over the first insulating layer and the semiconductor layer (Figure 5, 140 is a second insulating layer over 116 and 113. See paragraph [0058].);
a second conductive layer in contact with the second insulating layer, the second conductive layer comprising a region configured to serve as a source electrode (Figure 5, 133 is a second conductive layer in contact with 140, where 133 serves as a source electrode. See paragraph [0052].);
a third conductive layer in contact with the second insulating layer, the third conductive layer comprising a region configured to serve as a drain electrode (Figure 5, 136 is a third conductive layer in contact with 140, where 136 serves as a drain electrode. See paragraph [0052].);
a fourth conductive layer in contact with the second insulating layer (Figure 5, 130 is a fourth conductive layer in contact with 140. See paragraph [0056].);
a third insulating layer over the second conductive layer, the third conductive layer, and the fourth conductive layer (Figure 5, 145 is a third insulating layer over 133, 136 and 130. See paragraph [0058].);
a fifth conductive layer over the third insulating layer, the fifth conductive layer comprising a region configured to serve as one electrode of a touch sensor (Figure 5, Ysl/150 is a fifth conductive layer over 145, where Ysl serves as one electrode of a touch sensor. See paragraphs [0047]-[0049].);
a fourth insulating layer over the fifth conductive layer (Figure 5, 155 is a fourth insulating layer over Ysl/150.); and
a sixth conductive layer over the fourth insulating layer, the sixth conductive layer comprising a region configured to serve as a pixel electrode (Figure 5, 160 is a sixth conductive layer over 155, where 160 serves as a pixel electrode. See paragraph [0063].),
wherein the first conductive layer and the semiconductor layer overlap each other (Figure 5 shows 120 and 113 overlap each other.),
wherein the fourth conductive layer is electrically connected to the fifth conductive layer (Figure 5, 130 is electrically connected to Ysl/150. See paragraph [0060].),
wherein the sixth conductive layer comprises a slit (Figure 5 shows pixel electrode 160 comprises a slit. See also Figure 4.), and
wherein the sixth conductive layer is electrically connected to one of the second conductive layer and the third conductive layer (Figure 5, 160 is connected to 136 through the drain contact hole 157. See paragraph [0063].).
Kim et al. fail to teach wherein the second conductive layer, the third conductive layer, and the fourth conductive layer comprise the same material.
Chen et al. disclose wherein a second conductive layer, a third conductive layer, and a fourth conductive layer comprise the same material (Paragraph [0021]).
Therefore, it would have been obvious to “one of ordinary skill” in the art before the effective filing date of the claimed invention to use the teachings of Chen et al. to make the second conductive layer, the third conductive layer, and the fourth conductive layer taught by Kim et al. comprise the same material. The motivation to combine would have been in order to reduce manufacturing time by forming the elements in the same fabrication process, thus easing manufacturing and cost.
Regarding claim 8, this claim is rejected under the same rationale as claim 2.
Regarding claim 9, this claim is rejected under the same rationale as claim 3.
Regarding claim 10, this claim is rejected under the same rationale as claim 4.
Regarding claim 11, this claim is rejected under the same rationale as claim 5.
Regarding claim 13, Kim et al. disclose a display device (Figure 5) comprising:
a semiconductor layer over a substrate, the semiconductor layer comprising a channel formation region (Figure 5, semiconductor layer 113 is over substrate 101. See paragraph [0053].);
a first conductive layer comprising a region configured to serve as a gate electrode (Figure 5, 120 is a first conductive layer that serves as a gate electrode. See paragraph [0054].);
a first insulating layer comprising a region configured to serve as a gate insulating layer (Figure 5, 116 is a first insulating layer that serves as a gate insulating layer. See paragraph [0054].);
a second insulating layer over the first insulating layer and the semiconductor layer (Figure 5, 123 is a second insulating layer over 116 and 113. See paragraph [0055].);
a second conductive layer in direct contact with the second insulating layer, the second conductive layer comprising a region configured to serve as a source electrode (Figure 5, 133 is a second conductive layer in direct contact with 123, where 133 serves as a source electrode. See paragraph [0052].);
a third conductive layer in direct contact with the second insulating layer, the third conductive layer comprising a region configured to serve as a drain electrode (Figure 5, 136 is a third conductive layer in direct contact with 123, where 136 serves as a drain electrode. See paragraph [0052].);
a fourth conductive layer in direct contact with the second insulating layer (Figure 5, 130 is a fourth conductive layer in direct contact with 123. See paragraph [0056].);
a third insulating layer over and in direct contact with the second conductive layer, the third conductive layer, and the fourth conductive layer (Figure 5, 140/145 is a third insulating layer over and in contact with 133, 136 and 130. See paragraph [0058].);
a fifth conductive layer over and in direct contact with the third insulating layer, the fifth conductive layer comprising a region configured to serve as one electrode of a touch sensor (Figure 5, Ysl/150 is a fifth conductive layer over and in direct contact with 145, where Ysl serves as one electrode of a touch sensor. See paragraphs [0047]-[0049].);
a fourth insulating layer over and in direct contact with the fifth conductive layer (Figure 5, 155 is a fourth insulating layer over and in contact with Ysl/150.); and
a sixth conductive layer over and in direct contact with the fourth insulating layer, the sixth conductive layer comprising a region configured to serve as a pixel electrode (Figure 5, 160 is a sixth conductive layer over and in direct contact with 155, where 160 serves as a pixel electrode. See paragraph [0063].),
wherein the first conductive layer and the semiconductor layer overlap each other (Figure 5 shows 120 and 113 overlap each other.),
wherein the fourth conductive layer is electrically connected to the fifth conductive layer (Figure 5, 130 is electrically connected to Ysl/150. See paragraph [0060].),
wherein the sixth conductive layer comprises a slit (Figure 5 shows pixel electrode 160 comprises a slit. See also Figure 4.), and
wherein the sixth conductive layer is electrically connected to one of the second conductive layer and the third conductive layer (Figure 5, 160 is connected to 136 through the drain contact hole 157. See paragraph [0063].).
Kim et al. fail to teach wherein the second conductive layer, the third conductive layer, and the fourth conductive layer comprise the same material.
Chen et al. disclose wherein a second conductive layer, a third conductive layer, and a fourth conductive layer comprise the same material (Paragraph [0021]).
Therefore, it would have been obvious to “one of ordinary skill” in the art before the effective filing date of the claimed invention to use the teachings of Chen et al. to make the second conductive layer, the third conductive layer, and the fourth conductive layer taught by Kim et al. comprise the same material. The motivation to combine would have been in order to reduce manufacturing time by forming the elements in the same fabrication process, thus easing manufacturing and cost.
Regarding claim 15, this claim is rejected under the same rationale as claim 3.
Regarding claim 16, this claim is rejected under the same rationale as claim 4.
Regarding claim 17, this claim is rejected under the same rationale as claim 5.
Claims 6, 12 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2011/0228188) in view of Chen et al. (US 2011/0025969) and further in view of Kim et al. (US 2012/0218199).
Regarding claim 6, Kim et al. (US 2011/0228188) and Chen et al. disclose the display device according to claim 1.
Kim et al. (US 2011/0228188) and Chen et al. fail to teach wherein the first insulating layer is provided over the first conductive layer.
Kim et al. (US 2012/0218199) discloses wherein a gate insulating layer [first insulating layer] is provided over the gate electrode [first conductive layer] (Paragraph [0064] and Figure 8B.).
Thus, the combination of Kim et al. (US 2011/0228188) and Chen et al., and Kim et al. (US 2012/0218199) each disclose a display device comprising a gate insulating layer and a gate electrode. A person of ordinary skill in the art before the effective filing date of the claimed invention would have recognized that the order of the gate insulating layer and a gate electrode [first insulating layer is over the first conductive layer] of Kim et al. (US 2012/0218199) could have been substituted for the order of the gate insulating layer and a gate electrode [first conductive layer over the first insulating layer] of the combination of Kim et al. (US 2011/0228188) and Chen et al. because both allow for the precise voltage control over pixel switching. Furthermore, a person of ordinary skill in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing precise voltage control over pixel switching.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the order of the gate insulating layer and a gate electrode [first insulating layer is over the first conductive layer] of Kim et al. (US 2012/0218199) for the order of the gate insulating layer and a gate electrode [first conductive layer over the first insulating layer] of the combination of Kim et al. (US 2011/0228188) and Chen et al. according to known methods to yield the predictable result of providing a gate insulating layer and a gate electrode.
Regarding claim 12, this claim is rejected under the same rationale as claim 6.
Regarding claim 18, this claim is rejected under the same rationale as claim 6.
Conclusion
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/STEPHEN G SHERMAN/Primary Examiner, Art Unit 2621
25 February 2026