Prosecution Insights
Last updated: April 19, 2026
Application No. 19/078,112

DISPLAY DEVICE INCLUDING A LIGHT-EMITTING ELEMENT

Non-Final OA §103
Filed
Mar 12, 2025
Examiner
LUBIT, RYAN A
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
63%
Grant Probability
Moderate
1-2
OA Rounds
2y 4m
To Grant
99%
With Interview

Examiner Intelligence

Grants 63% of resolved cases
63%
Career Allow Rate
476 granted / 756 resolved
+1.0% vs TC avg
Strong +39% interview lift
Without
With
+38.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
18 currently pending
Career history
774
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
45.3%
+5.3% vs TC avg
§102
19.9%
-20.1% vs TC avg
§112
23.1%
-16.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 756 resolved cases

Office Action

§103
DETAILED ACTION Status of the Application 1. Applicant’s Response to Election / Restriction filed December 16, 2025 is received and entered. 2. Applicant elected, without traverse, Species B directed to FIG. 7 and identified claims 1, 2, 4 – 10, and 17 – 22. Accordingly, claims 3 and 11 – 16 are withdrawn. Additionally, as will be explained below, claims 8 – 10 and 17 – 19 are also withdrawn as being directed to non-elected embodiments. 3. Claims 3 and 8 – 19 are withdrawn. Claims 1 – 2, 4 – 7, and 20 – 22 are pending and are under examination in this action. 4. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election / Restriction 5. Applicant elected, without traverse, Species B directed to FIG. 7. However, Applicant identified claims 8 – 10 and 17 – 19 as belonging to Species B, which is erroneous. Claims 8 – 10 and 17 – 19 require “a sensing circuit”. However, the feature of “a sensing circuit” is only encompassed by non-elected species’ A, F, and G (see FIGS. 1, 16, and 17). Accordingly, claims 8 – 10 and 17 – 19 are directed to non-elected embodiments and are therefore also withdrawn from consideration. The requirement for election is FINAL. Drawings 6. The drawings are objected to because element 110 in FIG. 7 is labeled as a “panel driver” while it should be labeled as a “display panel”. This needs to be corrected to be consistent with the rest of the specification and drawings. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 8. Claims 1, 4, and 21 – 22 are rejected under 35 U.S.C. 103 as being unpatentable over Jang as evidenced by Gai et al. (U.S. Pub. 2023/0410729). Regarding claim 1, Jang teaches: a display device (FIG. 1; paragraph [0041]; display device 100) comprising: a display panel comprising data lines, sensing lines, and pixels connected to the data lines and the sensing lines and comprising a light-emitting element (FIGS. 1, 2; paragraphs [0042], [0043], [0060], [0061]; display panel 110 includes subpixels SP, each of which includes a data lines DL, a sensing line RVL, and a light emitting diode OLED); and a panel driver configured to provide a scan signal and a sensing signal to the pixels (FIGS. 1, 2; paragraphs [0042], [0065], [0067]; the combination of controller 140, gate driving circuit 120, data driving circuit 130, and any other elements that provide signals to the display panel 110 together are interpreted as a “panel driver”. This “panel driver” provides scan signal SCAN to gate line GL of pixel SP and provides sensing signal SEN to sensing line SL of pixel SP), to provide data voltages to the pixels through the data lines (FIGS. 1, 2; paragraph [0065]; the “panel driver” provides data voltage Vdata to pixel SP via data line DL), to provide an initialization voltage to an anode of the light-emitting element through the sensing lines (FIG. 2; paragraph [0060], [0061]; OLED implicitly includes an anode connected to node N2 and a cathode connected to VSS because it is well-known and conventional for VSS to be connected to a cathode of a light emitting element. The “panel driver” provides an initialization voltage Vini to the anode of OLED via second transistor T2), to provide a first power supply voltage to the pixels (FIG. 2; paragraph [0061]; the “panel driver” provides a driving voltage VDD to driving voltage line DVL of pixel SP), and to provide a second power supply voltage to a cathode of the light-emitting element of the pixels (FIG. 2; paragraph [0070]; the “panel driver” provides base voltage VSS to the cathode of OLED of pixel SP), wherein the light-emitting element is configured to be initialized based on a voltage difference between the initialization voltage and the second power supply voltage (FIG. 2; paragraphs [0067], [0070]; this particular arrangement is provided for the purpose of initializing the OLED using the voltage difference between the initialization voltage Vini and the base voltage VSS. This arrangement and usage is well-known and conventional in the art with regard to application of initialization voltages to anodes of a light emitting element). Jang fails to explicitly disclose: the initialization is based on the voltage difference being less than a turn-on voltage of the light-emitting element by a margin voltage. However, Gai teaches that an initialization voltage is less than a turn-on voltage of an LED to ensure the LED does not turn on during the initialization stage (paragraph [0048]). When this well-known and conventional teaching is applied to Jang, it is clear that a voltage difference between Vini and VSS of Jang should be less than a turn-on voltage of the OLED in order to ensure that the OLED does not inadvertently turn-on during the initialization stage. The voltage difference must be less than the turn-on voltage of the OLED by at least a minimum threshold [margin voltage] to ensure proper operation during initialization where the OLED remains turned-off. It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the known teachings of Jang using the well-known and conventional teachings of Gai to yield predictable results. More specifically, it would have been obvious to use the specific description of the comparative voltage values applied during an initialization stage to ensure a diode does not turn on too early, as disclosed by Gai, in the device of Jang to fill in the gaps as to the relative voltage values so that the device of Jang operates as disclosed, i.e., the OLED is initialized via an initialization voltage. In other words, it would have been obvious to look to well-known teachings, such as those provided by Gai, to ensure proper driving voltages and operation of an OLED during an initialization stage. Such a modification of Jang requires nothing more than using well-known and conventional teachings in known ways to merely fill in the gaps of Jang in a manner that would have been obvious to a person of ordinary skill in the art. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the known teachings of Jang using the well-known and conventional teachings of Gai to yield the aforementioned predictable results. Regarding claim 4, Jang teaches: wherein the pixels (FIG. 2; paragraph [0060]; pixel SP) comprise: a capacitor comprising a first electrode connected to a gate node, and a second electrode connected to a source node (FIG. 2; paragraphs [0062], [0068]; first storage capacitor Cst includes a first electrode connected to gate node N1 and source node N2); a first transistor comprising a gate connected to the gate node, a first terminal configured to receive the first power supply voltage, and a second terminal connected to the source node (FIG. 2; paragraphs [0062], [0063]; driving [first] transistor DRT includes a gate connected to gate node N1, a first terminal connected to driving voltage VDD, and a second terminal connected to source node N2); a second transistor configured to connect a corresponding one of the data lines to the gate node in response to the scan signal (FIG. 2; paragraph [0065]; “second” transistor T1 connects data line DL to the gate node N1 in response to scan signal SCAN); a third transistor configured to connect a corresponding one of the sensing lines to the source node in response to the sensing signal (FIG, 2; paragraph [0067]; “third” transistor T2 connects sensing line RVL to source node N2 in response to sensing signal SEN); and the light-emitting element comprising the anode connected to the source node, and the cathode configured to receive the second power supply voltage (FIG. 2; paragraphs [0063], [0070]; OLED includes the anode connected to source node N2 and the cathode that receives base voltage VSS). Regarding claim 21, Jang teaches: an electronic device comprising a display device (FIG. 1; paragraph [0041]; display device 100) comprising: a display panel comprising data lines, sensing lines, and pixels connected to the data lines and the sensing lines and comprising a light-emitting element (FIGS. 1, 2; paragraphs [0042], [0043], [0060], [0061]; display panel 110 includes subpixels SP, each of which includes a data lines DL, a sensing line RVL, and a light emitting diode OLED); and a panel driver configured to provide a scan signal and a sensing signal to the pixels (FIGS. 1, 2; paragraphs [0042], [0065], [0067]; the combination of controller 140, gate driving circuit 120, data driving circuit 130, and any other elements that provide signals to the display panel 110 together are interpreted as a “panel driver”. This “panel driver” provides scan signal SCAN to gate line GL of pixel SP and provides sensing signal SEN to sensing line SL of pixel SP), to provide data voltages to the pixels through the data lines (FIGS. 1, 2; paragraph [0065]; the “panel driver” provides data voltage Vdata to pixel SP via data line DL), to provide an initialization voltage to an anode of the light-emitting element through the sensing lines (FIG. 2; paragraph [0060], [0061]; OLED implicitly includes an anode connected to node N2 and a cathode connected to VSS because it is well-known and conventional for VSS to be connected to a cathode of a light emitting element. The “panel driver” provides an initialization voltage Vini to the anode of OLED via second transistor T2), to provide a first power supply voltage to the pixels (FIG. 2; paragraph [0061]; the “panel driver” provides a driving voltage VDD to driving voltage line DVL of pixel SP), and to provide a second power supply voltage to a cathode of the light-emitting element of the pixels (FIG. 2; paragraph [0070]; the “panel driver” provides base voltage VSS to the cathode of OLED of pixel SP), wherein the light-emitting element is configured to be initialized based on a voltage difference between the initialization voltage and the second power supply voltage (FIG. 2; paragraphs [0067], [0070]; this particular arrangement is provided for the purpose of initializing the OLED using the voltage difference between the initialization voltage Vini and the base voltage VSS. This arrangement and usage is well-known and conventional in the art with regard to application of initialization voltages to anodes of a light emitting element). Jang fails to explicitly disclose: the initialization is based on the voltage difference being less than a turn-on voltage of the light-emitting element by a margin voltage. However, Gai teaches that an initialization voltage is less than a turn-on voltage of an LED to ensure the LED does not turn on during the initialization stage (paragraph [0048]). When this well-known and conventional teaching is applied to Jang, it is clear that a voltage difference between Vini and VSS of Jang should be less than a turn-on voltage of the OLED in order to ensure that the OLED does not inadvertently turn-on during the initialization stage. The voltage difference must be less than the turn-on voltage of the OLED by at least a minimum threshold [margin voltage] to ensure proper operation during initialization where the OLED remains turned-off. It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the known teachings of Jang using the well-known and conventional teachings of Gai to yield the aforementioned predictable results. Regarding claim 22, Jang fails to explicitly disclose: wherein the electronic device comprises a smartphone, a television, a monitor, a tablet, an electric vehicle, a mobile phone, a tablet personal computer (PC), a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, an ultra-mobile PC (UMPC), a laptop computer, a billboard, an Internet of Things (loT) device, a smartwatch, a watch phone, or a head-mounted display (HMD). However, it was well-known and conventional to apply such display device teachings to an array of electronic devices including a smartphone, television, tablet, notebook computer, smart glasses, etc. See paragraph [0099] of Gia. It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to simply apply the known teachings of Jang to exemplary display devices of Gai to yield predictable results. Put simply, it is well-known and conventional that the teachings of Jang are applicable to a slew of electronic devices that includes displays. 9. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Gai, as applied to claim 1 above, in further view of Jin et al. (U.S. Pub. 2020/0243012). Regarding claim 2, neither Jang nor Gai explicitly disclose: wherein the initialization voltage is positive, and the second power supply voltage is negative. However, in a related field of endeavor, Jin discloses a display device with a display pixel 22 that includes an initialization voltage Vini that is provided to an anode of a diode 304 while a ground power supply voltage ELVSS is provided to a cathode of diode 304 (FIG. 4; paragraphs [0040], [0041]). With regard to claim 2, Jin teaches: wherein the initialization voltage is positive (FIG. 4; paragraph [0041]; initialization voltage Vini is a positive voltage), and the second power supply voltage is negative (FIG 4; paragraph [0040]; ground power supply voltage ELVSS may be a negative voltage). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang, Gai, and Jin to yield predictable results. More specifically, it would have been obvious to use the specific examples of initialization and base/ground voltages disclosed by Jin to fill in the gaps of Jang as to the specific voltage range that may be applicable in order for the pixel circuit disclosed by Jang to perform as disclosed. In other words, it would have been obvious to look to known teachings of similar circuitry having similar functionality, such as those provided by Jin, in order to fill in the gaps of Jang as to the particular voltage types and ranges that would be applicable to both ends of the OLED to operate as described. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the combination of Jang and Gai using the well-known and conventional teachings of Jin to yield the aforementioned predictable results. 10. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Gai, as applied to claim 1 above, in further view of Kim et al. (U.S. Pub. 2022/0199017) and Chung et al. (U.S. Pub. 2023/0178031). Regarding claim 5, neither Jang nor Gai explicitly disclose: wherein the panel driver comprises: a first voltage generator configured to generate the first power supply voltage, which is positive, based on a first input voltage; and a second voltage generator configured to generate the second power supply voltage, which is negative, based on the first input voltage. However, Kim teaches: wherein the panel driver comprises: a first voltage generator configured to generate the first power supply voltage based on a first input voltage (FIG. 1; paragraph [0047]; power supply 180 includes a first component [first voltage generator] that generates a first power at a high level that is output to first power line EVDD based on an external [first] input voltage); and a second voltage generator configured to generate the second power supply voltage, which is negative, based on the first input voltage (FIG. 1; paragraph [0047]; power supply 180 includes a second component [second voltage generator] that generates a second power at a low level that is output to second power line EVSS based on the external [first] input voltage). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang, Gai, and Kim to yield predictable results. More specifically, it would have been obvious to fill in the gaps of Jang as to how the power supply voltages VDD and VSS are generated by using the specific power supply of Kim to exemplify how components thereof may generate both VDD and VSS based on an external input voltage. In other words, it would have been obvious to look to known teachings of similar devices generating similar power voltages, such as those provided by Kim, in order to fill in the gaps of Jang as to how the power voltages thereof are known to be generated in the art. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the combination of Jang and Gai using the well-known and conventional teachings of Kim to yield the aforementioned predictable results. Neither Jang nor Gai nor Kim explicitly disclose: the first power supply voltage is positive and the second power supply voltage is negative. However, in a related field of endeavor, Chung discloses a display device with a display pixel PX that includes an initialization voltage that is provided to an anode of a light emitting element LD while a second power voltage ELVSS is provided to a cathode of light emitting element LD (FIG. 2; paragraphs [0056], [0064]). With regard to claim 5, Chung teaches: the first power supply voltage is positive (FIG. 7; paragraph [0093]; the first power voltage ELVDD is greater than a ground voltage. It was well-known and conventional before the effective filing date of Applicant’s claimed invention for a ground voltage to be 0V. Accordingly, first power supply voltage ELVDD is a positive voltage) and the second power supply voltage is negative (FIG. 7; paragraph [0093]; the second power voltage ELVSS is less than the ground voltage and is therefore a negative voltage). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang, Gai, Kim, and Chung to yield predictable results. More specifically, it would have been obvious to use the specific examples of voltage levels and timings for the first and second power voltages disclosed by Chung to fill in the gaps of Jang as to the specific relative voltages and timings that may be applicable in order for the pixel circuit disclosed by Jang to perform as disclosed during a display frame. In other words, it would have been obvious to look to known teachings of similar circuitry having similar functionality, such as those provided by Chung, in order to fill in the gaps of Jang as to the particular relative voltages and timings that would be applicable to both ends of the OLED to operate as described. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the combination of Jang, Gai, and Kim, using the well-known and conventional teachings of Chung to yield the aforementioned predictable results. Regarding claim 6, neither Jang nor Gai nor Kim explicitly disclose: wherein, in a power-on period of the display device, the second power supply voltage is configured to be activated, and the first power supply voltage is configured to be activated thereafter. However, Chung teaches: wherein, in a power-on period of the display device, the second power supply voltage is configured to be activated, and the first power supply voltage is configured to be activated thereafter (FIG. 7; paragraph [0092]; before and after power-on, i.e., in a power-on period, second power voltage ELVSS is activated before time TM3 before first power voltage ELVDD is activated between time TM3 and TM4). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang, Gai, Kim, and Chung to yield predictable results for at least the reasons set forth above with regard to claim 5. Regarding claim 7, neither Jang nor Gai nor Kim explicitly disclose: wherein, in a power-off period of the display device, the first power supply voltage is configured to be deactivated, and the second power supply voltage is configured to be deactivated thereafter. However, Chung teaches: wherein, in a power-off period of the display device, the first power supply voltage is configured to be deactivated, and the second power supply voltage is configured to be deactivated thereafter (FIG. 7; paragraph [0092]; before and after power-off, i.e., in a power-off period, first power voltage ELVDD is activated between time T_PWR_OFF and TM1 before second power voltage ELVSS is activated at time TM2). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang, Gai, Kim, and Chung to yield predictable results for at least the reasons set forth above with regard to claim 5. 11. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Jin. Regarding claim 20, Jang teaches: a display device (FIG. 1; paragraph [0041]; display device 100) comprising: a display panel comprising data lines, sensing lines, and pixels connected to the data lines and the sensing lines and comprising a light-emitting element (FIGS. 1, 2; paragraphs [0042], [0043], [0060], [0061]; display panel 110 includes subpixels SP, each of which includes a data lines DL, a sensing line RVL, and a light emitting diode OLED); and a panel driver configured to provide a scan signal and a sensing signal to the pixels (FIGS. 1, 2; paragraphs [0042], [0065], [0067]; the combination of controller 140, gate driving circuit 120, data driving circuit 130, and any other elements that provide signals to the display panel 110 together are interpreted as a “panel driver”. This “panel driver” provides scan signal SCAN to gate line GL of pixel SP and provides sensing signal SEN to sensing line SL of pixel SP), to provide data voltages to the pixels through the data lines (FIGS. 1, 2; paragraph [0065]; the “panel driver” provides data voltage Vdata to pixel SP via data line DL), to provide an initialization voltage to an anode of the light-emitting element through the sensing lines (FIG. 2; paragraph [0060], [0061]; OLED implicitly includes an anode connected to node N2 and a cathode connected to VSS because it is well-known and conventional for VSS to be connected to a cathode of a light emitting element. The “panel driver” provides an initialization voltage Vini to the anode of OLED via second transistor T2), to provide a first power supply voltage (FIG. 2; paragraph [0061]; the “panel driver” provides a driving voltage VDD to driving voltage line DVL), and to provide a second power supply voltage to a cathode of the light-emitting element (FIG. 2; paragraph [0070]; the “panel driver” provides base voltage VSS to the cathode of OLED), wherein the light-emitting element is configured to be initialized based on the initialization voltage and the second power supply voltage (FIG. 2; paragraphs [0067], [0070]; this particular arrangement is provided for the purpose of initializing the OLED using the voltage difference between the initialization voltage Vini and the base voltage VSS. This arrangement and usage is well-known and conventional in the art with regard to application of initialization voltages to anodes of a light emitting element). Jang fails to explicitly disclose that the initialization voltage is positive and the second power supply voltage is negative. However, Jin teaches: the initialization voltage is positive (FIG. 4; paragraph [0041]; initialization voltage Vini is a positive voltage) and the second power supply voltage is negative (FIG 4; paragraph [0040]; ground power supply voltage ELVSS may be a negative voltage). It would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to combine the known teachings of Jang and Jin to yield predictable results. More specifically, it would have been obvious to use the specific examples of initialization and base/ground voltages disclosed by Jin to fill in the gaps of Jang as to the specific voltage range that may be applicable in order for the pixel circuit disclosed by Jang to perform as disclosed. In other words, it would have been obvious to look to known teachings of similar circuitry having similar functionality, such as those provided by Jin, in order to fill in the gaps of Jang as to the particular voltage types and ranges that would be applicable to both ends of the OLED to operate as described. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of Applicant’s claimed invention to modify the known teachings of Jang using the well-known and conventional teachings of Jin to yield the aforementioned predictable results. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN A LUBIT whose telephone number is (571)270-3389. The examiner can normally be reached M - F, ~6am - 3pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached at 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RYAN A LUBIT/Primary Examiner, Art Unit 2626
Read full office action

Prosecution Timeline

Mar 12, 2025
Application Filed
Jan 16, 2026
Non-Final Rejection — §103
Apr 14, 2026
Applicant Interview (Telephonic)
Apr 14, 2026
Examiner Interview Summary

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