Prosecution Insights
Last updated: August 16, 2026
Application No. 19/078,733

ELECTRONIC DEVICE

Non-Final OA §102§103
Filed
Mar 13, 2025
Priority
Mar 26, 2024 — JP 2024-050362
Examiner
KRIM, PETER
Art Unit
Tech Center
Assignee
Denso Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
96 granted / 115 resolved
+23.5% vs TC avg
Moderate +6% lift
Without
With
+6.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
39 currently pending
Career history
144
Total Applications
across all art units

Statute-Specific Performance

§103
49.9%
+9.9% vs TC avg
§102
28.6%
-11.4% vs TC avg
§112
20.2%
-19.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 115 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: Coupling Device for Stacking Circuit Boards. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-6, and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Watanabe (US 6249442; “Watanabe” hereinafter). Regarding claim 1, Watanabe discloses: an electronic device comprising: a first circuit board (3, fig. 1); a second circuit board (5, fig. 1); a first housing member (2, fig. 1) disposed between the first circuit board and the second circuit board and to which the first circuit board is attached (fig. 1, col. 3, lines 61-65); and a second housing member (1 and 8, fig. 1) disposed between the first circuit board and the second circuit board (fig. 1) and to which the first housing member and the second circuit board are attached (fig. 1), wherein the first housing member includes a first positioning part (2d-2e), the first positioning part has a first board positioning portion (2e) that positions the first housing member and the first circuit board (“the holes 3a of the first printed circuit board 3 are fitted on the mounting projections 2d and the first printed circuit board is put on the pedestal portions 2e”, col. 3, lines 61-64), and a first housing positioning portion (2d) that positions the first housing member and the second housing member (fig. 1), the second housing member includes a second positioning part (1d-1e, 8), the second positioning part has a second board positioning portion (1d) that positions the second housing member and the second circuit board (fig. 1), and a second housing positioning portion (1e and 8) that engages with the first housing positioning portion (fig. 1) to position the first housing member and the second housing member (fig. 1, col. 4, lines 5-13), and the first board positioning portion, the first housing positioning portion, the second board positioning portion, and the second housing positioning portion are arranged on a same straight line (see annotated fig. 1 below). PNG media_image1.png 254 662 media_image1.png Greyscale Regarding claim 3, Watanabe discloses the limitations of claim 1, and further discloses: wherein the first positioning part and a base portion (2a) of the first housing member are composed of an integral member (fig. 1, col. 3, lines 24-32), and the second positioning part and a base portion (1a) of the second housing member are composed of an integral member (fig. 1, col. 3, lines 36-43). Regarding claim 4, Watanabe discloses the limitations of claim 1, and further discloses: wherein at least one of the first board positioning portion, the second board positioning portion, or the second housing positioning portion has a shape that protrudes from a peripheral area thereof and has a circular cross-sectional shape (fig. 1, col. 3, lines 44-45). Regarding claim 5 Watanabe discloses the limitations of claim 1, and further discloses: wherein the first housing member has two of the first positioning parts, and the second housing member has two of the second positioning parts (fig. 1 discloses the limitations of claim 1). Regarding claim 6, Watanabe discloses the limitations of claim 1, and further discloses: wherein the first circuit board includes a first connector (4, fig. 1), and the second circuit board includes a second connector (6) connected to the first connector (fig. 1). Regarding claim 9, Watanabe discloses the limitations of claim 6, and further discloses: wherein the first positioning part and the second positioning part are configured to enable the first housing member and the first circuit board to be positioned relative to each other (fig. 1) and the second housing member and the second circuit board to be positioned relative to each other (fig. 1), before the first connector and the second connector are connected to each other (as disclosed upon examination of fig. 1 and col. 4, lines 5-21, where the first and second housing member, and hole 5a must be aligned with each, before the first connector and the second connector are connected to each other, to enable mounting of said housing members with each other). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Watanabe in view of Ady et al (US 6215667; “Ady” hereinafter). Regarding claim 2, Watanabe discloses the limitations of claim 1, but does not explicitly teach: wherein at least one of the first positioning part or the second positioning part is composed of a separate member from a base portion of a corresponding one of the first housing member or the second housing member. However, Ady teaches: a first positioning part (16, figs. 1-3) is composed of a separate member from a base portion (38, fig. 1) of a first housing member (30, fig. 1). It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the first positioning part of Watanabe, with Ady’s teaching such that the first positioning part is composed of a separate member from a base portion of the first housing member, in order to expedite changing the size of the PCB mounting hole opening to be made to effect a change in the first circuit board vertical position in the first housing member housing, thereby avoiding expensive and time-consuming changes that are usually required when the position of the first circuit board needs to be changed to accommodate component reconfigurations and the like (see abstract). Furthermore, it has been held that constructing a formerly integral structure in various elements involves only routine skill in the art (MPEP § 2144.04). Allowable Subject Matter Claims 7-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 7, the prior art of record taken alone or in combination, fails to teach or fairly suggest, in combination with other limitations recited in claim 1, a combination of limitations that teaches: wherein the first housing member has a first side wall disposed on a periphery of the first circuit board, and the first board positioning portion has a tip portion at a position higher than the first side wall. None of the reference art of record discloses or renders obvious such a combination. Regarding claim 8, the prior art of record taken alone or in combination, fails to teach or fairly suggest, in combination with other limitations recited in claim 1, a combination of limitations that teaches: wherein the second housing member has a second side wall disposed on a periphery of the second circuit board, and the second board positioning portion has a tip portion at a position higher than the second side wall. None of the reference art of record discloses or renders obvious such a combination. Conclusion The prior art made of record and not relied upon is: US 12248339 B2 Electronic Apparatus. This invention relates generally to a housing which has an opening in one face, a cover member which is detachably coupled to the housing and closes the opening in the housing, a first board which is housed in the housing, a second board which is supported to the cover member, a first connector which is mounted on the first board and is fixed to the housing relatively and a second connector which is mounted on the second board, is supported to the cover member in a floating state and is connected with the first connector in a state that the cover member is coupled to the housing. US 12082361 B2 Electronic Device. This invention generally relates to a housing, first and second wiring substrates disposed to face each other, a fixing member that is made of an electrically conductive member and fixes the first and second wiring substrates to each other, and an external connection terminal provided in the housing. The fixing member has first and second fixing portions, and is interposed between the first and second wiring substrate. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER KRIM whose telephone number is (703)756-1246. The examiner can normally be reached 8:00am -4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allen L Parker can be reached at (303) 297-4722. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALLEN L PARKER/Supervisory Patent Examiner, Art Unit 2841 /P.K./Examiner, Art Unit 2841
Read full office action

Prosecution Timeline

Mar 13, 2025
Application Filed
Aug 03, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12697924
ELECTRONIC UNIT FOR A VEHICLE AND MANUFACTURING METHOD
2y 10m to grant Granted Aug 04, 2026
Patent 12690168
MEMORY SUB-SYSTEM ENCLOSURE
2y 4m to grant Granted Jul 21, 2026
Patent 12679287
DISPLAY DEVICE AND VEHICLE INCLUDING THE SAME
2y 5m to grant Granted Jul 14, 2026
Patent 12677383
HOUSING AND ELECTRONIC DEVICE
2y 6m to grant Granted Jul 07, 2026
Patent 12677389
IN-VEHICLE DEVICE
2y 0m to grant Granted Jul 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
90%
With Interview (+6.2%)
2y 4m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 115 resolved cases by this examiner. Grant probability derived from career allowance rate.

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