Prosecution Insights
Last updated: October 23, 2026
Application No. 19/080,099

MULTI-MATERIAL CARDS WITH ANTENNAS

Non-Final OA §102
Filed
Mar 14, 2025
Priority
Mar 15, 2024 — provisional 63/565,870 +1 more
Examiner
ST CYR, DANIEL
Art Unit
2876
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
JPMorgan Chase Bank, N.A.
OA Round
3 (Non-Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
1156 granted / 1422 resolved
+13.3% vs TC avg
Moderate +13% lift
Without
With
+12.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
49 currently pending
Career history
1472
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
40.9%
+0.9% vs TC avg
§102
29.8%
-10.2% vs TC avg
§112
3.0%
-37.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1422 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 9/11/26 has been entered. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4, 6-10, 12-15 and 17 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Sindelar et al, US Pub. 2024/0311602. Sindelar et al disclose transaction cards comprising: a card substrate comprising an antenna recess (the antenna may be printed to form a recess); an antenna received in the antenna recess(par. 0032); a chip opening in the antenna recess 210; a chip received in the chip opening, wherein the antenna is in electrical communication with the chip (Fig. 2A); and a non-blocking material positioned over the chip and the antenna in the antenna recess (conductive material 115 allows the electrical contact to be physical accessible); wherein the non-blocking material allows radio frequency waves to pass to the antenna, wherein the chip comprises electrical contacts that are accessible through the chip opening (Fig. 1-4; par. 0041-0051). Regarding claims 2-3, wherein the card substrate comprises a material that blocks radio frequency communication (the substrate could be of metal; par. 0047, 0051). Regarding 4, wherein the antenna comprises an antenna array (see Fig. 2A). Regarding claim 6, further comprising a magnetic stripe (see Fig. 2B; par. 0049). Regarding claims 7 and 12, in addition to the rejection of claim 1 above, the prior art discloses a first card substrate layer a second card substrate layer for installing the components and covering the components (Fig. 1B); an antenna positioned between the first card substrate layer and the second card substrate layer, the antenna located on a perimeter of the first card substrate layer and the second card substrate layer (Fig. 3); a chip opening in the first card substrate layer; and a chip received in the chip opening, wherein the antenna is in electrical communication with the chip (see par. 0041-0051). Regarding claims 8-9 and 13-14, wherein the card substrate comprises a material that blocks radio frequency communication (the substrate could be of metal; par. 0047, 0051). Regarding claims 10 and 15, wherein the antenna comprises an antenna array (see Fig. 2A). Regarding claim 17, further comprising a magnetic stripe (see Fig. 2B; par. 0049). Response to Arguments Applicant's arguments filed 5/12/26 have been fully considered but they are not persuasive. See examiner remarks. Remarks: In response to the applicant’s argument regarding claim 1, the examiner respectfully disagrees. The chip is permanently positioned within an opening in the card, in order to read information in the card through contact reading the electrical contacts must be accessible through the chip opening. When the card is inserted into a reader, the chip electrical contacts mate with the reader electrical contacts in order to exchange information, the claim requires that the chip electrical contacts to be physically accessible through the opening. The claim does not require that the electrical contacts be bare, uncovered, or free from conductive layers. The applicant’s argument is not persuasive. Regarding the applicant argument of claim 7, the examiner respectfully disagrees. The prior art teaches at least two substrates, the transaction card may be two blanks (front and back) where blanks are formed from stamping substrates, where the antenna may be inserted or formed into one of the blanks and the chip and magnetic strip may be inserted in the voids 210 and 230 (Fig. 2; par. 0050); the blanks (i.e. the substrate layers) sandwich the antenna along the card periphery. The applicant’s argument is not persuasive. Regarding the applicant’s argument of claim 12, the examiner respectfully disagrees. The prior art teaches that the antenna is formed or inserted into one of the substrates (i.e. blanks) and the other substrate has voids for receiving the chip and the magnetic stripe (par. 0050+). The applicant’s argument is not persuasive. Additional references are cited to include bare and/or exposed electrical contacts. Refer to the rejection above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL ST CYR whose telephone number is (571)272-2407. The examiner can normally be reached M to F 8:00-8:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pham Thomas can be reached at 571-272-3689. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. DANIEL ST CYR Primary Examiner Art Unit 2876 /DANIEL ST CYR/Primary Examiner, Art Unit 2876
Read full office action

Prosecution Timeline

Mar 14, 2025
Application Filed
Feb 26, 2026
Non-Final Rejection mailed — §102
May 12, 2026
Response Filed
Jun 26, 2026
Final Rejection mailed — §102
Aug 13, 2026
Response after Non-Final Action
Sep 11, 2026
Request for Continued Examination
Sep 15, 2026
Response after Non-Final Action
Oct 01, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12758358
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Patent 12762364
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
94%
With Interview (+12.8%)
2y 1m (~6m remaining)
Median Time to Grant
High
PTA Risk
Based on 1422 resolved cases by this examiner. Grant probability derived from career allowance rate.

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