DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
I. REJECTIONS BASED ON PRIOR ART
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, and 4-9 are rejected under 35 U.S.C. 103 as being unpatentable over Taylor (US Patent 4,992,933) in view of Fujii et al. (US Pub.: 2001/0018733).
As per claim 1, Taylor teaches/suggests a computing system comprising: a plurality of data bus clients (e.g. associated with plurality of processing elements: col. 3, ll. 31-59); and transfer data between bus clients, operate accordingly (Fig. 1; and col. 3, l. 31 to col. 4, l. 58).
Taylor does not teach the computing system comprising: a two-dimensional plurality of data transfer buses that operate accordingly, the data transfer buses being configurable to change the transfer path at each transfer cycle to optimize the data transfer throughput between the clients.
Fujii teaches/suggests a computing system comprising: a two-dimensional plurality of data transfer buses that operate accordingly (Fig. 7-11), the data transfer buses being configurable to change the transfer path at each transfer cycle to optimize the data transfer throughput between the clients (e.g. associated with changing programmable switching element (106) from a current state to a next state) (Fig. 1; Fig. 7-10; [0123]-[0158]; and [0184]-[0222]).
It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include Fujii’s bus architecture into Taylor’s computer system for the benefit of reducing delay to improve performance (Fujii, [0218]) to obtain the invention as specified in claim 1.
As per claim 4, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising where the data transfer buses contain a priority resolution arrangement configurable to resolve incompatible client requests (Taylor, Fig. 1; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; [0241]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
As per claim 5, Taylor and Fujii teach/suggest all the claimed features of claim 4 above, where Taylor and Fujii teach/suggest the computing system comprising wherein the priority resolution arrangement is configurable to create a single common prioritized number that causes multiple different bus path configurations to create a specific bus path (Taylor, Fig. 1; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; [0241]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
As per claim 6, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising wherein the data bus can driven by tristatable drivers (Taylor, Fig. 1; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]).
As per claim 7, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising wherein the data bus is driven by non-tristatable drivers (Taylor, Fig. 1; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
As per claim 8, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising wherein the data bus is driven by wire-ored drivers (Taylor, Fig. 1; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; [0280]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
As per claim 9, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising wherein the data bus is a serial bus (Taylor, Fig. 1; col. 2, ll. 36-41; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Taylor (US Patent 4,992,933) in view of Fujii et al. (US Pub.: 2001/0018733) applied to claim 1 above, and further in view of Mujica et al. (US Patent 10,218,644).
As per claims 2-3, Taylor and Fujii teach/suggest all the claimed features of claim 1 above, where Taylor and Fujii teach/suggest the computing system comprising: operating accordingly at the request of the clients on the bus, during each data transfer cycle (Taylor, Fig. 1; col. 2, ll. 36-41; col. 3, l. 31 to col. 4, l. 58; and Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]).
Taylor and Fujii do not teach the computing system comprising:
where the data transfer bus is configurable to be logically separated into a plurality of independent bus sections; and
where the data transfer buses are configurable to transfer between compatible multiple paths simultaneously
Mujica teach/suggest a computing system comprising: where the data transfer bus is configurable to be logically separated into a plurality of independent bus sections; and where the data transfer buses are configurable to transfer between compatible multiple paths simultaneously (col. 9, l. 51 to col. 11, l. 4).
It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include Mujica’s transmission operations into Taylor and Fujii’s computer system for the benefit of utilizing multiple communication pathways efficiently (Mujica, col. 1, ll. 30-31) to obtain the invention as specified in claims 2-3.
Claims 10 -11 are rejected under 35 U.S.C. 103 as being unpatentable over Fujii et al. (US Pub.: 2001/0018733) in view of Mujica et al. (US Patent 10,218,644).
As per claim 10, Fujii teaches/suggests a computing system comprising: a plurality of data bus clients arranged regularly in two dimensions (Fig. 1); and a bus (Fig. 7-11) that is configurable to send data from at least one source client to a destination (Fig. 1; Fig. 7-10; [0123]-[0158]; and [0184]-[0222]).
Fujii does not teach the computing system comprising: send along multiple paths to a common destination, wherein any and all paths that get the data from the at least one source to the common destination client produce a successful transfer, and wherein any transfer informs a data source of the transfer status.
Mujica teaches/suggests a computing system comprising: send along multiple paths to a common destination, wherein any and all paths that get the data from the at least one source to the common destination client produce a successful transfer, and wherein any transfer informs a data source of the transfer status (e.g. associated with transferring of data would inform that transmission was not halted) (col. 9, l. 51 to col. 11, l. 4)
It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include Mujica’s transmission operations into Fujii’s computer system for the benefit of utilizing multiple communication pathways efficiently (Mujica, col. 1, ll. 30-31) to obtain the invention as specified in claim 10.
As per claim 11, Fujii and Mujica teach/suggest all the claimed features of claim 10 above, where Fujii and Mujica further teach/suggest the computing system comprising where a failure of all paths to transfer to the destination is configurable to cause the source to wait until at least one path becomes available to transfer the data (Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; and Mujica, Fig. 7; col. 9, l. 51 to col. 11, l. 4).
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Fujii et al. (US Pub.: 2001/0018733) in view of FLEMING, JR. et al. (US Pub.: 2019/0042513).
As per claim 12, Fujii teaches/suggests a two-dimensional computing system with a layout of data clients on a common substrate, the two-dimensional computing system comprising: a four way digitally controlled switch connecting the data bus clients, wherein the two-dimensional computing system is configurable to: connect bus client data source with client data sink (Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; and [0327]-[0337]).
Fujii does not teach the two-dimensional computing system comprising: connect any two different bus client data sources with any two different client data sinks, connect any single client data source with any of the other 3 client data sinks, and connect any client data source to any client data sink through multiple data paths.
FLEMING, JR. teaches/suggests a two-dimensional computing system comprising: connect any two different bus client data sources with any two different client data sinks, connect any single client data source with any of the other 3 client data sinks, and connect any client data source to any client data sink through multiple data paths (e.g. associated with transmitting PE/Pes to send data to receiving PE/PEs: [0420]; [0423]; [0426]) ([0419]-[0426]).
It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include FLEMING, JR.’s interconnecting architecture into Fujii’s system for the benefit of implementing an e energy efficient architecture (FLEMING, JR., [0228]) to obtain the invention as specified in claim 12.
As per claim 13, Fujii and FLEMING, JR. teach/suggest all the claimed features of claim 12 above, where Fujii and FLEMING, JR. further teach/suggest the computing system comprising where a single common number from a client data source is configurable to cause successive digitally controlled switches to be differently configured in priority and in switch connections such that multiple paths are usable to get data to a destination client (Fujii, Fig. 1; Fig. 7-10; [0123]-[0158]; [0184]-[0222]; [0327]-[0337]; and FLEMING, JR., [0419]-[0426]), wherein it would have been obvious to one of ordinary skilled in the art to further implement the above claimed features.
II. CLOSING COMMENTS
CONCLUSION
STATUS OF CLAIMS IN THE APPLICATION
The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i):
CLAIMS REJECTED IN THE APPLICATION
Per the instant office action, claims 1-13 have received a first action on the merits and are subject of a first action non-final.
DIRECTION OF FUTURE CORRESPONDENCES
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN KUAN LEE whose telephone number is (571)272-0671. The examiner can normally be reached Monday-Friday.
IMPORTANT NOTE
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached on (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHUN KUAN LEE/Primary Examiner
Art Unit 2181 July 23, 2026
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