DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 6, 7, 12 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Muneshima et al. JP2015-181325A.
Figure 1 of Muneshima discloses:
(1) regarding Claim 1:
An output potential switching circuit (voltage selection circuit 4) applicable to a multilevel (5 level) inverter, and supplies multilevel potentials and switches an output potential to one of the multilevel potentials (paragraphs [0027]-[0030]), the output potential switching circuit comprising:
• a plurality (5) of semiconductor modules (2-on-1 modules) including:
• a first switching element (S1) with a first diode connected in inverse parallel,
• a second switching element (S2) with a second diode connected in inverse parallel,
• a P terminal (P) to which a positive terminal of the first switching element is connected,
• an O terminal (Out) to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and
• an N terminal (N) to which a negative terminal of the second switching element is connected,
• wherein, the P terminal of one of the semiconductor modules (S1, S2) is connected to the O terminal of an other one of the semiconductor modules (S3, S4).
(2) regarding Claim 6:
wherein the O terminal of the semiconductor module (S1, S2), to which the lowest potential of the multi-level potential is supplied to the N terminal (through S6), is connected to one phase coil of the rotating electric machine ([0027]-[0030]), and a potential of the multi-level potential higher than the potential supplied to the N terminal of the one of the semiconductor modules (S1, S2) is supplied to the N terminal of the other one of the semiconductor modules (S3, S4).
(3) regarding Claim 7:
An output potential switching circuit (voltage selection circuit 4) applicable to a multilevel (5 level) inverter, and supplies multilevel potentials and switches an output potential to one of the multilevel potentials (paragraphs [0027]-[0030]), the output potential switching circuit comprising:
• a plurality (5) of semiconductor modules (2-on-1 modules) including:
• a first switching element (S1) with a first diode connected in inverse parallel,
• a second switching element (S2) with a second diode connected in inverse parallel,
• a P terminal (P) to which a positive terminal of the first switching element is connected,
• an O terminal (Out) to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and
• an N terminal (N) to which a negative terminal of the second switching element is connected,
• wherein, the N terminal of one of the semiconductor modules (S1, S2) is connected to the O terminal of an other one of the semiconductor modules (S5, S6).
(4) regarding Claim 12:
wherein the O terminal of the semiconductor module (S1, S2), to which the highest potential of the multi-level potential is supplied to the P terminal (through S63), is connected to one phase coil of the rotating electric machine ([0027]-[0030]), and a potential of the multi-level potential lower than the potential supplied to the P terminal of the one of the semiconductor modules (S1, S2) is supplied to the P terminal of the other one of the semiconductor modules (S5, S6).
(5) regarding Claim 13:
An output potential switching circuit (voltage selection circuit 4) applicable to a multilevel (5 level) inverter, and supplies multilevel potentials and switches an output potential to one of the multilevel potentials (paragraphs [0027]-[0030]), the output potential switching circuit comprising:
• a plurality (5) of semiconductor modules (2-on-1 modules) including:
• a first switching element (S1) with a first diode connected in inverse parallel,
• a second switching element (S2) with a second diode connected in inverse parallel,
• a P terminal (P) to which a positive terminal of the first switching element is connected,
• an O terminal (Out) to which a negative terminal of the first switching element and a positive terminal of the second switching element are connected, and
• an N terminal (N) to which a negative terminal of the second switching element is connected,
• wherein, only the first diode, the first switching element, the second diode, and the second switching element are provided as elements, and no other elements are provided (See Fig 4).
Allowable Subject Matter
Claims 2-5 and 8-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The different arrangements of the semiconductor modules in relation to one another is not disclosed in the prior art or obvious to one having ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRYSTAL L HAMMOND whose telephone number is (571)270-1682. The examiner can normally be reached M-F 12pm-4pm Alt Fridays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal L Hammond can be reached at 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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