DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
I. REJECTIONS BASED ON 35 USC 101
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 15-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter.
As per claims 15-20, the claimed subject matter as stated refers to a “computer-readable storage medium”, wherein the “computer-readable storage medium”, under reasonable interpretation, can be view as an intangible subject matter. The examiner is suggesting replacing “… computer-readable storage medium …” in claims 15-20 with -… non-transitory computer-readable storage medium …-.
II. REJECTIONS BASED ON PRIOR ART
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over CHEW (US Pub.: 2024/0152482) in view of Peting et al. (US Pub.: 2012/0217950).
As per claim 1, CHEW teaches/suggests a method comprises: communicating with the second device through the SPI (Fig. 1-3; [0031]); receiving a first signal transmitted by the second device through the SPI, and in response to the first signal being a first preset status signal, transmitting first transmission data to the second device through the SPI (Fig. 3; [0031]); after finishing transmitting the first transmission data to the second device through the SPI, retransmitting with the second device through the SPI (Fig. 1-3; [0031]); and receiving a second signal returned by the second device through the SPI, and determining a status of the second device according to the second signal (Fig. 1-3; [0031]) (Fig. 1-3; [0002]; [0020]-[0037]; and [0060]-[0062]).
CHEW does not teach the method comprises: transmitting a status query signal to chip; operating with the chip, and operating accordingly with the chip; operating with chip, communicating the status query signal to the chip; and operating with chip, and operating accordingly with the chip.
Peting teaches/suggests a method comprises: transmitting a status query signal to chip (e.g. associated with transmitting status request to corresponding chip via SPI protocol: [0045]); operating with the chip, and operating accordingly with the chip; operating with chip, communicating the status query signal to the chip (e.g. associated with transmitting status request to corresponding chip via SPI protocol: [0045]); and operating with chip, and operating accordingly with the chip ([0025]-[0026]; [0033]; and [0043]-[0046]).
It would have been obvious for one of ordinary skill in this art, before the effective filing date of the claimed invention, to include Peting’s command/request into CHEW’s method for the benefit of properly conforming to SPI protocol for issuing requests ([0044]-[0045]) to obtain the invention as specified in claim 1.
As per claim 2, CHEW and Peting teach/suggest all the claimed features of claim 1 above, where CHEW and Peting further teach/suggest the method comprising: wherein determining the status of the second chip according to the second signal comprises: in response to the second signal being the first preset status signal, determining that the second chip is in a process of processing the first transmission data; or, in response to the second signal being header data of response data, determining that the second chip has finished processing the first transmission data, wherein the first transmission data comprises data carrying response data; or, in response to the second signal being a second preset status signal, determining that the first transmission data is erroneous, wherein the first transmission data comprises data carrying response data; or, in response to the second signal being a second preset status signal, determining that the second chip has finished processing the first transmission data, wherein the first transmission data does not carry response data (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 3, CHEW and Peting teach/suggest all the claimed features of claim 2 above, where CHEW and Peting further teach/suggest the method comprising: wherein after determining that the second chip is in the process of processing the first transmission data in response to the second signal being the first preset status signal, the method further comprises: continuing to transmit the status query signal to the second chip through the SPI until the header data of the response data transmitted by the second chip is received or the second preset status signal is received (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 4, CHEW and Peting teach/suggest all the claimed features of claim 1 above, where CHEW and Peting further teach/suggest the method further comprising: before the transmitting the status query signal to the second chip through the SPI; transmitting a third signal to the second chip through the SPI, wherein the third signal is used for notifying the second chip that the first transmission data is about to be transmitted to the second chip, to cause the second chip to be ready to transmit the first preset status signal (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 5, CHEW and Peting teach/suggest all the claimed features of claim 4 above, where CHEW and Peting further teach/suggest the method comprising: wherein before transmitting the third signal to the second chip through the SPI, the method further comprises: transmitting the status query signal to the second chip through the SPI, and receiving a third signal transmitted by the second chip through the SPI; and in response to the third signal being the second preset status signal, transmitting the third signal to the second chip through the SPI (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 6, CHEW and Peting teach/suggest all the claimed features of claim 5 above, where CHEW and Peting further teach/suggest the method comprising: wherein in response to the third signal not being the second preset status signal, retransmitting the status query signal to the second chip through the SPI, until the second preset status signal is received (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 7, CHEW and Peting teach/suggest all the claimed features of claim 1 above, where CHEW and Peting further teach/suggest the method comprising: wherein, the method is performed in a chip initialization stage; and/or, the first chip and the second chip are chips in a dual-core heterogeneous system (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]), wherein it would have been obvious to one of ordinary skilled in the art that the resulting combination of the references would further teach/suggest the above claimed features as the state between master and slave are synchronized.
As per claim 8, claim 8 is rejected in accordance to the same rational and reasoning as the above rejection of claim 1, where CHEW and Peting further teach/suggest the electronic device, comprising: at least one memory and at least one processor, wherein the at least one memory is used for storing program codes, and the at least one processor is used for calling the program codes stored in the at least one memory to perform a method applied at a first chip in communication connection with a second chip through a Serial Peripheral Interface (SPI) (CHEW, Fig. 1-3; [0002]; [0020]-[0037]; [0060]-[0062]; and Peting, [0025]-[0026]; [0033]; [0043]-[0046]).
As per claims 9-14, claims 9-14 are rejected in accordance to the same rational and reasoning as the above rejection of claims 2-7.
As per claims 15-20, claims 15-20 are rejected in accordance to the same rational and reasoning as the above rejection of claims 2-6.
III. CLOSING COMMENTS
CONCLUSION
STATUS OF CLAIMS IN THE APPLICATION
The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i):
CLAIMS REJECTED IN THE APPLICATION
Per the instant office action, claims 1-20 have received a first action on the merits and are subject of a first action non-final.
DIRECTION OF FUTURE CORRESPONDENCES
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN KUAN LEE whose telephone number is (571)272-0671. The examiner can normally be reached Monday-Friday.
IMPORTANT NOTE
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Idriss Alrobaye can be reached on (571) 270-1023. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHUN KUAN LEE/Primary Examiner
Art Unit 2181 September 16, 2026
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