CTNF 19/091,933 CTNF 92275 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Priority 02-26 AIA Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 3/27/2025 was in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-4, 6-8, and 12-15 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Takeuchi (CN 114188209 A) . With regards to claim 1. Takeuchi disclose(s): A plasma processing apparatus (fig 2) comprising: a chamber (10); a substrate support (11) disposed in the chamber and including a lower electrode (112); an upper electrode (14) disposed above the substrate support; a first RF power supply (HF; fig 8) configured to supply a first RF signal having a first RF frequency to the upper electrode or the lower electrode ([lines 22-25 in page 7]), the first RF signal having a first power level in a first period (see (1) in fig 8) in each cycle, having a second power level in a second period (see (2)) after the first period ((1) in fig 8) in each cycle, and having a third power level in a third period ((3) in fig 8) after the second period ((2); fig 8) in each cycle, the third power level having a zero power level (see power level in (3) being zero); a second RF power supply (LF2; fig 8) configured to supply a second RF signal having a second RF frequency to the lower electrode ([lines 16-20 in page 8]), the second RF signal having a fourth power level in the first period (see LF2 in (1); fig 8) in each cycle, having a fifth power level in the second period (see LF2 in (2); fig 8) in each cycle, and having a sixth power level in the third period (see LF2 in (3); fig 8) in each cycle, the fourth power level and the sixth power level having a zero power level (see LF2 being zero in (1) and (3)); and a third RF power supply (LF1; fig 8) configured to supply a third RF signal having a third RF frequency to the lower electrode ([lines 1-6 in page 8]), the third RF signal having a seventh power level in the first period (see LF1 in (1); fig 8) in each cycle, having an eighth power level in the second period (see LF1 in (2); fig 8) in each cycle, and having a ninth power level in the third period (see LF1 in (3); fig 8) in each cycle, the seventh power level and the eighth power level having a zero power level (see LF1 being zero in (1) and (2)). With regards to claim 2. Takeuchi disclose(s): The plasma processing apparatus according to claim 1, The plasma processing apparatus according to wherein the first power level is greater than the second power level (see power of HF in (1) being greater than in (2); fig 8). With regards to claim 3. Takeuchi disclose(s): The plasma processing apparatus according to claim 2, The plasma processing apparatus according to wherein the second power level has a zero power level (see portion of HF to Tdelay in fig 8). With regards to claim 4. Takeuchi disclose(s): The plasma processing apparatus according to claim 1, The plasma processing apparatus according to wherein the first RF frequency (see HF being 20mhz to 60mhz [lines 23-26 in page 7]) is greater than the second RF frequency (LF2 100khz to 4mhz [lines 19-24 in page 8]), and the second RF frequency is greater than the third RF frequency (LF1 being 1mhz to 5mhz [lines 4-8 in page 8]). With regards to claim 6. Takeuchi disclose(s): A plasma processing apparatus (fig 2) comprising: a chamber (10); a substrate support (11) disposed in the chamber and including a lower electrode (112); an upper electrode (14) disposed above the substrate support; a first RF power supply (HF; fig 8) configured to supply a first RF signal having a first RF frequency to the upper electrode or the lower electrode ([lines 22-25 in page 7]), the first RF signal having a first power level in a first period (see (1) in fig 8) in each cycle, having a second power level in a second period (see (2)) after the first period ((1) in fig 8) in each cycle, and having a third power level in a third period ((3) in fig 8) after the second period ((2); fig 8) in each cycle, the third power level having a zero power level (see power level in (3) being zero); a second RF power supply (LF2; fig 8) configured to supply a second RF signal having a second RF frequency to the lower electrode ([lines 16-20 in page 8]), the second RF signal having a fourth power level in the first period (see LF2 in (1); fig 8) in each cycle, having a fifth power level in the second period (see LF2 in (2); fig 8) in each cycle, and having a sixth power level in the third period (see LF2 in (3); fig 8) in each cycle, the fourth power level and the sixth power level having a zero power level (see LF2 being zero in (1) and (3)); and a voltage pulse generator configured to apply a voltage pulse signal to the lower electrode, the voltage pulse signal having a voltage pulse sequence that has a first voltage level (LF1; fig 8) in the first period ((1); fig 8) and the second period ((2); fig 8) in each cycle and has a second voltage level in the third period (3) in each cycle, an absolute value of the second voltage level being greater than an absolute value of the first voltage level (see level of LF1 being greater in (3) than in (1)). With regards to claim 7. Takeuchi disclose(s): The plasma processing apparatus according to claim 6, The plasma processing apparatus according to wherein the first power level is greater than the second power level (see power of HF in (1) being greater than in (2); fig 8). With regards to claim 8. Takeuchi disclose(s): The plasma processing apparatus according to claim 7, The plasma processing apparatus according to wherein the second power level has a zero power level (see portion of HF to Tdelay in fig 8). With regards to claim 12. Takeuchi disclose(s): A power supply system (fig 2) for use in a plasma processing apparatus, the power supply system comprising: a first RF generator (HF; fig 8) configured to generate a first RF signal (HF; fig 8) having a first RF frequency, the first RF signal having a first power level in a first period (see (1) in fig 8) in each cycle, having a second power level (see (2) in fig 8) in a second period after the first period in each cycle, and having a third power level (see (3) in fig 8) in a third period after the second period in each cycle, the third power level having a zero power level (see power level in (3) being zero); a second RF generator (LF2; fig 8) configured to generate a second RF signal having a second RF frequency, the second RF signal having a fourth power level in the first period (see LF2 in (1); fig 8) in each cycle, having a fifth power level in the second period (see LF2 in (2); fig 8) in each cycle, and having a sixth power level in the third period (see LF2 in (3); fig 8) in each cycle, the fourth power level and the sixth power level having a zero power level (see LF2 being zero in (1) and (3)); and a third RF generator configured to generate a third RF signal (LF1; fig 8) having a third RF frequency, the third RF signal having a seventh power level in the first period (see LF1 in (1); fig 8) in each cycle, having an eighth power level in the second period (see LF1 in (2); fig 8) in each cycle, and having a ninth power level in the third period (see LF1 in (3); fig 8) in each cycle, the seventh power level and the eighth power level having a zero power level (see LF1 being zero in (1) and (2)). With regards to claim 13. Takeuchi disclose(s): The power supply system according to claim 12, The power supply system according to wherein the first power level is greater than the second power level (see power of HF in (1) being greater than in (2); fig 8). With regards to claim 14. Takeuchi disclose(s): The power supply system according to claim 13, The power supply system according to wherein the second power level has a zero power level (see portion of HF to Tdelay in fig 8). With regards to claim 15. Takeuchi disclose(s): The power supply system according to claim 12, wherein the first RF frequency (see HF being 20mhz to 60mhz [lines 23-26 in page 7]) is greater than the second RF frequency (LF2 100khz to 4mhz [lines 19-24 in page 8]), and the second RF frequency is greater than the third RF frequency (LF1 being 1mhz to 5mhz [lines 4-8 in page 8]) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 5, 11, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Takeuchi (CN 114188209 A; see translated portion) in view of Tokunaga (US 20230187174 A1) . With regards to claim 5, 11, 16. Takeuchi disclose(s): The plasma processing apparatus according to claim 4, 11, and 16, Takeuchi does not disclose(s): The plasma processing apparatus according to wherein the third RF frequency is within a range of 300 kHz to 600 kHz. Tokunaga teaches: The plasma processing apparatus according to wherein the third RF frequency is within a range of 300 kHz to 600 kHz (see a third RF frequency in 114; fig 1; see [0043] for frequency being 400Khz). Before the effective filing date of the claimed invention, it would have been obvious for one of ordinary skill in the art to have modified the device/method/system of Takeuchi by implementing the plasma processing apparatus according to wherein the third RF frequency is within a range of 300 kHz to 600 kHz as disclosed by Tokunaga in order to obtain a desired etching shape in the plane of the wafer as taught/suggested by Tokunaga ([0013]) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim (s) 9-10 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yokoyama (US 20210143028 A1) discloses: The plasma processing apparatus may include, either in place of or in addition to the second RF power supply 64, a DC power supply that intermittently or periodically applies a pulsed negative DC voltage to the lower electrode 18. [0089] Koshimizu (US 20210183622 A1) discloses: The controller controls the radio-frequency power supply. The controller controls the radio-frequency power supply to provide the radio-frequency power with a changed frequency within a period in which the pulsed negative direct-current voltage is applied from the bias power supply to the substrate support, to reduce a power level of a reflected wave from a load coupled to the radio-frequency power supply. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Renan Luque whose telephone number is (571)270-1044. The examiner can normally be reached M-F 9:30AM-5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Taningco can be reached at (571) 272-8048 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RENAN LUQUE/ Primary Examiner, Art Unit 2844 Application/Control Number: 19/091,933 Page 2 Art Unit: 2844 Application/Control Number: 19/091,933 Page 3 Art Unit: 2844 Application/Control Number: 19/091,933 Page 4 Art Unit: 2844 Application/Control Number: 19/091,933 Page 5 Art Unit: 2844
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