Prosecution Insights
Last updated: August 17, 2026
Application No. 19/093,097

AUTOMATED DATA-DRIVEN SYSTEM TO OPTIMIZE OVERCLOCKING

Non-Final OA §102§103§DOUBLEPATENT
Filed
Mar 27, 2025
Priority
Mar 24, 2023 — continuation of 12/277,001
Examiner
ABBASZADEH, JAWEED A
Art Unit
Tech Center
Assignee
Amd
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
256 granted / 329 resolved
+17.8% vs TC avg
Strong +25% interview lift
Without
With
+24.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
4 currently pending
Career history
333
Total Applications
across all art units

Statute-Specific Performance

§101
7.5%
-32.5% vs TC avg
§103
36.6%
-3.4% vs TC avg
§102
39.1%
-0.9% vs TC avg
§112
10.3%
-29.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 329 resolved cases

Office Action

§102 §103 §DOUBLEPATENT
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Allowable Subject Matter Claims 26, 28, 33, 34, and 37 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 35-40 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 9-14 of U.S. Patent No. 12277001. Although the claims at issue are not identical, they are not patentably distinct from each other because the limitations are substantially the same except the patent is directed to a method whereas the instant application is directed to an apparatus. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 21-24, 27, and 29-31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Trim et al. US 20220066499 in view of Chakraborty et al. US 20230316090. Regarding claim 21, 20220066499 Trim teaches generating, by the configured trained machine learning model, overclocking parameters based on a current configuration and workload characteristics of the processing device [0076—" In this example, CPU clock management program 200 recommends to underclock or overclock one or more cores of the mobile using the articulated information about the mobile device and an estimation of the machine learning algorithm model with respect to anticipated events and workloads based on an application access pattern of a user and corresponding application requirements.”]; and adjusting one or more operating characteristics of at least one component of the processing device based on the overclocking parameters [0081—" In step 214, CPU clock management program 200 modifies the CPU clock speed of the core of the user equipment.”] Chakraborty teaches, but Trim does not teach A method, at a processing device, comprising: responsive to sending metadata associated with at least one trained machine learning model to an external processing system [0046—" At transmission 306, the federated learning client device 102 sends model update data to the federated learning server 108.”], obtaining updated metadata for the at least one trained machine learning model from the external processing system [0049—" At transmission 310, the federated learning server 108 sends global model data”]; configuring the at least one trained machine learning model based on the updated metadata [0050—" At block 312, the federated learning client device 102 trains its local model based on global model data received at transmission 310 and local training data at the federated learning client device 102”]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have combined the teachings of Trim and Chakraborty because they are both directed to training machine learning models. Chakraborty improves on Trim by teaching federated learning which is a distributed approach that helps with the issue of client device capability limitations (because training is federated) and also mitigates data privacy concerns in many cases [0005]. Regarding claim 22, Trim teaches collecting system profiling data comprising one or more of: compute unit utilization, bandwidth utilization, cache behavior, or system temperature [0076—"Various embodiments of the present invention include a mechanism to infer the dynamic insights about resource requirements and utilization of user equipment and recommend changes to processing clock cycles for certain cores based on articulated workload insights and forecasting. In one embodiment, CPU clock management program 200 utilizes situational insight from collected data of user device 120 to determine a recommended CPU clock speed for a core of user device 120. For example, CPU clock management program 200 uses dynamic insight about hardware and software services utilization of a mobile device”]; and using the system profiling data as input to the configured trained machine learning model [0076—"In this example, CPU clock management program 200 recommends to underclock or overclock one or more cores of the mobile using the articulated information about the mobile device and an estimation of the machine learning algorithm model “]. Regarding claim 23, Chakraborty teaches wherein the trained machine learning model comprises a neural network having a neural network architecture configuration that includes one or more of pooling parameters, kernel parameters weights, or layer parameters [0035]. Regarding claim 24, Trim teaches wherein generating the overclocking parameters comprises: pre-processing input data by performing normalization of floating point values or one-hot encoding of categorical features; and generating the overclocking parameters by providing the pre-processed input data as input to the configured trained machine learning model [0074-0075]. Regarding claim 27, Chakraborty wherein obtaining the updated metadata further comprises: responsive to sending local training data collected at the processing device to the external processing system, obtaining the updated metadata, wherein the updated metadata is based on the local training data and training data obtained from one or more other processing devices [0050—" At block 312, the federated learning client device 102 trains its local model based on global model data received at transmission 310 and local training data at the federated learning client device 102” and 0039—"Further, the federated learning server 108 may aggregate any training metadata from a plurality of federated learning client devices”]. Regarding claim 29, Chakraborty teaches training, locally at the processing device, at least one initial machine learning model based on local training data; and generating the metadata associated with the at least one trained machine learning model based on the locally trained at least one initial machine learning model [0027—" For example, the client device 102A comes with an initial machine learning model instance 106A and 0028—" However, the client device 102A may be willing or permitted to share its local model updates 107A, such as updates to model weights and parameters, with the federated learning server 108. Similarly, the client devices 102B and 102C may use their respective local machine learning model instances 106B and 106C in the same manner and also share their respective local model updates 107B and 107C with the federated learning server 108 “]. Regarding claim 30, Trim and Chakraborty teach this claim according to the reasoning in claim 21. Regarding claim 31, Trim teaches this claim according to the reasoning for claim 24. Claim(s) 25 and 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Trim et al. US 20220066499 in view of Chakraborty et al. US 20230316090 in further view of Yan et al. US 2022/0113757. Regarding claim 25, Yan teaches wherein generating the overclocking parameters comprises: optimizing the overclocking parameters with respect to one or more of system stability, power consumption of the processing device, processing performance of the processing device, or performance-per-watt of the processing device [0024]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have combined the teachings of Trim and Chakraborty with Yan because Yan takes into consideration stability and power limits of the processor. This prevents damage and ensures proper operation of the processor. Regarding claim 32, Trim and Chakraborty in further view of Yan teach this claim according to the reasoning for claim 25. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 35-36 and 38-39 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yan US 2022/0113757. Regarding claim 35, Yan teaches A processing device, comprising: overclocking circuitry comprising an inference engine configured to: obtain one or more overclocking parameters provided through a graphical user interface [0025-“user input”];generate a first output based on the one or more overclocking parameters and a current configuration of the processing device, the first output comprising a first set of overclocking parameters; and an execution unit configured to adjust one or more operating characteristics of at least one component of the processing device based on the first set of overclocking parameters [0026]. Regarding claim 36, Yan teaches wherein the inference engine is further configured to: select a machine learning model based on at least one of the one or more user- specified overclocking parameters or the current configuration of the processing device; and generate the first output using the selected machine learning model [0026]. Regarding claim 38, Yan teaches wherein the inference engine is configured to generate the first output by: obtaining an input representing the current configuration of the processing device, the input comprising one or more of system- related configuration information, workload characteristic information, or hardware specifications for the processing device; and inferring the first set of overclocking parameters based on the input [0025]. Regarding claim 39, Yan teaches wherein the inference engine is further configured to: responsive to the current configuration of the processing device having changed to a different configuration, generate a second output based on the user-specified input and the different configuration, the second output comprising a second set of overclocking parameters different from the first set of overclocking parameters; and adjust the one or more operating characteristics of the at least one component of the processing device based on the second set of overclocking parameters [0025—User input can provide updated parameters when configuration is changed]. Regarding claim 40, Yan teaches wherein the inference engine is configured to generate the first output by: configuring a neural network based on overclocking parameters and the current configuration of the processing device; and generate the first output using the neural network [0026—" For instance, for each trial of the experiment, the clock rate tuning circuitry 112 executes the optimization model to select a core voltage value for the processing unit 102 that is within the minimum and maximum core voltage range defined by the user input(s) and that is expected to be an optimal core voltage value based on the training (i.e., current training) of the optimization model.”.] Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jaweed A Abbaszadeh whose telephone number is (571)270-1640. The examiner can normally be reached Monday-Friday 9 a.m.-5 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Wiley can be reached at 571-272-4150. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176
Read full office action

Prosecution Timeline

Mar 27, 2025
Application Filed
Mar 27, 2025
Response after Non-Final Action
May 16, 2025
Response after Non-Final Action
Jul 13, 2026
Non-Final Rejection mailed — §102, §103, §DOUBLEPATENT (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+24.6%)
3y 4m (~1y 11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 329 resolved cases by this examiner. Grant probability derived from career allowance rate.

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