DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on 04/11/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements have been considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (U.S Publication No. 20180240648 A1) in view of O’Donnell (U.S Patent No. 6780787 B2).
Regarding claims 1 and 10, Wu discloses a component for use in a semiconductor processing chamber and a method for making a component for use in a semiconductor processing chamber (which is systems and methods where a plasma resistant coating is deposited onto a surface of a chamber component using an atomic layer deposition (ALD) process, see fig. 1-10) comprising: an aluminum substrate of Al 6061; a plasma resistant coating comprising a stress relief layer 460 including an amorphous A1₂O₃ and a rare earth metal-containing oxide layer 465 including a polycrystalline yttrium oxide; and the plasma resistant coating being very dense with a porosity of about 0% (see fig. 4A-4B, paragraph 115-117, and example 1, paragraph [0119]-[0120]). Wu further discloses forming an amorphous aluminum oxide deposited on the aluminum substrate and a polycrystalline yttrium-containing oxide layer deposited on the stress relief layer, wherein the thickness of each layer in the multi-layer of the plasma resistant coating may be from about 10 nm to about 1.5 µm (see paragraph [0026], and [119]).
Wu does not explicitly disclose an intermediate aluminum oxide coating and a process exposed layer are at least 99% pure by weight, and the second thickness of the process exposed layer is less than or equal to the first thickness of the intermediate aluminum oxide coating.
O'Donnell teaches a roughened non-planar surface has an average surface roughness (Ra) of between 4 micro-inches and 80 micro-inches (20 micro-inches to 100 micro-inches), (see fig. 6 & col. 7-8, lines 60-18]); and wherein a ceramic coating (100) has: a surface that has an Ra surface roughness (Ra of about 5 micro-inches to 400 micro-inches) that is less than the Ra of the roughened non-planar surface (Ra of about 20 micro-inches to 100 micro-inches), and has porosity of less than about 3% by volume, and preferably, these ceramic materials have a purity of at least about 99%, and more preferably from about 99.99% to about 100% (see fig. 6 & abstract, col. 6, lines 15-35, 41-49 and col. 7-8, lines 60-18].
It would have been obvious to one skilled in the art before the effective filing date to modify the ceramic coating of Wu with the roughness, porosity, and purity of the ceramic coating of O'Donnell in order to provide desirable wear resistance properties, minimize contact of aggressive atmospheres with the underlying base material, and to minimize contamination (see col. 6, lines 15-35, 41-49, and 55-65 by O’Donnell).
Regarding claims 2 and 12, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the component body is aluminum or an aluminum alloy (see paragraph [0025] and [0119]) by Wu).
Regarding claims 3 and 11, Wu in view of O’Donnell discloses the component, as recited in claim 1 and the method of claim 10, wherein the process exposed layer comprises at least one of Y203, YF3, YOF, HfO2, lanthanide oxide, lanthanum oxide, lanthanum fluoride, yttrium aluminum oxide, magnesium fluoride, and lanthanide fluoride (see paragraph [0025], [0115], and [0119] by Wu; and col. 5, lines 51-60 by O’Donnell).
Regarding claims 4 and 13, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the first thickness is in a range of 30 nm to 1000 nm (which having thickness of each layer in the multi-layer of the plasma resistant coating may be from about 10 nm to about 1.5 µm, see paragraph [0026] by Wu).
Regarding claims 5 and 14, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the second thickness is in a range of 10 nm to 1000 nm (which having thickness of each layer in the multi-layer of the plasma resistant coating may be from about 10 nm to about 1.5 µm, see paragraph [0026] by Wu).
Regarding claims 6 and 15, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the component body is T6 grade 6061 aluminum (see paragraph [0025] and [0119] by Wu).
Regarding claims 7 and 18, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the process exposed layer comprises a mixed metal oxide comprising at least one of zirconium and hafnium and at least one of lanthanum, samarium, yttrium, erbium, cerium, gadolinium, ytterbium, and neodymium (see paragraph [0025], [0115], and [0119] by Wu; and col. 5, lines 51-60 by O’Donnell).
Regarding claims 8 and 19, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 10, wherein the process exposed layer comprises a mixed metal oxide comprising at least one of zirconium and hafnium and at least one of lanthanum, cerium, and gadolinium (see paragraph [0025], [0115], and [0119] by Wu; and col. 5, lines 51-60 by O’Donnell).
Regarding claims 9 and 20, Wu in view of O’Donnell discloses the component as recited in claim 1 and the method as recited in claim 1, wherein the process exposed layer comprises at least one of MgF2, Y203, YF3, HfO2, and yttrium aluminum oxide (see paragraph [0025], [0115], and [0119] by Wu; and col. 5, lines 51-60 by O’Donnell).
Regarding claim 16, Wu in view of O’Donnell discloses the method, as recited in claim 10, wherein the first temperature is less than 200°C and wherein the second temperature is greater than 200°C (which is depositing the stress relief layer 460 and the rare earth metal-containing oxide layer 465 at a temperature of about 100-250°C, see paragraph [0119] by Wu).
Regarding claim 17, Wu in view of O’Donnell discloses the method, as recited in claim 10, further comprising: mounting the component in a semiconductor processing chamber, and using the component in the semiconductor processing chamber (see paragraph [0005] and [0025] by Wu).
Conclusion
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/Thai Pham/Primary Examiner, Art Unit 2845 08/08/2026
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