DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 6/20/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
Receipt is acknowledged of an amendment to the claims of application #19141397 received on 6/20/2026. Claims 1-10 are amended. Claims 11-12 are added. Claims 1-12 are pending. All pending claims are considered and examined.
Claim Objections
Claim 3 is objected to because of the following informalities: “wherein, the near-field communication integrated circuit” contains extraneous punctuation and should be “wherein the near-field communication integrated circuit”. Appropriate correction is required.
Claim 5 is objected to because of the following informalities: “wherein, the communication integrated circuit” contains extraneous punctuation and should be “wherein the communication integrated circuit”. Appropriate correction is required.
Claim 11 is objected to because of the following informalities: “wherein, the communication integrated circuit” contains extraneous punctuation and should be “wherein the communication integrated circuit”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Razaghi (US 10251260 B1).
Regarding claim 1, Razaghi discloses a circuit board to hold connector pieces for tamper detection circuit comprising:
the near-field communication antenna (col. 4, lines 34-50), and
a near-field communication integrated circuit configured to be connected to the antenna (col. 10, lines 1-6),
wherein the following steps are implemented:
determining, within the integrated circuit, of at least one voltage or current value (col. 3, lines 23-54),
deducing, from the voltage or current value determined within the integrated circuit, of an operating or malfunctioning state of the antenna (col. 9, line 59 – col. 10, line 6).
Regarding claim 2, Razaghi discloses the method of claim 1 above and further discloses wherein the step of determining at least one voltage or current value comprises accessing a register of the integrated circuit in which the value is recorded (col. 12, lines 56 – col. 13, lines 12: memory components; n.b. memory inherently has data registered in addressed memory).
Regarding claim 3, Razaghi discloses the method of claim 1 above and further discloses wherein the near-field communication integrated circuit comprises: a transmitter for transmitting a signal to the antenna, and a dynamic power control unit for regulating a power of a signal transmitted by the transmitter to the antenna (col. 6, lines 21-45; col. 5, lines 13-29), and the step of determining a value comprises a step of determining a voltage across the transmitter and/or a step of determining a current flowing through the transmitter (col. 10, lines 1-6).
Regarding claim 4, Razaghi discloses the method of claim 3 above and further discloses wherein the step of deducing comprises deducing, from the voltage and/or current determined, at least one operating or malfunctioning state of the antenna from among the following states: the antenna is connected to the communication integrated circuit; the antenna is disconnected from the integrated communication circuit; one track of the antenna is disconnected from the communication circuit; two tracks of the antenna are disconnected from the communication circuit (col. 9, line 59 – col. 10, line 6: traces).
Regarding claim 5, Razaghi discloses the method of claim 2 above and further discloses wherein the communication integrated circuit comprises two signal reception pins intended to be connected to the antenna, the determining step comprises determining a signal amplitude value at the two reception pins (col. 7, line 58 – col. 8, lines 5; wire style connector piece … board connection nodes ... tamper trace).
Regarding claim 6, Razaghi discloses the method of claim 5 above and further discloses wherein the step of deducing comprises deducing, from a determined differential value, at least one operating or malfunctioning state of the antenna from among the following states: the antenna is connected to the communication integrated circuit; the antenna is disconnected from the communication integrated circuit or at least one track is cut (col. 9, line 59 – col. 10, line 6).
Regarding claim 7, Razaghi discloses the method of claim 1 above and further discloses a computer program, on non- transitory computer-readable recording medium, comprising instructions which, when the program is executed by a computer, cause the computer to implement the steps of the method according to claim 1 (col. 12, lines 56 – col. 13, lines 12).
Regarding claim 8, Razaghi discloses the method of claim 1 above and further discloses a non-transitory computer-readable recording medium comprising instructions which, when executed by a computer, cause the computer to implement the steps of the method according to claim 1 (col. 2, line 58 – col. 3, line 22; col. 12, lines 56 – col. 13, lines 12).
Regarding claim 9, Razaghi discloses the method of claim 1 above and further discloses a terminal comprising: a near-field communication antenna, a near-field communication integrated circuit configured to be connected to the antenna, and a processor configured to implement the steps of the method according to claim 1 (col. 2, line 58 – col. 3, line 22; col. 12, lines 56 – col. 13, lines 12).
Regarding claim 10, Razaghi discloses the method of claim 9 above and further discloses a terminal according to claim 9, configured to make a contactless electronic payment (col. 2, line 58 – col. 3, line 22; col. 5, lines 13-29).
Regarding claim 11, Razaghi discloses the method of claim 1 above and further discloses wherein the communication integrated circuit comprises two signal reception pins intended to be connected to the antenna, and the determining step comprises determining a signal amplitude value at the two reception pins (col. 7, line 58 – col. 8, lines 5; wire style connector piece … board connection nodes ... tamper trace).
Regarding claim 12, Razaghi discloses the method of claim 11 above and further discloses wherein the step of deducing comprises deducing, from a determined differential value, at least one operating or malfunctioning state of the antenna from among the following states: the antenna is connected to the communication integrated circuit; the antenna is disconnected from the communication integrated circuit or at least one track is cut (col. 9, line 59 – col. 10, line 6).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wade et al. (US 9892293 B1) discloses a tamper detection system.
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/TOAN C LY/Primary Examiner, Art Unit 2876
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