DETAILED ACTION
This action is responsive to the application filed on 4/3/2025. Claims 1-20 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 14 is objected to because of the following informalities:
In regard to claim 14, amend the limitation to state “…a plurality of [[the]] processor clusters…” as to correct a minor antecedent basis issue.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 17-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In regard to claim 17, line 1 the limitation stating, “the operations” lacks clarity because it lacks proper antecedent basis as there is no prior recitation of “operations”.
In regard to claim 18, line 1 the limitation stating, “the operations” lacks clarity because it lacks proper antecedent basis as there is no prior recitation of “operations”.
Claim 18 is further dependent upon claim 17 above and therefore is similarly rejected for the same reasons as claim 17 above.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-4, 6, 10, 12 and 15-20 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-4, 7-9, 10-11 and 16 of U.S. Patent No. 12,298,933. Although the claims at issue are not identical, they are not patentably distinct from each other because each of the above claims of the instant application is an obvious variant of a corresponding claim of reference patent 12,298,933.
Allowable Subject Matter
Claims 1-4, 6, 10, 12 and 15-20 would be allowable if amended to overcome the respective rejection(s) under 35 U.S.C. 112(b) and/or a terminal disclaimer is filed to overcome the double patenting rejections, set forth in this Office action.
Claims 5, 7-9, 11 and 13-14 are objected to as being dependent upon a rejected base claim.
9. The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record, alone or in combination, fail to disclose or render obvious claim 1 filed on 4/3/2025. The prior art of record has not taught either individually or in combination and together with all other claimed features “A message-based processor comprising at least one processor cluster, the at least one processor cluster comprising a plurality of processor cluster elements, each processor cluster element of the plurality of processor cluster elements having an operational mode indicator that indicates an operational mode of the processor cluster element, the operational mode being one of a plurality of operational modes comprising a transmission disabling operational mode and a transmission enabling operational mode, the message-based processor storing instructions that, when executed, cause the message-based processor to perform operations comprising: setting a particular processor cluster element of the plurality of processor cluster elements to the transmission disabling operational mode; and transmitting, with a delay, a re-enable control message to the particular processor cluster element to reassume the transmission enabling operational mode” as claimed in claim 1.
The closet prior art of record, EP3605401 A1 (cited in parent application 18/555,473) discloses a message-based processor which transmits event messages to neural units. However, the reference does not disclose “…a transmission disabling operational mode and a transmission enabling operational mode, the message-based processor storing instructions that, when executed, cause the message-based processor to perform operations comprising: setting a particular processor cluster element of the plurality of processor cluster elements to the transmission disabling operational mode; and transmitting, with a delay, a re-enable control message to the particular processor cluster element to reassume the transmission enabling operational mode” as claimed.
While Doerr and Winser (cited in pertinent art section below) broadly disclose disabling communications between processing units; as well as data processing units including transmission and receive modes. However, the references do not disclose “…a transmission disabling operational mode and a transmission enabling operational mode, the message-based processor storing instructions that, when executed, cause the message-based processor to perform operations comprising: setting a particular processor cluster element of the plurality of processor cluster elements to the transmission disabling operational mode; and transmitting, with a delay, a re-enable control message to the particular processor cluster element to reassume the transmission enabling operational mode” as claimed.
Furthermore, while some limitations may be broadly disclosed in the cited prior art references, the specific combination of limitations would not be obvious as claimed absent impermissible hindsight.
Claims 15 and 19 are similarly allowable for the same reasons as claim 1 above.
Claims 2-14, 16-18 and 20 are dependent upon claims 1, 15 and 19 above and therefore are similarly allowable for the same reasons as claims 1, 15 and 19 above.
Conclusion
10. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Doerr, USPAT No. 9,424,441 for teaching setting one or more register values corresponding to one or more processors and one or more communication elements to disable communication paths between first and second portions of a multiprocessor fabric
Winser, PGPUB No. 2014/0040909 for teaching transmitting packets between a plurality of data processing units in a data processing apparatus, wherein the data processing units operate in a transmit mode or a receive mode
Horst, USPAT No. 6,157,967 for teaching a multiprocessor system that includes a port enable register used to enable or disable message traffic routers
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY P SPANN whose telephone number is (571)431-0692. The examiner can normally be reached M-F, 9am-6pm, EST.
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/COURTNEY P SPANN/Primary Examiner, Art Unit 2183
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