DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s amendment filed on 03/19/26 is acknowledged and papers submitted have been placed in the records.
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claim 5 is/are rejected under 35 U.S.C. 101 as claiming the same invention as that of respectively claim 3 (which inherently contains all the limitations of independent claim 1 upon which it directly depends) of prior U.S. Patent No. 12293957. This is a statutory double patenting rejection.
The Examiner notes that even if claim 3 of patent ‘957 uses the term “a nanofluid” while claim 5 of this application uses the term “nanofluids”, “a nanofluid” covers also “nanofluids” as it is well settled that the term ‘a’ or ‘an’ ordinarily means ‘one or more’ in patent language. Tate Access Floors, Inc., and Tate Access Floors Leasing, Inc., v. Interface Architectural Resources, Inc., 279 F.3d 1357; 2002 U.S. App. LEXIS 1924; 61 U.S.P.Q.2D (BNA) 1647 ((citing Tate Access Floors, Inc. v. Maxcess Techs., Inc, 222 F.3d 958, 966 n.4, 55 U.S.P.Q.2D (BNA) 1513, 1518 [**32] (citing Elkay Mfg. Co. v. Ebco Mfg. Co., 192 F.3d 973, 977, 52 U.S.P.Q.2D (BNA) 1109, 1112 (Fed. Cir. 1999): “As we have previously explained, it is generally accepted in patent parlance that ‘a’ or ‘an’ can mean ‘one or more’.")). And, “This court has repeatedly emphasized that an indefinite article ‘a’ or ‘an’ in patent parlance carries the meaning of ‘one or more’ in open-ended claims containing the transitional phrase ‘comprising.’ Unless the claim is specific as to the number of elements, the article ‘a’ receives a singular interpretation only in rare circumstances when the patentee evinces a clear intent to so limit the article.” (Citations omitted). Scanner Technologies v./COS Vision Systems, 365 F.3d 1299, 1304 (Fed. Cir. 2004).
The Examiner finally notes that in view of the original disclosure, the expression “nanofluids” do not appear to cover circulating different type of nanofluids in the microchannels in a single embodiment but seems to be rather describing the ensemble of nanofluids flowing in the plurality of microchannels, each fluid in a given microchannel being a nanofluid.
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 6-9 and 11 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 3 (which inherently contains all the limitations of independent claim 1 upon which it directly depends) of U.S. Patent No. 12087663. Although the claims at issue are not identical, they are not patentably distinct from each other because: for claim 6, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the 3D IC structure to comprise a metal-oxide semiconductor-integrated circuit, and this as a non-inventive step of providing a function integrated circuit made of conventionally known material for use in the 3D IC structure or apparatus to benefit from the cooling advantages of the DLMCs structure; for claim 7, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided a heat sink located above and attached to the first set of integrated double-layer microchannels in order to further enhance heat dissipation; for claim 8, it is obvious from claim 5 (upon which claim 8 directly depends) language that the nanofluids are necessarily circulating within the plurality of double-layer microchannels; and for claim 9, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided, via a non-inventive change in size/shape (see MPEP 2144.04.IV), the plurality of integrated double-layer microchannels (DLMC) to comprise (i.e. to be of) a chip-size integrated DLMC in order to match a size (bonding surface area for example of a chip it is to be attached to); for claim 11, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided, via a non-inventive duplication of essential working parts (see MPEP 2144.04.VI), the plurality of integrated double-layer microchannels to comprise integrated 4-layer microchannels in order to further enhance heat dissipation by increasing the number of microchannels.
Claims 12-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 2 of U.S. Patent No. 12087663. Although the claims at issue are not identical, they are not patentably distinct from each other because: claim 12 of this application is substantially identical to claim 2 (which contains all the limitation of claim 1) of patent ‘663 except for the limitation “wherein the plurality of integrated double-layer microchannels is configured in a structural arrangement to optimize a thermal performance for the 3D IC structure” recited in claim 1 of patent ‘663, but it would have been obvious to one skilled in the art to have provided the plurality of integrated double-layer microchannels configured in a structural arrangement to optimize a thermal performance for the 3D IC structure as doing so would have improved heat dissipation and allowed to obtain a more efficient device in terms of thermal management performance (see MPEP 2144.I&II); claim 13 of this application is substantially identical to claim 2 of patent ‘663 (as explained above) except for a fluid within the plurality of double-layer microchannels, but it would have been obvious to one skilled in the art to have provided a fluid within the plurality of double-layer microchannels in order to absorb and evacuate heat as conventionally done in the art for microfluidic cooling structures; claim 14 of this application is substantially identical to claim 2 of patent ‘663 (as explained above) except for a nanofluid within the plurality of double-layer microchannels, but it would have been obvious to one skilled in the art to have provided a nanofluid within the plurality of double-layer microchannels in order to absorb and evacuate heat as conventionally done in the art for microfluidic cooling structures; claim 15 of this application is substantially identical to claim 2 of patent ‘663 (as explained above) except for a heat sink located above the first set of integrated double-layer microchannels, but it would have been obvious to one skilled in the art to have provided a heat sink located above the first set of integrated double-layer microchannels in order to enhance heat dissipation; claim 16 of this application is substantially identical to claim 15 (as explained above) except for the plurality of integrated double-layer microchannels comprising integrated 4-layer microchannels, but it would have been obvious to one skilled in the art to have provided, via a non-inventive duplication of essential working parts (see MPEP 2144.04.VI), the plurality of integrated double-layer microchannels comprising integrated 4-layer microchannels in order to enhance heat dissipation by providing for more heat dissipation paths (i.e. microchannels; see MPEP 2144.I&II); claim 17 of this application is substantially identical to claim 16 (as explained above) except for the plurality of integrated double-layer microchannels (DLMC) comprising a chip-size integrated DLMC, but it would have been obvious to one skilled in the art to have provided via a non-inventive change in size as necessary (see MPEP 2144.04.IV), the plurality of integrated double-layer microchannels (DLMC) comprising (i.e. being) a chip-size integrated DLMC by at least their surface in thermal communication with a chip in order to maximize thermal contact area with said chip for improved heat dissipation; claim 14 of this application is substantially identical to claim 2 of patent ‘663 (as explained above) except for a fluid within the plurality of double-layer microchannels, wherein: a heat sink is located above the first set of integrated double-layer microchannels; and the plurality of integrated double-layer microchannels comprises integrated 4-layer microchannels, but it would have been obvious to one skilled in the art to have: provided a fluid within the plurality of double-layer microchannels in order to absorb and evacuate heat as conventionally done in the art for microfluidic cooling structures, provided a heat sink located above the first set of integrated double-layer microchannels in order to enhance heat dissipation, and provided via a non-inventive change in size as necessary (see MPEP 2144.04.IV), the plurality of integrated double-layer microchannels (DLMC) comprising (i.e. being) a chip-size integrated DLMC by at least their surface in thermal communication with a chip in order to maximize thermal contact area with said chip for improved heat dissipation; as for claims 19 and 20, it would have been obvious to one skilled in the art to have provided (with regard to claim 19) the fluid to comprise (i.e. to be) a cooling fluid as a non-inventive step of providing such a fluid for its known purpose (see MPEP 2144.07), and provided (with regard to claim 20) the fluid to comprise (i.e. to be) a nanofluid as a non-inventive step of providing a convenient and known type of fluid for microchannel cooling structures.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sadaka (US 2014/0001604, previously used).
a. Re claim 1, Sadaka discloses a three-dimensional integrated circuit apparatus, comprising: a substrate 184 (see fig. 21 and related text; see remaining of disclosure for more details); at least one of an integrated double-layer microchannel (DLMC) (see annotated fig. 21 below) or a multi-layer microchannel (MLMC) (see annotated fig. 21 below) formed of a thermally conductive material (the material/materials forming the DLMC or MLMC is/are thermally conductive at least to some extent) configured for counter-flow or parallel-flow of coolant (see flow channels on fig. 2B) and disposed on a device layer 182 of the three-dimensional integrated circuit with optimized thermal performance for the three-dimensional integrated circuit apparatus (the limitation “with optimized thermal performance for the three- dimensional integrated circuit” does not concretely recite any structural distinction over the structure of Sadaka ‘604 which is geared toward improving heat dissipation in 3D IC devices and is necessarily their best/optimal version of their invention at the time of their filing; see MPEP 2112.01); and a heat pipe 122C ([0062], [0069], [0088]) above the at least one of the DLMC and the MLMC.
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b. Re claim 2, the heat pipe comprises at least one of: a heat spreader or a heat
sink (122 and 122C are made of heat-conducting materials such as silicon or aluminum nitride or aluminum oxide or silicon carbide or diamond as per at least [0062], [0069] and [0088], and this makes 102 reasonably a heat spreader and 122C a heat sink).
c. Re claim 3, the heat pipe is integrated on top of the at least one of the DLMC or the MLMC (implicit on fig. 21).
d. Re claim 21, at least one of the DLMC or the MLMC is configured (i.e. capable) to permit circulation of a coolant or a nanofluid therethrough (see at least [0065]) “to enhance heat removal and to reduce hotspot temperature relative to the three-dimensional integrated circuit apparatus including a copper heat sink and a heat spreader” (this quoted limitation merely states what the DLMC or the MLMC is capable of doing when a copper heat sink, whose presence is not required by the claim language, is present and obviously attached to the heat spreader as otherwise would not make any sense; it is the Examiner position that the DLMC or the MLMC of the Sadaka ‘604 reference is capable of doing the same; see MPEP 2112.01 (I. PRODUCT AND APPARATUS CLAIMS — WHEN THE STRUCTURE RECITED IN THE REFERENCE IS SUBSTANTIALLY IDENTICAL TO THAT OF THE CLAIMS, CLAIMED PROPERTIES OR FUNCTIONS ARE PRESUMED TO BE INHERENT) Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977)), wherein the heat pipe comprises the heat spreader.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sadaka (US 2014/0001604, previously used).
In the alternative to the anticipation rejection above, Sadaka discloses all the limitations of claim 1 as stated above including that at least one of the DLMC or the MLMC is configured (i.e. capable) to permit circulation of a coolant or a nanofluid therethrough (see at least [0065]) “to enhance heat removal and to reduce hotspot temperature relative to the three-dimensional integrated circuit apparatus” (this quoted limitation merely states what the DLMC or the MLMC is capable of doing and does not structurally distinguish over Sadaka ‘604) including a heat spreader, wherein the heat pipe comprises (i.e. is) the heat spreader, except explicitly a copper heat sink. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided a copper heat sink attached to layer 122C in order to further enhance heat dissipation (see MPEP 2144.I&II).
Response to Arguments
Applicant’s arguments with respect to the claims rejected above have been considered but are moot because they do not apply to the new ground of rejections in view of Applicants’ amendments.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899
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