DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the response to this Office action, the Office respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Office in prosecuting this application.
The Office has cited particular figures, elements, paragraphs and/or columns and line numbers in the references as applied to the claims for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider each of the cited references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage disclosed by the Office.
Priority
2. Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, or 365(c) is acknowledged.
Information Disclosure Statement
3. The information disclosure statement (IDS) submitted on 04/14/2025 is being considered by the Examiner.
Disposition of the Claims
4. The instant application was effectively filed on March 30, 2023, wherein claims 1-5 and 7-20 are pending.
Response to Arguments
Applicant’s arguments filed 03/13/2026 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-5, 12 and 14 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Ryu et al. US PG-PUB 20190171318 A1 (hereinafter Ryu) in view of Ozeki et al. Us PG-PUB 20230275098 A1 (hereinafter Ozeki).
Regarding claim 1, Ryu teaches An electronic device (Para. [0031]; a display apparatus 1), comprising: a display panel (Para. [0031]; display panel 100) comprising an emission area and a non-emission area proximate to the emission area (Para. [0041]; a touch-non activation region NSE outside the touch activation region SE, which circumvents the touch activation region SE in which an image is displayed) and an input sensor disposed on the display panel (Fig. 1 and Para. [0031]; touch layer 200 is disposed on display panel 100), wherein the input sensor comprises: a first sensor conductive layer disposed on the display panel (Fig. 3 and Para. [0039]; sensing cells SC2); a first sensor insulation layer disposed on the “sensor conductive layer” (Para. [0011]; a touch layer directly above the display panel and including an organic insulating layer above and covering a conductive layer, [0012]; forming an organic insulating layer on the plurality of sensing electrodes); and a second sensor conductive layer (Fig. 3 and Para. [0044]; sensing cells SC1),
wherein at least one of the first sensor conductive layer and the second sensor conductive layer comprises a first conductive layer (Fig. 4 and Para. [0044]; metal layer 222), a second conductive layer disposed on the first conductive layer (Fig. 4 and Para. [0044]; metal layer 226 is disposed on metal layer 222), and a third conductive layer disposed on the second conductive layer (Fig. 4 and Para. [0044]; metal layer 224 is disposed on metal layer 226), and wherein a width of the second conductive layer is smaller than a width of the third conductive layer (Fig. 4; metal layer 226 is smaller than metal layer 224).
Ryu further teaches a second sensor insulation layer disposed on the second sensor conductive layer (Fig. 4; insulation 230),
Ryu fails to further disclose the arrangement of a first sensor insulation layer disposed on the first sensor conductive layer and a second sensor conductive layer disposed on the first sensor insulation layer, and a second sensor insulation layer disposed on the second sensor conductive layer and wherein sides of the second conductive layer contact the first sensor insulation layer or the second sensor insulation layer.
However, in the same field of endeavor, Ozeki teaches a first sensor insulation layer disposed on the first sensor conductive layer (Para. [0054] and Fig. 1a; insulating layer IL1 disposed on gate electrode GL2 and semiconductor layer S1, S2 and S3); and a second sensor conductive layer disposed on the first sensor insulation layer (Fig. 1a and 1b; conductive layer 120 is disposed on insulation IL1) and a second sensor insulation layer disposed on the second sensor conductive layer (Para. [0046]; Fig. 1a and 1b; insulating layer IL3 is disposed on GL1 which comprises i.e. conductive layer 120) and wherein sides of the second conductive layer contact the first sensor insulation layer or the second sensor insulation layer (See Fig. 1b; sides of conductive layer 120 contacts insulation layer IL2).
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Ryu with the teachings as taught by Ozeki in order to provide insulation between the electrode to prevent short circuits as well as reduce crosstalk within the electrodes.
Regarding claim 2, Ryu as modified by Ozeki teaches The electronic device of claim 1, Ryu further teaches wherein the second conductive layer comprises a different material from each of the first conductive layer and the third conductive layer (Para. [0050]; the third metal layer 226 made of Al is different from the first metal layer 222 and the second metal layer 224 made of Ti).
Regarding claim 3, Ryu as modified by Ozeki teaches The electronic device of claim 2, Ryu further teaches wherein the first conductive layer and the third conductive layer comprise a same material (Para. [0050]; the first metal layer 222 and the second metal layer 224 made of Ti).
Regarding claim 4, Ryu as modified by Ozeki teaches The electronic device of claim 2, Ryu further teaches wherein the second conductive layer comprises gold, silver, copper, aluminum, platinum or an alloy thereof (Para. [0045]; Mo, Ag, Ti, Cu, Al, Mo/Al/Mo, or a combination thereof).
Regarding claim 5, Ryu as modified by Ozeki teaches The electronic device of claim 2, Ryu further teaches wherein a recess is defined in each of the sides of the second conductive layer (Fig’s. 4, 5 and Para. [0048]; etching may be performed such that the third metal layer 226 has an undercut structure, e.g., side surfaces of the third metal layer 226 may be recessed toward the inside compared to ends of the first metal layer 222 and the second metal layer 224), and wherein sides of the first conductive layer and sides of the third conductive layer each protrude to a greater extent than the sides of the second conductive layer (See Fig’s. 4, 5; due to the undercut UC the sides of conductive layer 224 and 222 protrudes to greater extent on the sides than conductive layer 226).
Additionally, Fig. 25 of Ozeki teaches conductive layer 130 and 110 having sides that protrude further than conductive layer 120.
Regarding claim 12, Ryu as modified by Ozeki teaches The electronic device of claim 1, Ryu further teaches wherein the width of the second conductive layer is smaller than a width of the first conductive layer (Fig. 4; metal layer 226 is smaller than metal layer 222).
Regarding claim 14, Ryu as modified by Ozeki teaches The electronic device of claim 1, Ryu further teaches wherein at least one of the first sensor conductive layer and the second sensor conductive layer has an undercut structure (Para’s. [0044]-[0045], [0048], [0074]; In the touch layer 200 of FIG. 4, the plurality of sensing electrodes SC comprises first sensing cells SC1 and the second sensing cells SC2 which includes conductive layer 220, including a first metal layer 222, a second metal layer 224, and a third metal layer 226. The structure of the space UC may result, for example, from an undercut structure of the third metal layer 226, which may be formed in a process in which the first metal layer 222, the third metal layer 226, and the second metal layer 224 are sequentially stacked and patterned. For example, in one type of etching process, side surfaces of the conductive layer 220 may be constantly etched to form a triple-layer structure. However, in the conductive layer 220 according to the present embodiment, etching may be performed such that the third metal layer 226 has an undercut structure, e.g., side surfaces of the third metal layer 226 may be recessed toward the inside compared to ends of the first metal layer 222 and the second metal layer 224).
Claim 7 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Ryu et al. US PG-PUB 20190171318 A1 (hereinafter Ryu) in view of Ozeki et al. Us PG-PUB 20230275098 A1 (hereinafter Ozeki) and further in view of Ko et al. US PG-PUB 20210149514 A1 (hereinafter Ko).
Regarding claim 7, Ryu as modified by Ozeki teaches The electronic device of claim 1, Ryu further teaches wherein the first sensor conductive layer and the second sensor conductive layer each comprise a first mesh pattern and a second mesh pattern (Fig. 3 and Para. [0010]; sensing cells form a mesh structure), and wherein at least a portion of the second mesh pattern of the second sensor conductive layer corresponds to: first sensing patterns arranged in a first direction (Fig. 3);
Ryu as modified by Ozeki fails to further disclose second sensing patterns electrically insulated from the first sensing patterns and arranged in a second direction intersecting with the first direction
Ko further teaches second sensing patterns electrically insulated from the first sensing patterns and arranged in a second direction intersecting with the first direction (Para. [0053]; the insulating layer disposed between electrode TE1 and electrode TE2).
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Ryu as modified by Ozeki with the teachings as taught by Ko in order to provide insulation between the electrode to prevent short circuits as well as reduce crosstalk within the electrodes.
Claims 15 and 16 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Ryu et al. US PG-PUB 20190171318 A1 (hereinafter Ryu) in view of Ozeki et al. Us PG-PUB 20230275098 A1 (hereinafter Ozeki) and further in view of Bok et al. US PG-PUB 20210191552 A1 (hereinafter Bok).
Regarding claim 15, Ryu teaches An electronic device (Para. [0031]; a display apparatus 1), comprising: a display panel (Para. [0031]; display panel 100) comprising a display area (Para. [0041]; the touch activation region SE in which an image is displayed); an input sensor comprising a sensing area overlapping the display area and disposed on the display panel (Fig. 1 and Para. [0031]; touch layer 200 is disposed on display panel 100); and a main controller that controls an operation the input sensor (Para. [0041]; external driving circuit), wherein the input sensor comprises: first sensing electrodes, each of which comprises first sensing patterns arranged in a first direction (Fig. 3 and Para. [0039]; sensing cells SC2), the first sensing electrodes disposed on the sensing area (Para. [0041]; touch activation region SE); and second sensing electrodes (Fig. 3 and Para. [0044]; sensing cells SC1), each of which comprises second sensing patterns arranged in a second direction intersecting with the first direction (Fig. 3 and Para. [0044]; sensing cells SC1), the second sensing electrodes disposed on the sensing area (Para. [0041]; sensing cells SC1 is disposed in touch activation region SE), a sensor insulation layer disposed on the first sensing electrodes and the second sensing electrodes (Para. [0012], [0047]; insulating layer on the plurality of sensing electrodes), wherein each of the first sensing patterns and the second sensing patterns comprise a first conductive layer, a second conductive layer, and a third conductive layer that are laminated in a thickness direction of the input sensor (see Fig. 3, 4 and Para. [0039]-[0044]; each of the plurality of first sensing cells and the plurality of second sensing cells may have a mesh structure comprising first, second and third metal layer 222, 226 and 224), and wherein a width of the second conductive layer is smaller than each of a width of the first conductive layer and a width of the third conductive layer (Fig. 4; metal layer 226 is smaller than metal layer 222 and 224).
Ryu fails to explicitly disclose a main controller that controls an operation of the display and wherein sides of the second conductive layer contact the sensor insulation layer.
However, in the same field of endeavor, Ozeki teaches a second sensor insulation layer disposed on the second sensor conductive layer (Para. [0046]; Fig. 1a and 1b; insulating layer IL3 is disposed on GL1 which comprises i.e. conductive layer 120) and wherein sides of the second conductive layer contact the first sensor insulation layer or the second sensor insulation layer (See Fig. 1b; sides of conductive layer 120 contacts insulation layer IL2).
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Ryu with the teachings as taught by Ozeki in order to provide insulation between the electrode to prevent short circuits as well as reduce crosstalk within the electrodes.
Furthermore, the disclosure of Ryu as modified by Ozeki fails to explicitly disclose a main controller that controls an operation of the display
However, in the same field of touch display, Bok teaches a main controller that controls an operation of the display and the input sensor (Para. [0207]; The main processor 710 may control all functions of the display apparatus 1. For example, the main processor 710 may output digital video data to the display driving unit 32 via the display circuit board 30 so that the display panel 10 displays an image. The main processor 710 receives the sensor data from the touch sensor driving unit 33. The main processor 710 may determine whether there is a user's touch, according to the sensor data, and may execute an operation corresponding to a direct touch or proximity touch of the user. For example, the main processor 710 may calculate the touch coordinate of the user by analyzing the sensor data, and then may execute an application or operation indicated by an icon touched by the user. The main processor 710 may be an application processor, a central processing unit, or a system chip each realized as an IC.).
Thus, it would have been obvious to one of ordinary skills in the art before the effective filing date of the claimed invention to combine the teachings of Ryu as modified by Ozeki with the teachings as taught by Bok, in order to display image as well as detect touch input Bok- (Para. [0207]).
Regarding claim 16, Ryu as modified by Ozeki and Bok teaches The electronic device of claim 15, Ryu further teaches wherein the second conductive layer comprises a different material from that of the first conductive layer and the third conductive layer (Para. [0050]; the third metal layer 226 made of Al is different from the first metal layer 222 and the second metal layer 224 made of Ti).
Allowable Subject Matter
Claims 8-11, 13 and 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
5. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY ONYEKABA whose telephone number is (571)270-7633. The examiner can normally be reached on 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, NITIN K PATEL can be reached on 5712727677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMY ONYEKABA/Primary Examiner, Art Unit 2628
Prosecution Insights