DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-9, 13, and 16-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2018/0033849 A1 to Noh et al. (Noh).
As to claim 1, Noh discloses A display apparatus (100) (Fig. 2, Par. 60), comprising:
a substrate (110) including a first area (display area), a second area (part of non-display area), and a bending area (another part of non-display area when the display is bent) between the first area (display area) and the second area (non-display area) (Fig. 2, Pars. 49, 55), the bending area bent (Fig. 2, Pars. 49, 55, e.g. a part of the non-display area of the lower substrate 110 may be bent); and
a first thin film transistor (130), a second thin film transistor (140), and a storage capacitor (Cst) in the first area (display area) (Fig. 2, Pars. 91-92), wherein
the first thin film transistor (130) has a first semiconductor layer (131) (Fig. 2, Pars. 64-65) and a first gate electrode (132) insulated from the first semiconductor layer (130) by a first insulating layer (113) (Fig. 2, Par. 70), a first source electrode (133) and a first drain electrode (134) connected to the first semiconductor layer (131)(Fig. 2, Pars. 69, 88),
the second thin film transistor (140) has a second semiconductor layer (141) on a second insulating layer (114) (Fig. 2, Pars. 82, 90), a second gate electrode (142 or 152), a second source electrode (143) and a second drain electrode (144) connected to the second semiconductor layer (141) (Fig. 2, Pars. 71, 74), the second insulating layer (114) is between the first insulating layer (113) and the second semiconductor layer (140) (Figs. 2, 4B, Pars. 82, 134),
the storage capacitor (Cst) has a lower electrode (133), an upper electrode (151), and a dielectric layer (storage capacitor layer Cst) between the lower electrode (133) and the upper electrode (151) (Fig. 2, Pars. 91-92),
the second semiconductor layer (141) and the lower electrode (133) are arranged on a same layer (e.g. on 114) (Figs. 2, 4B, Par. 134), and the lower electrode includes an oxide semiconductor material (Figs. 2, 4B, Par. 135).
As to claim 13, Noh teaches the display apparatus of claim 1 above. The limitation of claim 13 is substantially similar to claim 1. Accordingly, claim 13 is rejected based on same analysis as claim 1. Noh further discloses an electronic apparatus (e.g. personal electronic device) comprising: an electronic device (e.g. wearable device) connected to the display apparatus (Par. 11).
As to claim 2, Noh discloses the first insulating layer (113) comprises one or more of silicon nitride (SiNx) (Par. 70) (omit or silicon oxide (SiO2), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta20s), hafnium oxide (HfO2), or zinc oxide (ZnO2)).
As to claim 3, Noh discloses the second insulating layer (114) comprises one or more of silicon nitride (SiNx) (Par. 77) (omit or silicon oxide (SiO2), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta20s), hafnium oxide (HfO2), or zinc oxide (ZnO2)).
As to claim 16, Noh teaches the display apparatus of claims 2 and 3 above. The limitation of claim 16 is substantially similar to claims 2 and 3. Accordingly, claim 16 is rejected based on same analysis as claims 2 and 3.
As to claim 4, Noh discloses the first source electrode (133) and the first drain electrode (134) comprise one or more of Ti or Al (Par. 135).
As to claim 17, Noh teaches the display apparatus of claim 4 above. The limitation of claim 17 is substantially similar to claim 4. Accordingly, claim 17 is rejected based on same analysis as claim 4.
As to claim 5, Noh discloses the first source electrode and the first drain electrode comprise a three-layer structure comprising Ti/Al/Ti (Par. 135).
As to claim 18, Noh teaches the display apparatus of claim 5 above. The limitation of claim 18 is substantially similar to claim 5. Accordingly, claim 18 is rejected based on same analysis as claim 5.
As to claim 6, Noh discloses the upper electrode (151) of the storage capacitor (Cst) comprises Ti (Pars. 135, 140, e.g. 151 may be formed of the same material as 133).
As to claim 19, Noh teaches the display apparatus of claim 6 above. The limitation of claim 19 is substantially similar to claim 6. Accordingly, claim 19 is rejected based on same analysis as claim 6.
As to claim 7, Noh discloses the storage capacitor (Cst) overlaps the first gate electrode (132) (Figs. 2, 4C, Par. 92, e.g. lower electrode of Cst 133 partially overlaps gate electrode 132) .
As to claim 20, Noh teaches the display apparatus of claim 7 above. The limitation of claim 20 is substantially similar to claim 7. Accordingly, claim 20 is rejected based on same analysis as claim 7.
As to claim 8, Noh discloses the second insulating layer (114) is disposed between the first gate electrode (132) and the lower electrode of the storage capacitor (114) (Fig. 2, Pars. 77, 92).
As to claim 9, Noh discloses the first semiconductor (131) comprises a silicon semiconductor material (Pars. 67, 112) and the second semiconductor (140) comprises an oxide semiconductor material (Pars. 69, 73).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 10, 14, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2018/0033849 A1 to Noh et al. (Noh) in view of US 2017/0170206 A1 to Lee et al. (Lee).
As to claim 10, Noh does not expressly disclose the first insulating layer and the second insulating layer are disposed in the first area and the second area, and wherein the first insulating layer and the second insulating layer have openings corresponding to the bending area.
Lee discloses the insulating layers (120, 290, 250, 240, 230, 220) are disposed in the first area (display area) and the second area (non-display area) (Fig. 7, Pars. 48, 54-55), and wherein the insulating layers (120, 290, 250, 240, 230, 220) have openings (CH4, CH5) corresponding to the bending area (Figs. 7, 10, Par. 72).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to have modified Noh with the teaching of Lee to prevent crack from occurring in lines of a bending area as suggested by Lee (Par. 20).
As to claim 14, Noh does not expressly disclose an inner wire in the first area and an outer wire in the second area, wherein the electronic device is connected to the display apparatus by the outer wire.
Lee discloses an inner wire (150-151) in the first area (display area) and an outer wire (153) in the second area (non-display area) (Figs. 6-7, Pars. 70, 72), wherein the electronic device is connected to the display apparatus by the outer wire (153)(Figs. 6-7, Pars. 70, 72).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to have modified Noh with the teaching of Lee to enable the display to be connected to an external system thereby provide an improved display device as suggested by Lee (Par. 70).
As to claim 15, Noh does not expressly disclose a connection wire connecting the inner wire and the outer wire, and the connection wire is disposed over the bending area.
Lee discloses a connection wire (280) connecting the inner wire (150-151) and the outer wire (153) (Figs. 6-7, Pars. 70, 72), and the connection wire is disposed over the bending area (Figs. 6-7, Pars. 70, 72).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to have modified Noh with the teaching of Lee to enable the display to be connected to an external system thereby provide an improved display device as suggested by Lee (Par. 70).
Claim(s) 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2018/0033849 A1 to Noh et al. (Noh) in view of US 2017/0170206 A1 to Lee et al. (Lee); further in view of US 2014/0217397 A1 to Kwak et al. (Kwak).
As to claim 11, Noh does not expressly disclose the display apparatus of claim 10, further comprising an organic material layer filling the openings.
Kwak discloses an organic material layer filling the openings (opening in 269C in NA region) (Fig. 2C, Par. 146).
Before the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art to have modified Noh with the teaching of Kwak to minimize the impact of bending of the display device as suggested by Kwak (Par. 145).
As to claim 12, Noh as modified a connection wire (220C) disposed on the organic material layer (269C) (Fig. 2C, Par. 145). See claim 11 motivation above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 9,214,508 B2 to Cho et al. teaches a display with a TFT substrate comprising a first source, first drain, and second gate electrodes are between the intermediate insulating layer and the oxide layer, and wherein the second source and the second drain electrodes are on the oxide semiconductor layer .
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JARURAT SUTEERAWONGSA whose telephone number is (571)270-7361. The examiner can normally be reached Monday thru Thursday, 8:30AM to 4:00PM, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen can be reached at 571-272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JARURAT SUTEERAWONGSA/Examiner, Art Unit 2623
/CHANH D NGUYEN/Supervisory Patent Examiner, Art Unit 2623
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