DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1-2 are objected to because of the following informalities:
Claim 1, Line 20, “a coupling effect” should be rewritten as –another coupling effect --;
Claim 2, Line 8 "the other side" should be rewritten as –another side--;
Claim 2, Line 15, “a coupling effect” has been rewritten as –another coupling effect--.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 3-8 and 10-12 depend upon rejected claim 1 and inherit the deficiency thereby.
Claims 1 and 2, all recitations of the term “pair” is unclear to one of ordinary skill in the art as to the location and placement of each “pair”, thereby leaving the boundaries of the claim unclear.
Claim 9, Line 2, “electrostatic discharge (ESD) diodes” is unclear to one of ordinary skill in the art how the ESD is related to the first, second, and third “capacitor pairs” as previously defined in claim 1, from which this claim depends, thereby leaving the boundaries of the claim unclear.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-5 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Vemula et al (US 9537462).
As per Claim 1:
Vemula et al discloses in Figure 7:
An electronic device (“a computer program product”, [Col. 8, Lines 1-6]) comprising a common pin pair (“receiver port” 710 and “transmitter port” 720) receiving (“receiver circuit”, 750) or transmitting (“transmitter circuit”, 740) a differential signal (“circuit” 700 comprises a “differential inductor” 730 and therefore inherently transmits and receives a differential signal accordingly, [Col. 6, Lines 29-34]).
Vemula et al does not disclose:
A bandwidth expansion circuit coupled to the common pin pair comprising a first inductor pair with a first and second inductor having a coupling effect and connected between the common pin pair and a node pair, a second inductor pair with a third and fourth inductor having a coupling effect and connected to the first inductor pair through the node pair, a first capacitor pair connected between the node pair and ground, a second capacitor pair connected to the common pin pair and ground, and a third capacitor pair connected between the second inductor pair and ground.
Vemula et al discloses in Figure 12:
A bandwidth expansion circuit (“circuit”, 1200) coupled to the common pin pair (IN1 and IN2) comprising a first inductor pair (“inductors”, 1230 and 1234) with a first inductor (1230) and a second inductor (1234) having a coupling effect (inductors 1230 and 1234 inherently have a coupling effect due to the common connection to the output “OUT”) and connected between the common pin pair (IN1 and IN2) and a node pair (N1 and N2, as shown below in annotated Image 1), a second inductor pair (“inductors”, 1232 and 1236) with a third inductor (1232) and a fourth inductor (1236) having a coupling effect (1232 and 1236 inherently have a coupling effect due to the common connection to the output “OUT”) and connected to the first inductor pair (1230 and 1234) through the node pair (N1 and N2, as is evident in Figure 12 by the connection to the nodes N1 and N2 through the “switch” 1210 and 1240), a first capacitor pair (“capacitors”, 1222 and 1252) connected between the node pair (N1 and N2) and ground (as is evident by the common connection of the capacitors 1222 and 1252 to ground, shown in Figure 12), a second capacitor pair (“capacitors”, 1220 and 1250) connected to the common pin pair (IN1 and IN2) and ground (as is evident by the common connection of the capacitors 1220 and 1250 to ground, shown in Figure 12), and a third capacitor pair (“capacitors”, 1226 and 1256) connected between the second inductor pair (1232 and 1236) and ground (as is evident by the common connection of the capacitors 1226 and 1256 to ground, shown in Figure 12).
At the time of filing, it would have been obvious for one of ordinary skill in the art to modify the generic differential inductor (730) of Vemula et al with the specific differential inductor circuit as taught in FIG. 12 of Vemula et al to provide a substitution of art recognized equivalent elements with equivalent structures that perform the same function, especially since the generic nature of the differential inductor (730) would have suggested that any equivalent differential inductor, such as that taught by FIG. 12 of Vemula et al, would have been usable therein, thereby suggesting the obviousness of the combination.
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As per Claims 4-5:
The resultant combination discloses:
A receiving circuit (“receiver circuit”, 750) electrically connected to the node pair (N1 and N2, 750 is necessarily electrically connected to N1 and N2 by virtue of the obviousness combination, where N1 and N2 are evidently located), receiving the signal from the common pin pair (IN1 and IN2, as is evident by Figures 7 and 12), and a transmitting circuit (“transmitter circuit”, 740) electrically connected to the second inductor pair (“inductors”, 1232 and 1236, 740 is necessarily electrically connected to 1232 and 1236 by virtue of the obviousness combination), transmitting the signal to the common pin pair (“receiver port” 710 and “transmitter port” 720, as is evident by Figure 7 and IN1 and IN2 where the signal is necessarily transmitted by virtue of the obviousness combination).
As per Claim 10:
The resultant combination discloses:
The node pair (N1 and N2).
The resultant combination does not disclose:
The node pair is a pair of pins in a semiconductor package which comprises a semiconductor chip.
Vemula et al discloses in Figure 1:
The node pair (N1 and N2, as defined by the resultant combination) is a pair of pins in a semiconductor package (“IC Chip” 110 and “chip mounting structure” 150 inherently are the semiconductor package as a whole and the IC has a signal-connection terminal and is thereby inherently applied to the circuits of Figure 7 and 12, [Col. 3, Lines 38-41]) which comprises a semiconductor chip (“IC Chip”, 110)
At the time of filing, it would have been obvious for one of ordinary skill in the art to modify the generic integrated circuit (110) of Vemula et al to have included the resultant combination of Vemula et al to provide a substitution of art recognized equivalent elements with equivalent structures that perform the same function, especially since the generic nature of the integrated circuit (110) would have suggested that any equivalent circuit, such as that taught by the resultant combination of Vemula et al, would have been usable therein, thereby suggesting the obviousness of the combination.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ABIGAIL YALDO whose telephone number is (703)756-1784. The examiner can normally be reached Monday - Friday 7 AM - 4 PM.
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/ABIGAIL AMIR YALDO/ Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/ Supervisory Patent Examiner, Art Unit 2843
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