DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant's election with traverse of Species A, drawn to Fig. 9-10, in the reply filed on 02/22/2026 is acknowledged. The traversal is on the ground(s) that Applicant deems five species to be a reasonable number of species to examine. This is not found persuasive because the Examiner finds that Applicant’s five species are unduly burdensome to examine.
The requirement is still deemed proper and is therefore made FINAL.
Claims 2, 4, 6, 8-12, and 18 are allowable. The restriction requirement, as set forth in the Office action mailed on 12/30/2025, has been reconsidered in view of the allowability of some claims to the elected invention pursuant to MPEP § 821.04(a). The restriction requirement is hereby withdrawn as to any claim that requires all the limitations of an allowable claim. Claims 6-8, directed to non-elected species, are no longer withdrawn from consideration because the claim(s) requires all the limitations of an allowable claim. However, claim 20 remains withdrawn from consideration because it does not depend from any allowable claim.
In view of the above noted withdrawal of the restriction requirement, applicant is advised that if any claim presented in a divisional application is anticipated by, or includes all the limitations of, a claim that is allowable in the present application, such claim may be subject to provisional statutory and/or nonstatutory double patenting rejections over the claims of the instant application.
Once a restriction requirement is withdrawn, the provisions of 35 U.S.C. 121 are no longer applicable. See In re Ziegler, 443 F.2d 1211, 1215, 170 USPQ 129, 131-32 (CCPA 1971). See also MPEP § 804.01.
Claim 20 remains withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, claim 20 being dependent from no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 02/22/2026.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the feature(s) “an upper surface of the dummy semiconductor layer includes a plurality of second protrusions” must be shown or the feature(s) canceled from the claim(s).
No new matter should be entered.
The drawings are objected to because:
Solid black shading is not permitted. See 37 CFR 1.84(m). See Fig. 1, for example, which includes solid black in a status bar, and solid black in a partly cloudy icon.
Fewer than all drawings are “grouped together and arranged on the sheet(s) without wasting space” as required by 37 CFR 1.84(h). See Fig. 1, for example. The Examiner suggests enlarging and rotating some drawings in order to occupy more of the available space on some sheets.
Fewer than all lines are “uniformly thick and well-defined” as required by 37 CFR 1.84(l). See Fig. 4, for example.
The shape of G4 is unclear in Fig. 8. See especially the right end of Fig. 8, wherein it is unclear whether G4 ends where P-Si-2 ends, or whether G4 extends beyond P-Si-2 to a dashed line.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “P2” has been used to designate both a protrusion in G3-1 and a protrusion in G4-1. See Fig. 9, for example.
The Examiner encourages Applicant to proofread spelling of words within the drawings. See Fig. 16, for example.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 5 and 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “an upper surface of the first dummy gate electrode includes a plurality of second protrusions” (emphasis added). Claim 5 recites “an upper surface of the dummy semiconductor layer includes a plurality of second protrusions” (emphasis added). Claim 7 recites “an upper surface of the second dummy gate electrode includes a plurality of second protrusions” (emphasis added). The use of the same nomenclature for different parts obfuscates the metes and bounds of claims 3, 5, and 7. The Examiner suggests the consistent use of distinct nomenclature for each distinct part of the claimed device.
Regarding claims 3, 5, and 7: In the absence of a reasonably definite interpretation of a claim, it is improper to rely on speculative assumptions regarding the meaning of a claim and then base a rejection under 35 U.S.C. 103 on these assumptions (In re Steele, 305 F.2d 859,134 USPQ 292 (CCPA 1962)). See MPEP 2143.03.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 13-17, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al (US 20220130933 A1) in view of Yeon et al (US 20230143126 A1).
As recited in independent claim 1, Yu et al show a display device (“a display panel provided by embodiments of the present disclosure” [0058]), comprising: a light-emitting element 0120 including an anode (“the light emitting component 0120 includes a first electrode, a light emitting functional layer, and a second electrode which are stacked. … the first electrode may be an anode” [0066]) and a cathode (“and the second electrode may be a cathode” [0066]); a first transistor T1 electrically connected (when T5 is conductive) between the anode (which is part of 0120 in Fig. 2A) and a first power line VDD, and switched by a voltage of a node (see gate of T1); a second transistor T2 electrically connected (when T5 is conductive) between the first transistor T1 and a data line VD, and switched by a write scan signal GA3; and a third transistor T3 electrically connected between the node (see gate of T1) and the anode (which is part of 0120 in Fig. 2A), and switched by a compensation scan signal GA2, wherein the third transistor T3 includes: an oxide semiconductor layer (“the oxide active layer of the threshold compensation transistor T3” [0096]) including a source area (on one side of T3-A), a drain area (on the other side of T3-A), and a channel area T3-A disposed between the source area (on one side of T3-A) and the drain area (on the other side of T3-A); and a gate electrode GA2 disposed on the channel area T3-A.
As recited in independent claim 1, Yu et al are silent regarding whether an upper surface of each of the source area, the drain area, and the channel area includes a plurality of first protrusions.
As recited in independent claim 1, Yeon et al show that an upper surface (see upper surface in Fig. 16, for example) of each of a source area (on one side of 414a), a drain area (on the other side of 414a), and a channel area 414a includes a plurality of first protrusions (see upper surfaces in Fig. 16). (Although Yeon et al shows these features in first and second transistors, [0055] discloses “although only the driving thin film transistor DT and one switching thin film transistor ST are disclosed in the drawings, this is for convenience of description”, meaning that the teachings of Yeon et al are applicable to any transistor within a pixel circuit, rather than limited in applicability to the illustrated first and second transistors.)
Moreover, the Examiner finds that first protrusions were predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to apply protrusions to the upper surface of the third transistor of Yu et al as taught by Yeon et al. The rationale is as follows: one of ordinary skill in the art would have had reason to arrive at the recited shape in the course of routine optimization of an S factor for any transistor, including the third transistor, as taught by Yeon et al (“When the surface treating layer 115 is formed on the upper surface of the first semiconductor layer 114 of the driving thin film transistor DT, the roughness of the upper surface of the first semiconductor layer 114 is increased. As the roughness increases, distortion occurs at the interface of the upper surface of the first semiconductor layer 114. Since this distortion reduces the speed of current increase when the voltage is applied, the S-factor of the driving thin film voltage is applied, the S-factor of the driving thin film transistor DT increases due to the increase of the roughness” [0100]; “although only the driving thin film transistor DT and one switching thin film transistor ST are disclosed in the drawings, this is for convenience of description.” [0055]).
As recited in claim 13, Yu et al are silent regarding a first insulation layer disposed between the gate electrode and the oxide semiconductor layer; and a second insulation layer disposed on the gate electrode.
As recited in claim 13, Yeon et al show a first insulation layer 445 between a gate electrode 478 and an oxide semiconductor layer 474; and a second insulation layer 446 disposed on the gate electrode 478 (see Fig. 15).
Moreover, the Examiner finds that first and second insulation layers were predictable prior to the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to include first and second insulation layers in the recited locations as taught by Yeon et al. The rationale is as follows: A person of ordinary skill in the art would have had reason to insulate the gate from its surrounding structures in order to prevent shorting of the gate so as to ensure that the third transistor functions as intended as is readily apparent from the structure of Yeon et al and as was known in the art prior to the effective filing date.
As recited in claim 14, Yu et al are silent regarding whether an upper surface of the first insulation layer includes a plurality of first dummy protrusions, and an upper surface of the second insulation layer includes a plurality of second dummy protrusions.
As recited in claim 14, Yeon et al show that an upper surface of first insulation layer 445 includes a plurality of first dummy protrusions (see rough upper surface of 445 in Fig. 15, for example), and an upper surface of the second insulation layer 446 includes a plurality of second dummy protrusions (see upper surface of 446 in Fig. 15).
Moreover, the Examiner finds that dummy protrusions were predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to include dummy protrusions in first and second insulation layers as suggested by Yeon et al. The rationale is as follows: one of ordinary skill in the art would have had reason to upwardly propagate the rough surface from layer to layer as taught by Yeon et al (see appearance of Fig. 15 and its description at [0209]-[0211]).
As recited in claim 15: Yu et al shows a fourth transistor T6 electrically connected between the node (see gate of T1) and an initialization line VINIT, and switched by an initialization scan line GA1.
As recited in claim 16: Yu et al show that the fourth transistor T6 and the third transistor T3 have a same lamination structure (see especially Figs. 4C and 6A; “For example, FIG. 4C schematically shows a second channel area T6-A of the oxide active layer of the initialization transistor T6 and a second channel area T3-A of the oxide active layer of the threshold compensation transistor T3” [0096]).
As recited in independent claim 17, Yu et al show a display device (“a display panel provided by embodiments of the present disclosure” [0058]), comprising: a light-emitting element 0120 including an anode (“the light emitting component 0120 includes a first electrode, a light emitting functional layer, and a second electrode which are stacked. … the first electrode may be an anode” [0066]) and a cathode (“and the second electrode may be a cathode” [0066]); a first transistor T1 electrically connected (when T5 is conductive) between the anode (which is part of 0120 in Fig. 2A) and a first power line VDD, and switched by a voltage of a node (see gate of T1); a second transistor T2 electrically connected (when T5 is conductive) between the first transistor T1 and a data line VD, and switched by a write scan signal GA3; a third transistor T3 electrically connected between the node (see gate of T1) and the anode (which is part of 0120 in Fig. 2A), and switched by a compensation scan signal GA2; wherein the third transistor T3 includes: an oxide semiconductor layer (“the oxide active layer of the threshold compensation transistor T3” [0096]) including a source area (on one side of T3-A), a drain area (on the other side of T3-A), and a channel area T3-A disposed between the source area (on one side of T3-A) and the drain area (on the other side of T3-A); and a gate electrode GA2 disposed on the channel area T3-A.
As recited in independent claim 17, Yu et al are silent regarding a dummy semiconductor layer disposed under the third transistor, wherein each of an upper surface of the dummy semiconductor layer and an upper surface of the oxide semiconductor layer includes a plurality of protrusions.
As recited in independent claim 17, Yeon et al show a dummy semiconductor layer BSM-1 disposed under (see Fig. 15, for example) a transistor DT, wherein each of an upper surface (upper surface in Fig. 15) of the dummy semiconductor layer BSM-1 and an upper surface (upper surface in Fig. 15) of the oxide semiconductor layer 474 includes a plurality of protrusions (see shape of upper surfaces in Fig. 15).
Moreover, the Examiner finds that a dummy semiconductor and protrusions were predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to include a dummy semiconductor layer with protrusions, and to include protrusions on an upper surface of the oxide semiconductor of Yu et al as taught by Yeon et al. The rationale is as follows: one of ordinary skill in the art would have had reason to block light in order to prevent afterimage or deterioration of transistor performance as taught by Yeon et al (“reduces a back-channel phenomenon caused by charges trapped from the first substrate 110 to prevent or at least reduce an afterimage or deterioration of transistor performance” [0058]) and to arrive at the recited shape in the course of routine optimization of S-factor of the third transistor of Yu et al as taught by Yeon et al (“the roughness of the upper surface of the first semiconductor layer 114 is increased. As the roughness increases, distortion occurs at the interface of the upper surface of the first semiconductor layer 114. Since this distortion reduces the speed of current increase when the voltage is applied, the S-factor of the driving thin film transistor DT increases due to the increase of the roughness” [0100]).
As recited in independent claim 19, Yu et al show an electronic device (“any product or component with a display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigator” [0156]), comprising: a display device (“with a display function” [0156]), comprising: a display panel (“a display panel provided by embodiments of the present disclosure” [0058]) comprising: a light-emitting element 0120 including an anode (“the light emitting component 0120 includes a first electrode, a light emitting functional layer, and a second electrode which are stacked. … the first electrode may be an anode” [0066]) and a cathode (“and the second electrode may be a cathode” [0066]); a first transistor T1 electrically connected (when T5 is conductive) between the anode (which is part of 0120 in Fig. 2A) and a first power line VDD, and switched by a voltage of a node (see gate of T1); a second transistor T2 electrically connected (when T5 is conductive) between the first transistor T1 and a data line VD, and switched by a write scan signal GA3; and a third transistor T3 electrically connected between the node (see gate of T1) and the anode (which is part of 0120 in Fig. 2A), and switched by a compensation scan signal GA2, wherein the third transistor T3 includes: an oxide semiconductor layer (“the oxide active layer of the threshold compensation transistor T3” [0096]) including a source area (on one side of T3-A), a drain area (on the other side of T3-A), and a channel area T3-A disposed between the source area (on one side of T3-A) and the drain area (on the other side of T3-A); and a gate electrode GA2 disposed on the channel area T3-A.
As recited in independent claim 19, Yu et al are silent regarding a processor; a memory having stored application programs for execution by the processor; wherein an upper surface of each of the source area, the drain area, and the channel area includes a plurality of first protrusions; and a user interface configured to sense user input via touch or cursor select of an icon presented on the display panel, wherein the processor is caused to execute one or more of the stored application programs upon receipt of the user input.
Regarding the limitations “a processor; a memory having stored application programs for execution by the processor; and a user interface configured to sense user input via touch or cursor select of an icon presented on the display panel, wherein the processor is caused to execute one or more of the stored application programs upon receipt of the user input”: Official notice is taken of the fact that “a processor; a memory having stored application programs for execution by the processor; and a user interface configured to sense user input via touch or cursor select of an icon presented on the display panel, wherein the processor is caused to execute one or more of the stored application programs upon receipt of the user input” was known in the art prior to the effective filing date.
Moreover, the Examiner finds that a processor; a memory having stored application programs for execution by the processor; and a user interface configured to sense user input via touch or cursor select of an icon presented on the display panel, wherein the processor is caused to execute one or more of the stored application programs upon receipt of the user input was predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to include a processor; a memory having stored application programs for execution by the processor; and a user interface configured to sense user input via touch or cursor select of an icon presented on the display panel, wherein the processor is caused to execute one or more of the stored application programs upon receipt of the user input in the device of Yu et al. The rationale is as follows: one of ordinary skill in the art would have had reason to use a smartphone as the mobile telephone of Yu et al so as to succumb to longstanding market pressure toward multifunctionality as was known in the art.
Regarding the limitation “an upper surface of each of the source area, the drain area, and the channel area includes a plurality of first protrusions”: See teachings, findings, and rationale above for independent claims 1 and 17.
Allowable Subject Matter
Claims 2, 4, 6, 8-12, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2 and its dependent claim(s): The prior art of record neither shows nor suggests a first dummy gate electrode.
Regarding claim 18: The prior art of record neither shows nor suggests a first dummy gate electrode.
Conclusion
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to Julie Anne Watko whose telephone number is (571)272-7597. The examiner can normally be reached Monday-Tuesday 9AM-5PM, Wednesday 10:30AM-5PM, Thursday-Friday 9AM-5PM, and occasional Saturdays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
JULIE ANNE WATKO
Primary Examiner
Art Unit 2627
/Julie Anne Watko/Primary Examiner, Art Unit 2627
05/10/2026
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