DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 04/21/2026 has been considered by Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-8, 10, and 12-17 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al (US 2024/0177659 A1) in view of Wang et al (US 2022/015799 A1).
Claim 1, Liu (Fig. 1A-19C) discloses a display device (Fig. 1B; wherein figure shows display device with RGB pixel arrangement) comprising:
a substrate (001; Fig. 18 and 2; wherein discloses a based substrate);
an anode electrode (Paragraph [0132]; wherein discloses a first electrode is the anode; 61; Fig. 15, 16, and 18) on the substrate (001; Fig. 18); and
a first voltage line (32; Fig. 8) between the substrate (001; Fig. 18) and the anode electrode (61; Fig. 18).
Liu does not expressly disclose a first voltage line configured to receive a negative voltage,
wherein in the first voltage line, a first portion overlapping the anode electrode has a width greater than a second portion not overlapping the anode electrode and the first portion has a same size on both sides of the first voltage line with respect to a central longitudinal axis of the first voltage line.
Wang (Fig. 1-5) discloses a first voltage line (INT2; Fig. 8) configured to receive a negative voltage (Paragraph [0079]; wherein discloses -3V),
wherein in the first voltage line (INT2; Fig. 8), a first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 below) overlapping the anode electrode (See figure 16 below; 201; Fig. 17) has a width greater (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 below) than a second portion (See figure 8 below) not overlapping the anode electrode (See figure 16 below; 201; Fig. 17) and the first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 below) has a same size on both sides (Fig. 8; wherein figure shows wider portion has the same size on both sides) of the first voltage line (INT2; Fig. 7) with respect to a central longitudinal axis (Fig. 8; wherein INT2 has wider potion with respect to a central longitudinal axis) of the first voltage line (INT2; Fig. 7).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Liu’s display device by applying voltage supply signals, as taught by Wang, so to use a display device with voltage supply signals for providing can alleviate the flicker problem caused by the excessive leakage current under the condition of low frame rate driving, and has good display quality (Paragraph [0068]).
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Claim 13, Liu (Fig. 1A-19C) discloses a display device (Fig. 1B; wherein figure shows display device with RGB pixel arrangement) comprising:
a substrate (001; Fig. 18 and 2; wherein discloses a based substrate);
first to third (P1-P3; Fig. 2) light emitting elements (OLED; Fig. 3) on the substrate (001; Fig. 2 and 18) and respectively including first to third anode electrodes (611, 612, and 613; Fig. 16) respectively in first to third sub-pixel areas (P1-P3; Fig. 2; R, G, B; Fig. 15) and
a first voltage line (32; Fig. 8) between the substrate (001; Fig. 18) and the first to third anode electrodes (611, 612, and 613; Fig. 16; 61; Fig. 18).
Liu does not expressly disclose a first voltage line configured to receive a negative voltage,
wherein in the first voltage line, at least one first portion has a width greater than a second portion other than the first portion, and
wherein the first portion overlaps at least one of the first to third anode electrodes and the first portion has a same size on both sides of the first voltage line with respect to a central longitudinal axis of the first voltage line.
Wang (Fig. 1-5) discloses a first voltage line (INT2; Fig. 8) configured to receive a negative voltage (Paragraph [0079]; wherein discloses -3V),
wherein in the first voltage line (INT2; Fig. 8), a first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) has a width greater (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) than a second portion (See figure 8 above) not overlapping the anode electrode (See figure 16 above; 201; Fig. 17) and
wherein the first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) overlaps at least one of the first to third anode electrodes (See figure 16 above; 201; Fig. 17) and the first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) has a same size on both sides (Fig. 8; wherein figure shows wider portion has the same size on both sides) of the first voltage line (INT2; Fig. 7) with respect to a central longitudinal axis (Fig. 8; wherein INT2 has wider potion with respect to a central longitudinal axis) of the first voltage line (INT2; Fig. 7).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Liu’s display device by applying voltage supply signals, as taught by Wang, so to use a display device with voltage supply signals for providing can alleviate the flicker problem caused by the excessive leakage current under the condition of low frame rate driving, and has good display quality (Paragraph [0068]).
Claim 2, Liu (Fig. 1A-19C) discloses further comprising:
an insulating layer (71 and 75; Fig. 18;) between the anode electrode (61; Fig. 18) and the first voltage line (41; Fig. 15 and 18), wherein an upper surface of the insulating layer (75; Fig. 18) contacts the anode electrode (61; Fig. 18), and a lower surface of the insulating layer (71; Fig. 18) contacts the first voltage line (41; Fig. 18).
Claim 4, Liu (Fig. 1A-19C) discloses wherein the first voltage line (41; Fig. 12A) is configured to receive an anode initialization voltage (Paragraph [0103]; wherein discloses “The third initialization signal line 41 is electrically connected with one of the first initialization signal line 31 and the second initialization signal line 32”; Init2; Fig. 3).
Claim 5, Liu (Fig. 1A-19C) discloses wherein the first voltage line (41; Fig. 12A) is configured to receive a gate initialization voltage (Paragraph [0103]; wherein discloses “The third initialization signal line 41 is electrically connected with one of the first initialization signal line 31 and the second initialization signal line 32”; Init1; Fig. 3; 31; Fig. 13).
Claim 6, Liu (Fig. 1A-19C) discloses further comprising:
a first transistor (T3; Fig. 3) connected between a first power source voltage line (VDD; Fig. 3) and the anode electrode (OLED; Fig. 3) and having a gate electrode connected to a first node (N1; Fig. 3);
a second transistor (T1; Fig. 3) connected between the first node (N1; Fig. 3) and a first initialization voltage line (Init1; Fig. 3) and having a gate electrode connected to a first gate line (Re1; Fig. 3);
a third transistor (T7; Fig. 3) connected between the anode electrode (OLED; Fig. 3) and a second initialization voltage line (Init2; Fig. 3) and having a gate electrode connected to a second gate line (Re2; Fig. 3); and
a light emitting element (OLED; Fig. 3) connected between the anode electrode (Fig. 16) and a second power source voltage line (VSS; Fig. 3).
Claim 7, Liu (Fig. 1A-19C) discloses wherein the second initialization voltage line (Paragraph [0103]; wherein discloses “The third initialization signal line 41 is electrically connected with one of the first initialization signal line 31 and the second initialization signal line 32”; Init2; Fig. 3) is the first voltage line (41; Fig. 21A).
Claim 8, Liu (Fig. 1A-19C) discloses wherein the first initialization voltage line (Paragraph [0103]; wherein discloses “The third initialization signal line 41 is electrically connected with one of the first initialization signal line 31 and the second initialization signal line 32”; Init1; Fig. 3) is the first voltage line (41; Fig. 13).
Claim 10, Liu (Fig. 1A-19C) discloses further comprising:
a second voltage line (42; Fig. 9) on the substrate (001; Fig. 18) and configured to receive a positive voltage (Paragraph [0107]; wherein discloses “the first power supply lines 42 provide a first power supply voltage Vdd for a first power supply signal terminal VDD of the pixel driving circuit”).
Claim 12, Liu (Fig. 1A-19C) discloses wherein the second voltage line (42; Fig. 9) is configured to receive a power source voltage (Paragraph [0107]; wherein discloses “the first power supply lines 42 provide a first power supply voltage Vdd for a first power supply signal terminal VDD of the pixel driving circuit”).
Claim 14, Liu (Fig. 1A-19C) discloses wherein the first to third light emitting elements (P1-P3; Fig. 1B) are configured to emit light of different colors (Paragraph [0018]).
Claim 15, Liu (Fig. 1A-19C) discloses wherein the first light emitting element (P1; Fig. 1B) is configured to emit red light (Paragraph [0064]; wherein discloses “the first color sub-pixel P1 may be a red sub-pixel (R) emitting red light”), wherein the second light emitting element (P3; Fig. 1B) is configured to emit green light (Paragraph [0064]; wherein discloses “The third color sub-pixel P3 may be a green sub-pixel (G) emitting green light”), and wherein the third light emitting element (P2; Fig. 1B) is configured to emit blue light (Paragraph [0064]; wherein discloses “The second color sub-pixel P2 may be a blue sub-pixel (B) emitting blue light”).
Claim 16, Liu (Fig. 1A-19C) discloses wherein the first portion (53-533; Fig. 10) overlaps one of the first to third anode electrodes (613; Fig. 16).
Claim 17, Liu (Fig. 1A-19C) discloses wherein the first portion (53-531 and 53-532; Fig. 10) overlaps each of two or more of the first to third anode electrodes (611 and 612; Fig. 16).
Claim 3 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al (US 2024/0177659 A1) in view of Wang et al (US 2022/015799 A1) as applied to claims 2 and 10 above, and further in view of Fujita (US 2012/0229438 A1).
Claim 3, Liu in view of Wang discloses the display device of claim 2.
Liu in view of Wang does not expressly disclose wherein the anode electrode and the first voltage line constitute a capacitor.
Fujita (Fig. 1-22) discloses wherein the anode electrode (Pixel Electrode (Anode); Fig. 13) and the first voltage line (81a; Fig. 13 and 12) constitute a capacitor (Cds; Fig. 7; Paragraph [0128]; wherein discloses shielding wires set to same potential as Vel (element 116) and therefore provides a capacitance between anode and voltage line).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Liu in view of Wang’s display device by applying a capacitance, as taught by Fujita, so to use a display device with a capacitance for preventing the display quality from being degraded due to noise which is caused by the potential fluctuation of the data line (Paragraph [0007]).
Claim 11, Liu in view of Wang discloses the display device of claim 10.
Liu in view of Wang does not expressly disclose wherein the second voltage line is configured to receive a data voltage.
Fujita (Fig. 1-22) discloses wherein the second voltage line (114; Fig. 6 and 7) is configured to receive a data voltage (Paragraph [0046]).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Liu in view of Wang’s display device by applying an auxiliary routing line, as taught by Fujita, so to use a display device with an auxiliary routing line for preventing the display quality from being degraded due to noise which is caused by the potential fluctuation of the data line (Paragraph [0007]).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Liu et al (US 2024/0177659 A1) in view of Wang et al (US 2022/015799 A1) as applied to claim 1 above, and further in view of Kim (US 2023/0217749 A1).
Claim 9, Liu in view of Wang discloses the display device of claim 1.
Liu in view of Wang does not expressly disclose wherein the first voltage line includes titanium and aluminum.
Kim (Fig. 1-7) discloses wherein the first voltage line (200; Fig. 6) includes titanium and aluminum (Paragraph [0056]; wherein discloses “the shielding metal 200 may be formed in a three-layer structure in which titanium, aluminum, and titanium are sequentially laminated”).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Liu in view of Wang’s display device by applying a shielding layer, as taught by Kim, so to use a display device with a shielding layer for preventing a parasitic coupling between different size sub-pixels (Paragraph [0007]).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Ka et al (US 2019/0130835 A1) in view of Liu et al (US 2024/0177659 A1) and Wang et al (US 2022/015799 A1).
Claim 18, Ka (Fig. 1, 2, and 9) disclose an electronic device (Fig. 1; wherein discloses a display device), comprising:
a processor (9; Fig. 1) configured to provide input image data (Paragraph [0053]; wherein discloses “processor may supply an image signal”); and
a display device (Fig. 1) configured to display (40; Fig. 1) an image based on the input image data (Paragraph [0055]; wherein disclose “the pixel unit 40 may display an image that is partially (spatially) dark and bright according to image signals”).
Ka does not expressly disclose wherein the display device comprises:
a substrate;
an anode electrode on the substrate; and
a first voltage line between the substrate and the anode electrode.
wherein in the first voltage line, a first portion overlapping the anode electrode has a width greater than a second portion not overlapping the anode electrode.
Liu (Fig. 1A-19C) discloses wherein the display device (Fig. 1B; wherein figure shows display device with RGB pixel arrangement) comprises:
a substrate (001; Fig. 18 and 2; wherein discloses a based substrate);
an anode electrode (Paragraph [0132]; wherein discloses a first electrode is the anode; 61; Fig. 15, 16, and 18) on the substrate (001; Fig. 18); and
a first voltage line (52 and 53-532; Fig. 10 and 18; wherein discloses a second power supply line) between the substrate (001; Fig. 18) and the anode electrode (61; Fig. 18),
wherein in the first voltage line (52 and 53-532; Fig. 10 and 18), a first portion (53-532 or 53-531; Fig. 10) overlapping (Paragraph [0148]) the anode electrode (61; Fig. 18 and 16) has a width greater than (Figure 10 clearly shows a portion of the fourth conductive layer which has a larger width that overlaps with the anode electrode) a second portion (52; Fig. 10) not overlapping the anode electrode (61; Fig. 18 and 16).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Ka’s display device by applying a display layering, as taught by Liu’s, so to use a display device with a display layering for thereby significantly reducing impedance of the initialization signal lines and improving picture quality (Paragraph [0027]).
Ka in view of Liu does not expressly disclose a first voltage line configured to receive a negative voltage,
wherein in the first voltage line, a first portion overlapping the anode electrode has a width greater than a second portion not overlapping the anode electrode and the first portion has a same size on both sides of the first voltage line with respect to a central longitudinal axis of the first voltage line.
Wang (Fig. 1-5) discloses a first voltage line (INT2; Fig. 8) configured to receive a negative voltage (Paragraph [0079]; wherein discloses -3V),
wherein in the first voltage line (INT2; Fig. 8), a first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) overlapping the anode electrode (See figure 16 above; 201; Fig. 17) has a width greater (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) than a second portion (See figure 8 above) not overlapping the anode electrode (See figure 16 above; 201; Fig. 17) and the first portion (Fig. 8; wherein figure shows potions of the wiring INT2 which are wider; See figure 8 above) has a same size on both sides (Fig. 8; wherein figure shows wider portion has the same size on both sides) of the first voltage line (INT2; Fig. 7) with respect to a central longitudinal axis (Fig. 8; wherein INT2 has wider potion with respect to a central longitudinal axis) of the first voltage line (INT2; Fig. 7).
Before the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify Ka in view of Liu’s display device by applying voltage supply signals, as taught by Wang, so to use a display device with voltage supply signals for providing can alleviate the flicker problem caused by the excessive leakage current under the condition of low frame rate driving, and has good display quality (Paragraph [0068]).
Response to Arguments
Applicant's arguments with respect to claims 1-18 have been considered but are moot in view of the new ground(s) of rejection.
In view of arguments, the references of Ka et al (US 2019/0130835 A1), Liu et al (US 2024/0177659 A1), Wang et al (US 2022/015799 A1), Kim (US 2023/0217749 A1), and Fujita (US 2012/0229438 A1) have been used for new ground rejection.
Claims 1, 13, and 18 are is rejected in view of newly discovered reference(s) to Wang et al (US 2022/015799 A1).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM J SNYDER whose telephone number is (571)270-3460. The examiner can normally be reached Monday-Friday 8am-4:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh D Nguyen can be reached at (571)272-7772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Adam J Snyder/Primary Examiner, Art Unit 2623 06/02/2026
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