DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
This application discloses and claims only subject matter disclosed in prior Application No. 18421958, filed 1/24/2024, and names the inventor or at least one joint inventor named in the prior application. Accordingly, this application may constitute a continuation or divisional. Should applicant desire to claim the benefit of the filing date of the prior application, attention is directed to 35 U.S.C. 120, 37 CFR 1.78, and MPEP § 211 et seq. The presentation of a benefit claim may result in an additional fee under 37 CFR 1.17(w)(1) or (2) being required, if the earliest filing date for which benefit is claimed under 35 U.S.C. 120, 121, 365(c), or 386(c) and 1.78(d) in the application is more than six years before the actual filing date of the application.
The priority date of claimed invention is 7/29/2016.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11527583. Although the claims at issue are not identical, they are not patentably distinct from each other because both applications recite substantially similar claim limitations.
19/199375
U.S. Patent No. 11527583
1. An electronic device comprising:
a display device configured to display an image and detect an external input; and
a frame to which the display device is fixed,
wherein the display device comprises:
a base layer;
touch electrodes disposed on the base layer;
signal lines electrically connected to the touch electrodes;
pads electrically connected to the signal lines;
a bank disposed between the touch electrodes and the pads; and
a capping pattern overlapping the bank and spaced apart from the signal lines,
wherein the bank comprises:
a first portion overlapping the signal lines and having a first thickness;
a second portion not overlapping the signal lines and having a second thickness greater than the first thickness; and
a third portion disposed between the first and second portions and having an inclined upper surface, and
wherein the capping pattern overlaps the third portion.
1. A display device comprising:
a base layer comprising a display area and a peripheral area adjacent to the display area;
a device layer disposed on the display area of the base layer and comprising light emitting elements;
an encapsulation layer disposed on the device layer;
a touch sensing layer disposed on the encapsulation layer, the touch sensing layer comprising electrodes and signal lines electrically connected to the electrodes, respectively;
a bank layer disposed on the peripheral area of the base layer and comprising a first portion having a first thickness, a second portion having a second thickness less than the first thickness, and a third portion disposed between the first portion and the second portion; and
a capping layer disposed on the third portion of the bank layer and disposed on the peripheral area of the base layer,
wherein a first distance between the base layer and an upper surface of the first portion of the bank layer is greater than a second distance between the base layer and an upper surface of the second portion of the base layer.
19/199375
U.S. Patent No. 11527583
20. An electronic device comprising:
a base layer;
a circuit layer disposed on the base layer;
a device layer disposed on the circuit layer;
an encapsulation layer disposed on the device layer and covering the device layer;
touch electrodes disposed on the encapsulation layer;
signal lines electrically connected to the touch electrodes;
pads disposed on the base layer and electrically connected to the signal lines;
a bank disposed between the touch electrodes and the pads and extending in a first direction; and
a capping pattern overlapping the bank and spaced from the signal lines in the first direction,
wherein the encapsulation layer does not overlap the bank.
1. A display device comprising:
a base layer comprising a display area and a peripheral area adjacent to the display area;
a device layer disposed on the display area of the base layer and comprising light emitting elements;
an encapsulation layer disposed on the device layer;
a touch sensing layer disposed on the encapsulation layer, the touch sensing layer comprising electrodes and signal lines electrically connected to the electrodes, respectively;
a bank layer disposed on the peripheral area of the base layer and comprising a first portion having a first thickness, a second portion having a second thickness less than the first thickness, and a third portion disposed between the first portion and the second portion; and
a capping layer disposed on the third portion of the bank layer and disposed on the peripheral area of the base layer,
wherein a first distance between the base layer and an upper surface of the first portion of the bank layer is greater than a second distance between the base layer and an upper surface of the second portion of the base layer.
Claim Objections
Claim 10 is objected to because of the following informalities:
Claim 10 need to spell out what is “PEDOT” because it is first time introduced the term.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Bae et al. (U.S. Patent Publication US 2016/0154499 A1, Assignee: Samsung, Published: 6/2/2016) in view of Park et al. (U.S. Patent Publication US 20160103537 A1 Published: 10/10/2014).
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Regarding claim 20, Bae discloses An electronic device comprising:
a base layer; (Fig. 4, [0109] “flexible substrate includes a first film 112 and a second film 113 “ [0056] “a substrate”)
a circuit layer disposed on the base layer; ([0115] The semiconductor 154 b may include a channel region 152 b, and source and drain regions 153 b and 155 b that are formed by doping to be disposed at opposite lateral sides of the channel region 152 b. The semiconductor 154 b may include amorphous silicon, polysilicon, or an oxide semiconductor.)
a device layer (Fig. 4, light-emitting member 370” of Fig. 4 and [0124]) disposed on the circuit layer;
an encapsulation layer disposed on the device layer and covering the device layer; (Fig. 4, [0070] “a touch electrode layer including first and second touch electrodes 410 and 420 is formed on the thin film encapsulation layer of the display area (S70).“ [0131] An encapsulation layer 280 may be disposed on the facing electrode 270. The encapsulation layer 280 encapsulates the light-emitting member 370 and the facing electrode 270 and may prevent permeation of moisture and/or oxygen. The encapsulation layer 280 may include a plurality of encapsulating thin films. The first touch electrodes 410 arranged in the first direction and the second touch electrodes 420 arranged in the second direction may be disposed on the encapsulation layer 280. The first touch electrodes 410 may be separated from each other, and may be connected to first connecting portions.)
touch electrodes disposed on the encapsulation layer; (Fig. 4, [0070] “a touch electrode layer including first and second touch electrodes 410 and 420 is formed on the thin film encapsulation layer of the display area (S70).“)
signal lines electrically connected to the touch electrodes; electrically ([0093] “first and second contact wires 411 and 421 may be disposed in the peripheral area PA of the display panel 300, as shown in FIG. 3, but alternatively, may be disposed in the touch active area TA. The second contact wires 421 are connected to second touch wires 423 through a second contact electrode 191_3 (shown in FIG. 5), and end portions of second touch wires 423 form a pad portion 450 in the peripheral area PA of the display panel 300.”)
pads disposed on the base layer and electrically connected to the signal lines; ([0093] The first and second contact wires 411 and 421 may be disposed in the peripheral area PA of the display panel 300, as shown in FIG. 3, but alternatively, may be disposed in the touch active area TA. The second contact wires 421 are connected to second touch wires 423 through a second contact electrode 191_3 (shown in FIG. 5), and end portions of second touch wires 423 form a pad portion 450 in the peripheral area PA of the display panel 300. [0177] End portions of the first and second touch wires 413 and 423 form a pad portion 450 in the peripheral area PA of the display panel 300.)
a bank (Fig 4, 411 [1046]) disposed between the touch electrodes and the pads and extending in a first direction; (Fig 4, 411 extending in X direction) and
wherein the encapsulation layer does not overlap the bank. (Fig 4, shows encapsulation layer 280 not overlap 411)
Bae does not disclose “a capping pattern overlapping the bank and spaced from the signal lines in the first direction,”
Park discloses “a capping pattern (Figs 3, 4 capping pattern from TL1 – BC1, [0066] – [0069]) overlapping the bank (Figs 3, 4 IL Layer, [0065]) and spaced from the signal lines (Figs 3, 4, BR, [0066] – [0069]) in the first direction,”
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate capping pattern by Park into device of Bae. The suggestion/motivation would have been to improve efficiency. (Park: [0011])
Allowable Subject Matter
Claims 13 – 19 are allowed.
Claims 1 would be allowable if rewritten or amended to overcome the double patenting rejection(s), set forth in this Office action.
Claim 20 would be allowable if rewritten or amended to overcome the double patenting rejection(s) and 35 U.S.C. 103, set forth in this Office action.
Claim 10 would be allowable if rewritten to overcome the double patenting rejection(s) and claim objection, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20050280002 A1 discloses different thickness of a layer.
U.S. Patent Publication US 2016/0154499 A1 discloses substrate layer on [0056]
U.S. Patent Publication US 20160103537 A1 discloses on layer structure on Fig. 4.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN-NAN LIN whose telephone number is (571)272-5646. The examiner can normally be reached Monday - Thursday 7:30am - 6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C Lee can be reached at 571-2722963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHUN-NAN LIN/Primary Examiner, Art Unit 2629