Prosecution Insights
Last updated: August 17, 2026
Application No. 19/200,826

METHOD, SYSTEM AND APPARATUS FOR FORMING METAL-INSULATOR-METAL AND/OR METAL-FERROELECTRIC-METAL DEVICE

Non-Final OA §102§103§112
Filed
May 07, 2025
Priority
May 10, 2024 — provisional 63/645,727
Examiner
MAYY, MOHAMMAD
Art Unit
Tech Center
Assignee
ASM IP Holding B.V.
OA Round
1 (Non-Final)
48%
Grant Probability
Moderate
1-2
OA Rounds
1y 11m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allowance Rate
202 granted / 419 resolved
-11.8% vs TC avg
Strong +23% interview lift
Without
With
+23.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
40 currently pending
Career history
459
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
62.9%
+22.9% vs TC avg
§102
7.5%
-32.5% vs TC avg
§112
22.5%
-17.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 419 resolved cases

Office Action

§102 §103 §112
Ding Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-40 pending Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-40 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 state “and converting the first crystalline form to a second crystalline form, responsive to the first in-plane tensile stress”. However, it is not clear what is meant by converting the first crystalline, “responsive to”. Does the applicant trying to link the step of converting to be performed only when a certain tensile stress is needed, and as a response to this need, the converting step is done. Or does the applicant is trying to claim that the converting step changing first to a second crystalline form would automatically form a second in-plane tensile stress in response to the presence of the first in-plane tensile stress using this converting step. For the sake of expedite prosecution the examiner interprets this as, the converting step changing a first crystalline form to a second crystalline form would automatically form a second in-plane tensile stress in response to the presence of the first in-plane tensile stress using this converting step. Claim 39 recites the limitation "the bottom metal liner" in page 40. There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-15 and 40 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Malhotra (PG Pub 2014/0187018 A1). Consider Claim 1, Malhotra teaches the process of deposition of composite film (Figures 2, 4 and 6), teaches the preparation of substrate (201/401/601) (figures 2, 4 and 6), teaches the deposition of first metal electrode (202/402/602) via PVD or CVD [0049], [0066]. Malhotra teaches the deposition of first metal liner (flash layer/capping layer) (204/404/606) via first cyclic ALD process [0047], [0057], [0068]. Malhotra teaches deposition of dielectric layer (206/406/604) using second cyclic ALD [0030], where the dielectric layer (206/406/604) is in electrical communication through the first metal liner (204/404/606) with first electrode (202/402/602), and where the first metal liner (204/404/606) physical contact with first electrode (202/402/602) (figures 2, 4 and 6). Malhotra teaches the process annealing the dielectric to convert the first crystalline phase (amorphous phase) into second crystalline phase (crystalline phase) after the formation of the second electrode [0043]. Where between the dielectric layer (206/406/604) and the first liner (204/404/606) a first interface (figures 2, 4 and 6). Malhotra does not teach the process of converting the dielectric layer leads to inducing a first in-plane tensile stress in the dielectric layer at a first interface. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer after the second metal electrode deposition step [0043], thus complete structure which include a first metal liner”. Since the “inducing a first in-plane tensile stress in the dielectric layer at a first interface” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer after the second metal electrode deposition step [0043], thus complete structure which include a first metal liner”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “inducing a first in-plane tensile stress in the dielectric layer at a first interface” unless essential process steps and/or limitations are missing from the applicant’s claims. PNG media_image1.png 566 594 media_image1.png Greyscale PNG media_image2.png 592 654 media_image2.png Greyscale PNG media_image3.png 654 688 media_image3.png Greyscale Consider Claim 2, Malhotra teaches the dielectric layer (in second crystalline form after annealing/converting) with higher K value [0043]. Consider Claims 3-4, Malhotra teaches the process of forming first liner (flash layer/capping) (606) using ALD under process temperature between 200-350 ℃ [0068], on surface of the dielectric layer (604) (figure 6). Consider Claims 5-8, Malhotra teaches the process of converting using annealing of the dielectric layer from amorphous phase (first crystalline phase) into crystalline phase (second crystalline phase) [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in; the first crystalline form is in a first non-centrosymmetric state and wherein the second crystalline form is in a second non-centrosymmetric state; the second non-centrosymmetric state comprises greater non-centrosymmetricity than the first non-centrosymmetric state; at least a portion of the first crystalline form is in an amorphous phase and the second crystalline form is in a crystalline orthorhombic phase or to a crystalline tetragonal phase; the first crystalline form comprises a first percentage of a crystalline orthorhombic phase and wherein the second crystalline form comprises a second percentage of the crystalline orthorhombic phase, wherein the second percentage is greater than the first percentage. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “the claimed results” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “the claimed results” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 9, Malhotra teaches the deposition of second metal liner layer (408) on the surface of the dielectric layer (406) (figure 4) where the dielectric layer is converted using annealing step forming second crystalline form [0043], and where the later layer of second metal liner (408) is heated to 200-350℃ [0068], as a further heating step of the dielectric layer to the second crystalline form. Consider Claims 10-11, Malhotra teaches deposition of first electrode on top of the substrate, and where the structure (first electrode and the substrate) is exposed to rapid thermal annealing [0041]. Consider Claims 12-13, Malhotra teaches the dielectric layer is converted using annealing step forming second crystalline form [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 14, Malhotra teaches the deposition of first metal electrode (202/402/602) via PVD or CVD [0049], [0066]. Consider Claim 15, Malhotra teaches the dielectric layer is converted using annealing step forming second crystalline form [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “the tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “the tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 40, Malhotra teaches the process of forming MIM, DRAM [0030]. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-15, 40 are rejected under 35 U.S.C. 103 as being unpatentable over Malhotra (PG Pub 2014/0187018 A1). Consider Claim 1, Malhotra teaches the process of deposition of composite film (Figures 2, 4 and 6), teaches the preparation of substrate (201/401/601) (figures 2, 4 and 6), teaches the deposition of first metal electrode (202/402/602) via PVD or CVD [0049], [0066]. Malhotra teaches the deposition of first metal liner (flash layer/capping layer) (204/404/606) via first cyclic ALD process [0047], [0057], [0068]. Malhotra teaches deposition of dielectric layer (206/406/604) using second cyclic ALD [0030], where the dielectric layer (206/406/604) is in electrical communication through the first metal liner (204/404/606) with first electrode (202/402/602), and where the first metal liner (204/404/606) physical contact with first electrode (202/402/602) (figures 2, 4 and 6). Malhotra teaches the process annealing the dielectric to convert the first crystalline phase (amorphous phase) into second crystalline phase (crystalline phase) after the formation of the second electrode [0043]. Where between the dielectric layer (206/406/604) and the first liner (204/404/606) a first interface (figures 2, 4 and 6). Malhotra does not teach the process of converting the dielectric layer leads to inducing a first in-plane tensile stress in the dielectric layer at a first interface. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer after the second metal electrode deposition step [0043], thus complete structure which include a first metal liner”. Since the “inducing a first in-plane tensile stress in the dielectric layer at a first interface” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer after the second metal electrode deposition step [0043], thus complete structure which include a first metal liner”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “inducing a first in-plane tensile stress in the dielectric layer at a first interface” unless essential process steps and/or limitations are missing from the applicant’s claims. PNG media_image1.png 566 594 media_image1.png Greyscale PNG media_image2.png 592 654 media_image2.png Greyscale PNG media_image3.png 654 688 media_image3.png Greyscale Consider Claim 2, Malhotra teaches the dielectric layer (in second crystalline form after annealing/converting) with higher K value [0043]. Consider Claims 3-4, Malhotra teaches the process of forming first liner (flash layer/capping) (606) using ALD under process temperature between 200-350 ℃ [0068], on surface of the dielectric layer (604) (figure 6). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). Consider Claims 5-8, Malhotra teaches the process of converting using annealing of the dielectric layer from amorphous phase (first crystalline phase) into crystalline phase (second crystalline phase) [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in; the first crystalline form is in a first non-centrosymmetric state and wherein the second crystalline form is in a second non-centrosymmetric state; the second non-centrosymmetric state comprises greater non-centrosymmetricity than the first non-centrosymmetric state; at least a portion of the first crystalline form is in an amorphous phase and the second crystalline form is in a crystalline orthorhombic phase or to a crystalline tetragonal phase; the first crystalline form comprises a first percentage of a crystalline orthorhombic phase and wherein the second crystalline form comprises a second percentage of the crystalline orthorhombic phase, wherein the second percentage is greater than the first percentage. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “the claimed results” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “the claimed results” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 9, Malhotra teaches the deposition of second metal liner layer (408) on the surface of the dielectric layer (406) (figure 4) where the dielectric layer is converted using annealing step forming second crystalline form [0043], and where the later layer of second metal liner (408) is heated to 200-350℃ [0068], as a further heating step of the dielectric layer to the second crystalline form. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). Consider Claims 10-11, Malhotra teaches deposition of first electrode on top of the substrate, and where the structure (first electrode and the substrate) is exposed to rapid thermal annealing [0041]. Consider Claims 12-13, Malhotra teaches the dielectric layer is converted using annealing step forming second crystalline form [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “increases a dielectric constant of the dielectric layer by 10%-100%; nor the increases a ferroelectricity of the dielectric layer” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 14, Malhotra teaches the deposition of first metal electrode (202/402/602) via PVD or CVD [0049], [0066]. Consider Claim 15, Malhotra teaches the dielectric layer is converted using annealing step forming second crystalline form [0043]. Malhotra does not teach converting/annealing of the dielectric layer results in tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode. However, Malhotra teaches each and every process step and limitation of the applicant’s claims, including the “step of converting by annealing the dielectric layer”. Since the “the tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode” by the applicant’s claimed process is simply a function of the “step of converting by annealing the dielectric layer”, and the Malhotra teaches the claimed process steps. The process of the Malhotra would have naturally flow or inherently produced “the tensile stress induced by the first metal liner is greater than the tensile stress induced by the first metal electrode” unless essential process steps and/or limitations are missing from the applicant’s claims. Consider Claim 40, Malhotra teaches the process of forming MIM, DRAM [0030]. Claim(s) 16-21 are rejected under 35 U.S.C. 103 as being unpatentable over Malhotra (PG Pub 2014/0187018 A1), in view of Dadheech (PG Pub 2009/0214927 A1). Consider Claims 16-21, Malhotra teaches the forming of first metal liner layer/flash layer using ALD process [0032], to protect the first electrode from unwanted oxidation before the deposition of the dielectric layer [0032], where the first liner/flash layer formed using partial oxidation of titanium nitride (of the first electrode) into titanium oxy nitride [0032]. Malhotra does not teach the forming of first liner of Titanium oxynitride using ALD process. However, Dadheech is in the prior art of forming multilayer structure which include forming Titanium oxynitride using ALD process (abstract), teaches the forming of Titanium oxynitride using ALD process in the following steps; (a) introducing first/metal compound onto the substrate, (b) introducing second and third compound onto the substrate (c) purging the chamber [0025], and where for forming Titanium oxynitride the addition of nitrogen/second compound such as ammonia, hydrazine, along with the step of (d) introducing oxygen compound such as oxygen, ozone [0033], where the first/metal compound include TiCl4 (titanium tetrachloride) [0031]. Where those steps/cycles are repeated until desired thickness [0026]. A person having ordinary skill in the art before the effective date of the claimed invention would combine Malhotra with Dadheech to deposit the TiON metal liner layer using ALD following the above steps, to provide with an ALD grown films that are conformal, pin-hole free, and chemically bonded to the metal electrode layer [0024]. Claim(s) 22-26 are rejected under 35 U.S.C. 103 as being unpatentable over Malhotra (PG Pub 2014/0187018 A1), in view of Dadheech (PG Pub 2009/0214927 A1), and in further view of Chen (PG Pub 2012/0322220 A1). Consider Claims 22-23, the combined Malhotra (with Dadheech) teaches the forming of top metal electrode (608), top metal liner (606), and where the top metal electrode (608) in physical contact with top metal liner (606), and bottom metal electrode (602) (Malhotra, figure 6), and where the top/first metal liner comprise TiON (Malhotra, [0032]), and where the metal top/bottom metal electrode (602, 608) are formed using PVC, or CVD (Malhotra, [0066], [0069]), and where the bottom metal electrode (602) is in physical contact with dielectric layer (604) (Malhotra, figure 6), and where the metal liner thickness is 1-10A (Malhotra, Claim 10). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). PNG media_image3.png 654 688 media_image3.png Greyscale The combined Malhotra (with Dadheech) does not teach the metal electrode thickness. However, Chen is in the prior art of forming MIM capacitor [0047], having and first electrode thickness of 8 nm and second electrode thickness with 50 nm [0046]. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). A person having ordinary skill in the art before the effective date of the claimed invention would combine Malhotra (with Dadheech) with Chen to adjust the first/bottom electrode and second/top electrode within the claimed thickness, with reasonable and predictable expectation of success. Consider Claim 24-26, the combined Malhotra (with Dadheech) teaches the forming of the bottom metal electrode (202), bottom metal liner (204), top metal electrode (208), where the bottom metal liner (204) in physical contact with bottom metal electrode (202), and where the top metal electrode (208) in physical contact with dielectric layer (206) (Malhotra, figure 2), where the metal liner thickness is 1-10A (Malhotra, Claim 10). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). PNG media_image1.png 566 594 media_image1.png Greyscale The combined Malhotra (with Dadheech) does not teach the metal electrode thickness. However, Chen is in the prior art of forming MIM capacitor [0047], having and first electrode thickness of 8 nm and second electrode thickness with 50 nm [0046]. In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). A person having ordinary skill in the art before the effective date of the claimed invention would combine Malhotra (with Dadheech) with Chen to adjust the first/bottom and second/top electrode within the claimed thickness, with reasonable and predictable expectation of success. Claim(s) 27-39 are rejected under 35 U.S.C. 103 as being unpatentable over Malhotra (PG Pub 2014/0187018 A1), in view of Dadheech (PG Pub 2009/0214927 A1), and in further view of Chen (PG Pub 2012/0322220 A1), in further view of Lin (PG Pub 2025/0031381 A1). Consider Claims 27-31, the combined Malhotra (with Dadheech and Chen) teaches the process of forming dielectric layer using ALD process (406) using second cyclic ALD (Malhotra, [0059]), where the dielectric layer is made from combination of Hafnium oxide and Zirconium oxide forming Hafnium Zirconium Oxide (Malhotra, [0058]). The combined Malhotra (with Dadheech and Chen) does not teach the forming of dielectric layer of Hafnium Zirconium Oxide/HfZrO using ALD process. However, Lin is in the prior art of forming HfZrO (abstract), teaches the use of ALD process to supply Hf precursor (step 10) as third vapor phase into a chamber such as TDMAH (figure 2, [0026]) and supplying Zr precursor (step 14) as fourth vapor phase into chamber such as TDMAZ (figure 2, [0027]), and supplying oxygen reactant (step 14) into chamber, such as oxygen, ozone [0027]. A person having ordinary skill in the art before the effective date of the claimed invention would combine Malhotra (with Dadheech and Chen) with Lin to deposit HfZrO as dielectric layer using ALD process following the above process, to exhibits sufficient ferroelectric properties without the conventional post-annealing process and the manufacturing process is simplified and the production cost is reduced [0067]. Consider Claims 32-39, the combined Malhotra (with Dadheech and Chen and Lin) teaches the forming of the bottom metal electrode (402), bottom metal liner (404), top metal electrode (410) and top metal liner (408), where the bottom metal liner (404) in physical contact with bottom metal electrode (402), and where the top metal liner (408) in physical contact with dielectric layer (406) (Malhotra, figure 4), where the metal liner thickness is 1-10A (Malhotra, Claim 10), and where first electrode thickness of 8 nm and second electrode thickness with 50 nm (Chen, [0046]). In the case where the claimed ranges, “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). (MPEP 2144.05). Where the top metal liner (408) and the bottom metal liner (404) are formed using similar ALD precursors and ALD process using second ALD process for bottom metal liner (Malhotra, [0057]) and third ALD process from top metal liner (Malhotra, [0059]). As the third ALD process includes forming top/second metal liner of Titanium oxynitride using ALD process in the following steps; (a) introducing first/metal compound onto the substrate, (b) introducing second and third compound onto the substrate (c) purging the chamber (Dadheech, [0025]), and where for forming Titanium oxynitride the addition of nitrogen/second compound such as ammonia, hydrazine, along with the step of (d) introducing oxygen compound such as oxygen, ozone (Dadheech, [0033]), where the first/metal compound include TiCl4 (titanium tetrachloride) (Dadheech, [0031]). Where those steps/cycles are repeated until desired thickness (Dadheech, [0026]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammad Mayy whose telephone number is (571)272-9983. The examiner can normally be reached Monday to Friday, 11:00AM-7:00PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at 571-272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Mohammad Mayy/ Art Unit 1718 /KELLY M GAMBETTA/Primary Examiner, Art Unit 1718
Read full office action

Prosecution Timeline

May 07, 2025
Application Filed
Jul 16, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
48%
Grant Probability
71%
With Interview (+23.2%)
3y 2m (~1y 11m remaining)
Median Time to Grant
Low
PTA Risk
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