DETAILED ACTION
Claims 1-10 are pending
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Parkhe US 7,655,316 (US’316) in view of Hiatt et al. US 5,963,315 (US’315).
Regarding claim 1, US’316 teaches a method of using a monitor wafer (a cleaning wafer cleans process residues from a support surface used, abstract),
wherein the monitor wafer comprises a substrate and a cleaning layer, and the cleaning layer is disposed on a bottom surface of the substrate (the cleaning wafer 22 comprises a disc 24 that has a polymer layer 26 thereon with a cleaning surface 28 that is capable of cleaning process residues 30 from the support surface 180, see fig. 2, col. 2-3),
and wherein the method comprises: transporting the monitor wafer into a processing tool (the cleaning wafer 22 is placed on the support surface 180 of an electrostatic chuck 108 inside a substrate processing chamber 106, the cleaning wafer 22 cleans a support surface 180 that is a part of a process chamber 106 col. 8);
and removing particles from the processing tool using the cleaning layer of the monitor wafer (the cleaning wafer 22 cleans a support surface 180 that is a part of a process chamber 106 col. 8.).
US’316 does not teach monitoring a tool particle condition of the processing tool using the substrate of the monitor wafer; wherein monitoring the tool particle condition and removing the particles are conducted concurrently.
US’315 teaches a method for in situ monitoring of backside contamination on a semiconductor wafer (120) between processing steps which are performed in a multi-chamber tool (abstract). IG. 4 illustrates a side view of a backside metrology system (BMS) or robotic arm system. The backside metrology system is used for detecting contamination, such as particles, upon the backside of a semiconductor wafer which is supported in the robotic arm of FIG. 3. The backside metrology system comprises an energy source 220 (preferably a laser source), a detector 210, and a controller 230. By checking wafers as they are introduced into and returned from a new tool, the contamination level can be monitored. This contamination, or particulate, data is stored and processed via computer and can be used to promptly identify a problematic wafer before cross-contamination occurs and before IC yield is impacted the process taught herein is fast, efficient, enhances yield, does not adversely impact tool throughput, reduces equipment down-time and avoids contamination spreading (col. 3-6, see fig. 3-4). Therefore, US’315 teaches that including a monitoring device on a wafer transfer device such that backside contamination can be detected in situ, which reads on “conducted concurrently”, can provide promote data identifying any contamination problems that adversely impact tool throughput, reduces equipment down-time and avoids contamination spreading.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of US’316 to include monitoring a tool particle condition of the processing tool using the substrate of the monitor wafer; wherein monitoring the tool particle condition and removing the particles are conducted concurrently because US’315 teaches that including a monitoring device on a wafer transfer device such that backside contamination can be detected in situ, which reads on “conducted concurrently”, can provide promote data identifying any contamination problems that adversely impact tool throughput, reduces equipment down-time and avoids contamination spreading and applying a known technique to a known method ready for improvement to yield predictable results is obvious, see MPEP 2141 III (D).
Regarding claim 2, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein the substrate comprises Si (disc 24 may comprise a dielectric or semiconducting material, such as at least one of silicon, col 4).
Regarding claim 3, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein the cleaning layer comprises polyimide or polyimide-based material (cleaning surface 28 is polyimide, col. 3-5, see fig. 2).
Regarding claim 4, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches a suitable thickness of the polymer layer 26 may be less than about 50 microns thick, such as from about 5 microns thick to about 50 microns thick, and even less than about 30 microns thick, such as from about 15 microns to about 20 microns thick (col. 6). Therefore, the thickness range taught by US’416 overlaps the claimed range.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select applicants claimed range of a thickness from 20 µm to 40 µm because US’316 teaches overlapping ranges for cleaning layer, and in the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists, see MPEP 2144.05.
Regarding claim 5, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein the cleaning layer is disposed on the whole bottom surface of the substrate (the polyimide layer 26 can be formed by spin-coating a layer 26 of polyimide onto the surface 32. In a spin-coating process, the liquid polyimide precursor is provided onto a surface and the surface is rotated to provide an even coating, col. 5).
Regarding claim 6, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein the monitor wafer further comprises another cleaning layer disposed on a top surface of the substrate (a cleaning wafer 22 to clean process residues from a support surface 180 comprises a soft metal layer 46a with a metal cleaning surface 28 that is capable of picking up and retaining residues 30 from the surface 180 to clean the surface 180, as shown for example in FIG. 3, col. 7).
Regarding claim 7, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein transporting the monitor wafer into the processing tool is transporting the monitor wafer into a processing chamber of the processing tool along a processing path of the processing tool, and monitoring the tool particle condition comprises monitoring a particle condition of the processing path and a particle condition of the processing chamber (US’316 teaches the controller 194 can comprise a substrate positioning instruction set to operate one or more of the substrate support 100 and substrate transport 153 and lift pins 152 to position a substrate 104 or cleaning wafer 22 in the chamber 10, col 9-10 and US’315 teaches the detector is located in the robotic arm (110, 111), or within a semiconductor processing tool (500), col. 5-6, see fig. 3-4, therefore the monitoring occurs along the processing path).
Regarding claim 8, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein the tool particle condition comprises a particle amount (the absolute particle count and differential/incremental particulate counts are calculated from past data on a chamber-by-chamber, wafer-by-wafer, or even transfer-by-transfer basis, col. 4).
Regarding claim 9, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein removing the particles comprises applying an energy to the cleaning layer (The electrode is capable of being electrically charged to generate electrostatic forces to press the cleaning surface against the support surface. Process residues adhere to the cleaning surface and are cleaned from the support surface upon removal of the cleaning wafer therefrom, col. 3).
Regarding claim 10, the modified method of US’316 teaches the method of using a monitor wafer of claim 1. US’316 further teaches wherein in removing the particles, the cleaning layer removes particles by at least one of adhesion (process residues adhere to the cleaning surface and are cleaned from the support surface upon removal of the cleaning wafer therefrom, col. 2-3).
Response to Arguments
Applicant's arguments filed 7-21-26 have been fully considered but they are not persuasive.
In response to applicant's arguments against the references individually, that US'315 fails to disclose or suggest an integrated wafer that possesses both monitoring and particle removal functions, US'316 teaches a cleaning-only wafer 22, so neither of the utilized references, alone or in combination, provides any teaching, suggestion, or motivation to create a monitor wafer including both a substrate for monitoring and a cleaning layer for removing particles, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). As discussed above and in the nonfinal mailed 4-30-26, US’315 is not relied on for teaching a cleaning layer and US’316 is not relied on for teaching monitoring a tool particle condition. US’316 teaches that residues are lifted off the support surface and carried out of the tool upon removal of the cleaning wafer by the substrate transport 153 such as a robot arm (col. 8-9). US’315 scans for contamination of the wafer backside while the robotic arm removes it from the chamber and transports it (abstract; col. 4 and 7). As discussed above, particle removal and tool monitoring can therefore occur during the same in-tool handling process of the cleaning wafer. Under broadest reasonable interpretation, this reads on “concurrent”. US’315 identifies costly “over-maintenance” from frequent manual chamber cleaning and the lack of any way to verify that a correction was effective (col. 3). The monitoring of US’315 provide the benefit of identifying a contaminated chamber for cleaning automatically, as soon as corrective action is needed, reducing downtime without impacting throughput (col. 4-5). US’316 teaches cleaning the chuck without venting or downtime and teaches repeating the clean as needed to increase time between manual cleaning (col. 1-2 and 8). Therefore US’316 and US’315 are both concerned with insuring a clean chamber and reduced tool downtime. Monitoring the cleaning wafer of US’316, as taught by US’315 would provide the operator with real time information on the effectiveness of the of the cleaning wafer or manual cleans discussed in both US’315 and US’316 and more effectively remove the particles from the transport and chucking surfaces so that an accurate assessment of the contaminated state of the chamber can be made.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIN FLANAGAN BERGNER whose telephone number is (571)270-1133. The examiner can normally be reached M-F 8:00-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Allen can be reached at 571-270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIN F BERGNER/Primary Examiner, Art Unit 1713
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