Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 05/07/2026 have been fully considered but they are not persuasive.
Applicant argued that the combination of KIM (US 2024/0159947) and HARADA et al. (US 2019/00064559), does not disclose the application of any alleged rendering filter is based upon the luminance of the alleged sub-pixels in a particular segment region, but does not correspond to any colors represented by the sub-pixels, as recited in claim 7, and similarly recited in claim 18. (See, e.g., Harada, para. [0057]) (providing that "[t]he lighting amount determination processor 103 determines the lighting amount of the light source 51 corresponding to the luminance required for each of the first segment regions")). Moreover, the cited portions of Kim do not appear to cure the above discussed deficiencies of Harada to properly reject claims 7 and 18, which is incorrect and can be found in KIM (US 2024/0159947), pars. 33, 36, 38, 40, 58, each of the sub-pixel blocks (PB_RW, PB_GWr, PB_GWb, PB_BW) may have a structure in which four unit pixels are arranged adjacent to each other in a (2×2) array. In the example, each of the sub-pixel blocks (PB_RW, PB_GWr, PB_GWb, PB_BW) may include color filters of two different colors; and/or [0040] The first grid region 120a may be disposed between red color filters, green color filters, blue color filters and first white color filters. The first grid region 120a may be disposed on sides of the first white color filters. The second grid region 120b may be arranged between red color filters, green color filters, blue color filters and second white color filters. And HARADA et al. (US 2019/00064559), pars. 40, 41, 45, FIG. 9 is a block diagram illustrating main functions included in the signal processor 10. The signal processor 10 is a circuit including, for example, a gamma converter 101, an image analyzer 102, a lighting amount determination processor 103, a luminance distribution calculator 104, a first corrector 105, a second corrector 106, a reverse gamma converter 107, a first buffer 108, and a second buffer 109. [0054] The gamma converter 101 performs gamma conversion on an input image. Specifically, the signal processor 10 keeps data representing a correspondence relation between the RGB image signals (gradation values) before and after the gamma conversion. The gamma converter 101 performs the gamma conversion on the input signals IP.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7, 8, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over KIM (US 2024/0159947) in view of HARADA et al. (US 2019/00064559).
Regarding claims 7, 18, the combination of KIM and HARADA et al., discloses a display device comprising: a display panel configured to receive second image data, configured to display an image based on the second image data, and comprising pixels that comprises sub-pixels; and a driver configured to provide the second image data based on first image data (see KIM FIG. 1, the image sensing device may include a pixel array 100, a row driver 200, a correlated double sampler (CDS) 300, an analog-digital converter (ADC) 400, an output buffer 500, a column driver 600, and a timing controller 700), and comprising: a padding circuit configured to convert the first image data into padding data by reflecting different offset values according to locations of the pixels; and a rendering circuit configured to convert the padding data into rendering data by applying different rendering filters according to colors represented by the sub-pixels (HARADA et al., The light source control circuit 60 is, for example, a driver circuit for lighting up the light sources 51 included in the light source device 50, and operates the light source device 50 according to the light source drive signals BL. [0030] The display unit 20 includes an image display panel 30 and an image display panel driver 40. The image display panel 30 includes a display area OA provided with the pixels 48. The pixels 48 are arranged, for example, in a matrix (row-column configuration). The image display panel 30 of this embodiment is a liquid crystal image display panel. The image display panel driver 40 includes a signal output circuit 41 and a scanning circuit 42. The dimming panel 80 may have, as a more specific configuration, for example, the same configuration as that of the image display panel 30 illustrated in FIG. 5. However, since the second segment regions 81 have no color filter, the dimming panel 80 has, for example, a configuration obtained by removing the filter layer 26 from the configuration described with reference to FIG. 5. By having the configuration with no color filter, the dimming panel 80 can obtain higher light transmittance. The dimming panel 80 may have other specific configurations. For example, a liquid crystal panel of another type, such as a twisted nematic (TN) liquid crystal panel, may be provided as the dimming panel 80. HARADA et al. (US 2019/00064559), pars. 40, 41, 45, FIG. 9 is a block diagram illustrating main functions included in the signal processor 10. The signal processor 10 is a circuit including, for example, a gamma converter 101, an image analyzer 102, a lighting amount determination processor 103, a luminance distribution calculator 104, a first corrector 105, a second corrector 106, a reverse gamma converter 107, a first buffer 108, and a second buffer 109. [0054] The gamma converter 101 performs gamma conversion on an input image. Specifically, the signal processor 10 keeps data representing a correspondence relation between the RGB image signals (gradation values) before and after the gamma conversion. The gamma converter 101 performs the gamma conversion on the input signals IP) (see argument above).
Regarding claim 8, the combination of KIM and HARADA et al., discloses the display device according to claim 7, wherein the pixels comprise: an 11th sub-pixel configured to emit light of a first color; a 21st sub-pixel configured to emit light of a second color, and adjacent to the 11th sub-pixel in a first direction; a 12th sub-pixel configured to emit light of a third color, and adjacent to the 11th sub-pixel in a second direction; and a 22nd sub-pixel configured to emit light of the first color, and in a diagonal direction with respect to the 11th sub-pixel (see rejection above of claim 7).
Allowable Subject Matter
Claims 9-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 1, 2, 4-6 are allowed.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Van N Chow whose telephone number is (571)272-7590. The examiner can normally be reached M-F 10-6PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Xiao Ke can be reached at 5712727776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VAN N CHOW/Primary Examiner, Art Unit 2627
Prosecution Insights