DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2016/0351124 hereinafter Kim '124).
Regarding claim 1, Kim '124 teaches a pixel (PXL, see Figure 3 and ¶62);
a first transistor (a drive transistor DT, ¶63) including a first electrode, a second electrode, and a gate electrode electrically connected to a first voltage line (Vini) which receives a first voltage;
a light emitting diode (OLED) including a first electrode electrically connected to the second electrode of the first transistor (DT) and a second electrode connected to a second voltage line (ELVSS) which receives a second voltage;
a second transistor (a transistor T1) including a first electrode connected to a data line (Data(m)) , a second electrode electrically connected to the first electrode of the first transistor (DT), and a gate electrode which receives a first scan signal (SCAN(n));
a fifth transistor (transistor T5) including a first electrode electrically connected to the first electrode of the first transistor (DT), a second electrode electrically connected to a first node (node A), and a gate electrode which receives a third scan signal (SCAN(n-1)); and
a first capacitor (Cstg) connected between the second electrode of the fifth transistor (T5) and the gate electrode of the first transistor (DT).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 11-14 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2016/0351124 hereinafter Kim '124) in view of Kim et al. US 2021/0142733 hereinafter Kim '733).
Regarding claim 11, Kim '124 teaches a display device (see Abstract, figures 2-3, and ¶51-¶53);
a pixel (PXL) connected to a plurality of scan lines (scan lines (n) and (n-1) and a data line (a data line m, see figure 3);
a scan driving circuit (13) which outputs a plurality of scan signals ( scan (n) of T1, scan (n) of T3 and scan (n-1) of T5, see ¶66-¶70) for driving the pixel to the plurality of scan lines;
a data driving circuit (12) which outputs a data signal to the data line during a driving frame (see ¶ 73 and figure 4);
a driving controller (11) which controls the scan driving circuit and the data driving circuit,
wherein the plurality of scan signals comprises first to third scan signals (the scan (n) of T1, scan (n) of T3 and scan (n-1) of T5, see ¶66-¶70) ,
wherein the pixel (PXL, see Figure 3, ¶62) comprising:
a first transistor (a drive transistor DT, ¶63) including a first electrode, a second electrode, and a gate electrode electrically connected to a first voltage line (Vini) which receives a first voltage;
a light emitting diode (OLED) including a first electrode electrically connected to the second electrode of the first transistor (DT) and a second electrode connected to a second voltage line (ELVSS) which receives a second voltage;
a second transistor (a transistor T1) including a first electrode connected to a data line (Data(m)) , a second electrode electrically connected to the first electrode of the first transistor (DT), and a gate electrode which receives a first scan signal (SCAN(n));
a fifth transistor (transistor T5) including a first electrode electrically connected to the first electrode of the first transistor (DT), a second electrode electrically connected to a first node (node A), and a gate electrode which receives a third scan signal (SCAN(n-1)); and
a first capacitor (Cstg) connected between the second electrode of the fifth transistor (T5) and the gate electrode of the first transistor (DT).
Kim '124 fails to teach a driving frame and output a bias signal to the data line during a bias frame, the pixel emits light in response to the data signal received through the data line during the driving frame, and is initialized in response to the bias signal received through the data line during the bias frame.
Kim '733 teaches a normal frequency frame and a bias period PBIAS, the OLED EL emits light in response to the data signal received through the data line during the normal frequency frame, and is initialized in response to the bias signal received through the data line during the bias period PBIAS. ¶75-¶77 and Fig 7.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement the OLED EL emits light in response to the data signal received through the data line during the normal frequency frame, and is initialized in response to the bias signal received through the data line during the bias period PBIAS, as Kim '733 teaches, to modify the display device of Kim '124. The motivation for doing so would preventing a gradual increase of luminance at a low driving frequency, while saving power consumption. Kim '733 ¶5-¶6, and ¶ 75.
Regarding claim 12, Kim '733 teaches the display device of claim 11, wherein the driving controller determines a driving frequency and controls the data driving circuit and the scan driving circuit to operate as the driving frame and the bias frame based on the driving frequency. (See Kim '733 ¶112)
Regarding claim 13, Kim '733 teaches the display device of claim 12, wherein the scan driving circuit activates each of the plurality of scan signals in a predetermined order during the driving frame. (See Kim '733 ¶20).
Regarding claim 14, Kim '733 teaches the display device of claim 11, wherein the scan driving circuit maintains the second and third scan signals at an inactive level during the bias frame and activates the first scan signal. (See Kim '733 ¶60).
Regarding claim 18, Kim '733 teaches the display device of claim 11, wherein the driving controller determines a driving frequency as one selected from a first frequency and a second frequency lower than the first frequency, wherein when the driving controller determines the driving frequency as the first frequency, one frame comprises only the driving frame, wherein when the driving controller determines the driving frequency as the second frequency, one frame comprises the driving frame and the bias frame. (See Kim '733 ¶73).
Regarding claim 19, Kim '124 teaches an electronic device (see Abstract, figures 2-3, and ¶51-¶53);
a display panel (10) including a pixel (PXL) connected to a plurality of scan lines (scan lines (n) and (n-1) and a data line (a data line m, see figure 3);
a controller (11) which controls the scan driving circuit and the data driving circuit,
a scan driving circuit (13) which outputs a plurality of scan signals ( scan (n) of T1, scan (n) of T3 and scan (n-1) of T5, see ¶66-¶70) for driving the pixel to the plurality of scan lines; and
a data driving circuit (12) which outputs a data signal to the data line during a driving frame (see ¶ 73 and figure 4)
wherein the plurality of scan signals comprises first to third scan signals (the scan (n) of T1, scan (n) of T3 and scan (n-1) of T5, see ¶66-¶70) ,
wherein the pixel (PXL, see Figure 3, ¶62) comprising:
a first transistor (a drive transistor DT, ¶63) including a first electrode, a second electrode, and a gate electrode electrically connected to a first voltage line (Vini) which receives a first voltage;
a light emitting diode (OLED) including a first electrode electrically connected to the second electrode of the first transistor (DT) and a second electrode connected to a second voltage line (ELVSS) which receives a second voltage;
a second transistor (a transistor T1) including a first electrode connected to a data line (Data(m)) , a second electrode electrically connected to the first electrode of the first transistor (DT), and a gate electrode which receives a first scan signal (SCAN(n));
a fifth transistor (transistor T5) including a first electrode electrically connected to the first electrode of the first transistor (DT), a second electrode electrically connected to a first node (node A), and a gate electrode which receives a third scan signal (SCAN(n-1)); and
a first capacitor (Cstg) connected between the second electrode of the fifth transistor (T5) and the gate electrode of the first transistor (DT).
Kim '124 fails to teach a driving frame and output a bias signal to the data line during a bias frame, the pixel emits light in response to the data signal received through the data line during the driving frame, and is initialized in response to the bias signal received through the data line during the bias frame.
Kim '733 teaches a normal frequency frame and a bias period PBIAS, the OLED EL emits light in response to the data signal received through the data line during the normal frequency frame, and is initialized in response to the bias signal received through the data line during the bias period PBIAS. ¶75-¶77 and Fig 7.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement the OLED EL emits light in response to the data signal received through the data line during the normal frequency frame, and is initialized in response to the bias signal received through the data line during the bias period PBIAS, as Kim '733 teaches, to modify the display device of Kim '124. The motivation for doing so would preventing a gradual increase of luminance at a low driving frequency, while saving power consumption. Kim '733 ¶5-¶6, and ¶ 75.
Regarding claim 20, Kim '733 teaches the display device of claim 19, wherein the controller determines a driving frequency and controls the data driving circuit and the scan driving circuit to operate as the driving frame and the bias frame based on the driving frequency. (See Kim '733 ¶112).
Allowable Subject Matter
Claims 2-10 and 15-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
None of prior art of record teaches claim 2 having the pixel of claim 1, further comprising:
a second capacitor electrically connected between the first voltage line and the first node;
a third transistor including a first electrode electrically connected to the second electrode of the first transistor, a second electrode electrically connected to the gate electrode of the first transistor, and a gate electrode which receives a second scan signal;
a fourth transistor including a first electrode electrically connected to the second electrode of the third transistor, a second electrode electrically connected to a third voltage line which receives a third voltage, and a gate electrode which receives a fourth scan signal;
a sixth transistor including a first electrode connected to the second electrode of the first transistor, a second electrode connected to the first electrode of the light emitting diode, and a gate electrode which receives a first emission control signal;
a seventh transistor including a first electrode connected to the second electrode of the sixth transistor, a second electrode electrically connected to a fourth voltage line which receives a fourth voltage, and a gate electrode which receives a fifth scan signal; and
an eighth transistor including a first electrode connected to the first voltage line, a second electrode connected to the first electrode of the first transistor, and a gate electrode which receives a second emission control signal.
None of prior art of record teaches claim 15 having the display device of claim 11, comprising:
an emission driving circuit which outputs a first emission control signal and a second emission control signal,
wherein the plurality of scan signals further comprises a fourth scan signal and a fifth scan signal, wherein the pixel further comprises:
a second capacitor electrically connected between the first voltage line and the first node;
a third transistor including a first electrode electrically connected to the second electrode of the first transistor, a second electrode electrically connected to the gate electrode of the first transistor, and a gate electrode which receives the second scan signal;
a fourth transistor including a first electrode electrically connected to the second electrode of the third transistor, a second electrode electrically connected to a third voltage line which receives a third voltage, and a gate electrode which receives the fourth scan signal;
a sixth transistor including a first electrode connected to the second electrode of the first transistor, a second electrode connected to the first electrode of the light emitting diode, and a gate electrode which receives the first emission control signal;
a seventh transistor including a first electrode connected to the second electrode of the sixth transistor, a second electrode electrically connected to a fourth voltage line which receives a fourth voltage, and a gate electrode which receives the fifth scan signal; and
an eighth transistor including a first electrode connected to the first voltage line, a second electrode connected to the first electrode of the first transistor, and a gate electrode which receives a second emission control signal.
Conclusion
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KEVIN M NGUYEN
Patent Examiner, Art Unit 2628
/Kevin M Nguyen/Primary Examiner, Art Unit 2628 Telephone: (571) 272-7697
Email: kevin.nguyen2@uspto.gov