Prosecution Insights
Last updated: April 19, 2026
Application No. 19/216,974

LIQUID CRYSTAL DISPLAY DEVICE AND ELECTRONIC DEVICE

Non-Final OA §103§DP
Filed
May 23, 2025
Examiner
KARIMI, PEGEMAN
Art Unit
2621
Tech Center
2600 — Communications
Assignee
Semiconductor Energy Laboratory Co. Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
97%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
694 granted / 839 resolved
+20.7% vs TC avg
Moderate +15% lift
Without
With
+14.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
13 currently pending
Career history
852
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
58.0%
+18.0% vs TC avg
§102
25.7%
-14.3% vs TC avg
§112
10.4%
-29.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 839 resolved cases

Office Action

§103 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 2, 6, and 10 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,317,599 in view of Kim (U.S. Pub. No. 2009/0321732). Current application 19/216,974 U.S. Patent No. 12,317,599 2. (New) A semiconductor device comprising: a pixel comprising a display element and a transistor electrically connected to the display element; and Claim 1. a pixel comprising a liquid crystal element and a transistor; a driver circuit electrically connected to the pixel, a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, and wherein the transistor comprises an oxide semiconductor layer, and wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10CV. wherein an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 6. A semiconductor device comprising: Claim 1. a pixel comprising a display element and a transistor electrically connected to the display element; and a pixel comprising a liquid crystal element and a transistor; a driver circuit electrically connected to the pixel a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, wherein the transistor comprises an oxide semiconductor layer, wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V, and an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped. when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped, Claim 10. A semiconductor device comprising: Claim 1. a transistor comprising an oxide semiconductor layer, the transistor comprises an oxide semiconductor layer, wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V. wherein an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,317,599 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 12,317,599 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 6 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,317,599 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 12,317,599 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 10 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 12,317,599 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 12,317,599 does not teach the limitations of “a semiconductor device comprising”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claims 2, 6, and 10 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). Current application 19/216,974 U.S. Patent No. 11,798,952 2. (New) A semiconductor device comprising: Claim 1. a pixel comprising a display element and a transistor electrically connected to the display element; and the pixel comprising: a liquid crystal element; and a transistor a driver circuit electrically connected to the pixel, a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, and Transistor comprises: an oxide semiconductor layer over the gate insulating film wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10CV. an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 6. A semiconductor device comprising: Claim 1. a pixel comprising a display element and a transistor electrically connected to the display element; and the pixel comprising: a liquid crystal element; and a transistor a driver circuit electrically connected to the pixel a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, Transistor comprises: an oxide semiconductor layer over the gate insulating film wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V, and an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped. wherein, when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped. Claim 10. A semiconductor device comprising: Claim 1. a transistor comprising an oxide semiconductor layer, Transistor comprising an oxide semiconductor layer wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V. an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 11,798,952 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 6 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 11,798,952 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 10 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 12,317,599 does not teach the limitations of “a semiconductor device comprising”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claims 2, 6, and 10 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,282,864 in view of Kim (U.S. Pub. No. 2009/0321732). Current application 19/216,974 U.S. Patent No. 11,282,864 2. (New) A semiconductor device comprising: Claim 1. a pixel comprising a display element and a transistor electrically connected to the display element; and the pixel comprising: a liquid crystal element; and a transistor a driver circuit electrically connected to the pixel, a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, and Transistor comprising an oxide semiconductor layer wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10CV. an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 6. A semiconductor device comprising: Claim 1. a pixel comprising a display element and a transistor electrically connected to the display element; and the pixel comprising: a liquid crystal element; and a transistor a driver circuit electrically connected to the pixel a driver circuit electrically connected to the pixel, wherein the transistor comprises an oxide semiconductor layer, Transistor comprising an oxide semiconductor layer wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V, and an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped. wherein, when a still image is displayed on the pixel, a supply of a start pulse signal to the driver circuit is stopped. Claim 10. A semiconductor device comprising: Claim 1. a transistor comprising an oxide semiconductor layer, Transistor comprising an oxide semiconductor layer wherein an off-state current of the transistor is less than or equal to 1 x 10-12 A at a drain voltage of 6V and a gate voltage of -5V or -10V. an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V, Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 11,798,952 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 6 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 11,798,952 does not teach the limitations of “a semiconductor device comprising” and “a display element and a transistor electrically connected to the display element”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) and a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim 10 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,798,952 in view of Kim (U.S. Pub. No. 2009/0321732). U.S. Patent No. 12,317,599 does not teach the limitations of “a semiconductor device comprising”. Prior art reference of Kim teaches a semiconductor device comprising (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2). Therefore it would have been obvious to add the semiconductor and TFT device of Kim to the device of the current application because to improve interfacial characteristics of an active layer and method of manufacturing, [0012], lines 1-3. Claim Rejections - 35 USC § 103 The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 3, 10, and 11 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim (U.S. Pub. No. 2009/0321732) in view of Stockstad (U.S. Patent No. 6,353,363). As to claim 2, Kim teaches a semiconductor device (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) comprising: a pixel (Fig. 7, pixel comprising of elements 113 and 114) comprising a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114); and a driver circuit (234) electrically connected to the pixel (data driver 234 is connected to the pixels 300), wherein the transistor comprises an oxide semiconductor layer ([0016], lines 1-6), and Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. As to claim 3, Kim teaches the oxide semiconductor layer is an In—O based oxide semiconductor layer ([0037], lines 6-9). As to claim 10, Kim teaches a semiconductor device (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) comprising: a transistor (114) comprising an oxide semiconductor layer ([0016], lines 1-6), Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. As to claim 11, Kim teaches the oxide semiconductor layer is an In—O based oxide semiconductor layer ([0037], lines 6-9). Claims 4, 5, 12, and 13 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim (U.S. Pub. No. 2009/0321732) in view of Stockstad (U.S. Patent No. 6,353,363), and further in view of Kuhn (Kuhn, Kenneth A., “diode characteristics,” Oct. 3, 2007 (rev. Sept 3, 2009), available at: https://www.kennethkuhn.com/ (accessed Jan 15, 2026), at Eq. 1 and accompanying text (“Forward current versus voltages”). As to claim 4, Kim teaches the semiconductor of claim 4, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim and Stockstad do not teach the 25 degree Celsius affecting the current, Kuhn teaches a 25 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 298 1.602   × 10 - 19 = 0.0257 V with thermal voltage VT approximately at 0.0257V, e x p V d - V T = e x p 6 - 0.0257 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0257 = 0.0514V e x p V g s - n V T = e x p - 5 - 0.0514 = e x p ⁡ ( - 97.3 ) ≈ 5 × 10 - 43 So, I D ≈ 10 - 8 × 5 × 10 - 43 = 5 × 10 - 51 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad because the current should decrease as the temperature increases, page 1, 6th paragraph. As to claim 5, Kim teaches the semiconductor of claim 4, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim and Stockstad do not teach the 80 degree Celsius affecting the current, Kuhn teaches a 80 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 353.15 1.602   × 10 - 19 = 0.0304 V with thermal voltage VT approximately at 0.0304V, e x p V d - V T = e x p 6 - 0.0304 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0304 = 0.0608V e x p V g s - n V T = e x p - 5 - 0.0608 = e x p ⁡ ( - 82.2 ) ≈ 2 × 10 - 36 So, I D ≈ 10 - 8 × 2 × 10 - 36 = 2 × 10 - 44 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad because the current should decrease as the temperature increases, page 1, 6th paragraph. As to claim 12, Kim teaches the semiconductor of claim 10, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim and Stockstad do not teach the 25 degree Celsius affecting the current, Kuhn teaches a 25 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 298 1.602   × 10 - 19 = 0.0257 V with thermal voltage VT approximately at 0.0257V, e x p V d - V T = e x p 6 - 0.0257 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0257 = 0.0514V e x p V g s - n V T = e x p - 5 - 0.0514 = e x p ⁡ ( - 97.3 ) ≈ 5 × 10 - 43 So, I D ≈ 10 - 8 × 5 × 10 - 43 = 5 × 10 - 51 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad because the current should decrease as the temperature increases, page 1, 6th paragraph. As to claim 13, Kim teaches the semiconductor of claim 10, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim and Stockstad do not teach the 80 degree Celsius affecting the current, Kuhn teaches a 80 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 353.15 1.602   × 10 - 19 = 0.0304 V with thermal voltage VT approximately at 0.0304V, e x p V d - V T = e x p 6 - 0.0304 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0304 = 0.0608V e x p V g s - n V T = e x p - 5 - 0.0608 = e x p ⁡ ( - 82.2 ) ≈ 2 × 10 - 36 So, I D ≈ 10 - 8 × 2 × 10 - 36 = 2 × 10 - 44 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad because the current should decrease as the temperature increases, page 1, 6th paragraph. Claims 6 and 7 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim (U.S. Pub. No. 2009/0321732) in view of Stockstad (U.S. Patent No. 6,353,363), and further in view of Maeda (KR 20030055137). As to claim 6, Kim teaches a semiconductor device (the device shown in Fig. 8A is using semiconductor as an active layer. [0003], lines 1-2) comprising: a pixel (Fig. 7, pixel comprising of elements 113 and 114) comprising a display element (113) and a transistor (114) electrically connected to the display element (pixel region 113 is connected to the transistor 114); and a driver circuit (234) electrically connected to the pixel (data driver 234 is connected to the pixels 300), wherein the transistor comprises an oxide semiconductor layer ([0016], lines 1-6), Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V. (as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. The prior art reference of Kim and Stockstad do not teach a still image, Maeda teaches a driver circuit electrically connected to the pixel, wherein, when a still image is displayed on the pixel, a supply of a start pulse signal (the supply of control signals to the driver circuit is stopped (in this still image display period, the supply of control signals and video data from the control IC (not shown) to the scan line driver circuit 120 and the signal line driver circuit 130 is stopped (page 5 at near the end paragraph). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to further modify the device of Kim as modified by Stockstad wherein when a still image is displayed on the pixel, a supply of a start pulse signal (the supply of control signals) to the driver circuit is stopped for driving a display device of high quality and low power consumption used for a cellular phone, an electronic book, or the like (BACKGROUND OF THE INVENTION) as Maeda taught. As to claim 7, Kim teaches the oxide semiconductor layer is an In—O based oxide semiconductor layer ([0037], lines 6-9). Claims 8 and 9 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim (U.S. Pub. No. 2009/0321732) in view of Stockstad (U.S. Patent No. 6,353,363), and further in view of Maeda (KR 20030055137) and Kuhn (Kuhn, Kenneth A., “diode characteristics,” Oct. 3, 2007 (rev. Sept 3, 2009), available at: https://www.kennethkuhn.com/ (accessed Jan 15, 2026), at Eq. 1 and accompanying text (“Forward current versus voltages”). As to claim 8, Kim teaches the semiconductor of claim 6, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim, Stockstad, and Maeda do not teach the 25 degree Celsius affecting the current, Kuhn teaches a 25 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 298 1.602   × 10 - 19 = 0.0257 V with thermal voltage VT approximately at 0.0257V, e x p V d - V T = e x p 6 - 0.0257 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0257 = 0.0514V e x p V g s - n V T = e x p - 5 - 0.0514 = e x p ⁡ ( - 97.3 ) ≈ 5 × 10 - 43 So, I D ≈ 10 - 8 × 5 × 10 - 43 = 5 × 10 - 51 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad and Maeda because the current should decrease as the temperature increases, page 1, 6th paragraph. As to claim 9, Kim teaches the semiconductor of claim 6, Kim does not mention the off-state current value based on drain voltage and gate voltage values. Stockstad teaches an off-state current of the transistor is less than or equal to 1×10.sup.−12 A at a drain voltage of 6V and a gate voltage of −5V or −10V.(as can be seen in column 2, equation (2), The equation reads as the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. with thermal voltage VT approximately at 0.026V, e x p V d - V T = e x p 6 - 0.026 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.026 = 0.052V e x p V g s - n V T = e x p - 5 - 0.052 = e x p ⁡ ( - 96.15 ) ≈ 1.2 × 10 - 42 So, I D ≈ 10 - 8 × 1.2 × 10 - 42 = 1.2 × 10 - 50 A Wherein this value is far below the 10 - 12 A value. Therefore, the equation 2 with the given criteria for Vg and Vd voltages and the reasonable values inputted results in a current that is below the expected current value and fulfils the criteria for the claim. Therefore, it would have been obvious to one of ordinary skilled in the art at the time the invention was filed to have added the transistor equation of Stockstad to the device of Kim because to output an essentially symmetrical output voltage, col. 2, lines 4-7. Kim, Stockstad, and Maeda do not teach the 80 degree Celsius affecting the current, Kuhn teaches a 80 degree Celsius (on page 1 the author mentions the thermal voltage equation V T = k × T q , wherein T is the temperature in kelvin, therefore T= 298 Kelvin. Putting this value in the equation of Stockstad we get the following: I D = I D 0 W - L e x p V g s - n V T ( e x p V s - V T - exp ⁡ - V d - V T ) Use the common test setup with Vs=0, Vd=6V. V T = k × T q = 1.3806 × 10 - 23 × 353.15 1.602   × 10 - 19 = 0.0304 V with thermal voltage VT approximately at 0.0304V, e x p V d - V T = e x p 6 - 0.0304 ≈ 0 So the bracket is approximately 1-0=1, giving: I D ≈ I D 0 W - L e x p V g s - n V T ( 1 ) This is the key: the exponential term dominates. In order for I D to be less than 10 - 12 A The realistic constants like the following are selected: VT=0.026 V for room temperature thermal voltage, n=2 for reasonable subthreshold factor, Choosing a realistic geometry W/L = 10, Choosing a modest prefactor I D 0 = 10 - 9 A , So, the prefactor product is: I D 0 W - L = 10 - 9 × 10 =   10 - 8 A With Vgs = -5V Computing the exponent denominator: nVT= 2x0.0304 = 0.0608V e x p V g s - n V T = e x p - 5 - 0.0608 = e x p ⁡ ( - 82.2 ) ≈ 2 × 10 - 36 So, I D ≈ 10 - 8 × 2 × 10 - 36 = 2 × 10 - 44 A Wherein this value is far below the 10 - 12 A value. Therefore, it would have been obvious to one of ordinary skilled in the art a the time the invention was filed to have added the thermal voltage of Kuhn to the device of Kim as modified by Stockstad and Maeda because the current should decrease as the temperature increases, page 1, 6th paragraph. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tucker (U.S. Pub. No. 2007/0290193) teaches a field effect transistor device and method. Inquiry Any inquiry concerning this communication or earlier communications from the examiner should be directed to PEGEMAN KARIMI whose telephone number is (571)270-1712. The examiner can normally be reached Monday-Friday; 9:00am-4:00pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chanh Nguyen can be reached at 5712727772. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PEGEMAN KARIMI/ Primary Examiner, Art Unit 2623
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Prosecution Timeline

May 23, 2025
Application Filed
Jan 15, 2026
Non-Final Rejection — §103, §DP (current)

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