Prosecution Insights
Last updated: April 19, 2026
Application No. 19/218,611

DISPLAY PANEL AND ELECTRONIC APPARATUS

Non-Final OA §DP
Filed
May 26, 2025
Examiner
AZONGHA, SARDIS F
Art Unit
2627
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
To Grant
79%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
501 granted / 616 resolved
+19.3% vs TC avg
Minimal -2% lift
Without
With
+-1.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
15 currently pending
Career history
631
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
62.4%
+22.4% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
7.6%
-32.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 616 resolved cases

Office Action

§DP
DETAILED ACTION This action is responsive to 05/26/2025. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Objections Claims 9 and 14 are objected to because of the following informalities: change “an other” to “another” in lines 9 and 13 respectively of claims 9 and 14. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1, 9, 14, and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 15, and 23 of U.S. Patent No. 12,317,704 B2, hereinafter, 704 Patent. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims in the 704 Patent anticipate the claims in the instant application, and, therefore, a patent to the claims in the instant application would improperly extend the right to exclude granted by a patent to the claims in the instant application should the instant application issue as a patent. The claims are compared with each other in the following: Claims Set A: US Patent 12,317,704 Claim Set B: US App. 19/218,611 1. A display panel comprising: a display area comprising a first display area, a second display area, and a third display area, 1. A display panel comprising: a display area comprising a first area, a second area, and a third area; a plurality of first light-emitting diodes being arranged in the first display area, a plurality of second light-emitting diodes and a transmission area being arranged in the second display area, and a plurality of third light-emitting diodes being arranged in the third display area; a peripheral area outside the display area; a peripheral area outside the display area; a first light-emitting element in the first area; a second light-emitting element and a transmission area in the second area; a third light-emitting element in the third area; a plurality of first sub-pixel circuits respectively electrically connected to the plurality of first light-emitting diodes; a first pixel circuit electrically connected to the first light-emitting element; a plurality of second sub-pixel circuits respectively electrically connected to the plurality of second light-emitting diodes; and a second pixel circuit electrically connected to the second light-emitting element; a plurality of third sub-pixel circuits respectively electrically connected to the plurality of third light-emitting diodes, a third pixel circuit electrically connected to the third light-emitting element; and wherein the plurality of second sub-pixel circuits are arranged in the peripheral area and electrically connected to the plurality of second light-emitting diodes through a plurality of conductive bus lines crossing the third display area between the peripheral area and the second display area. a conductive line electrically connecting the second light-emitting element to the second pixel circuit in the peripheral area and crossing the third area between the peripheral area and the second area. 15. An electronic apparatus comprising: a display panel comprising a display area comprising a first display area, a second display area, and a third display area, 9. A display panel comprising: a display area comprising a first area, a second area, and a third area; a plurality of first light-emitting diodes being arranged in the first display area, a first light-emitting element in the first area; a plurality of second light-emitting diodes and a transmission area being arranged in the second display area, and a second light-emitting element and a transmission area in the second area; a plurality of third light-emitting diodes being arranged in the third display area; and a third light-emitting element in the third area; a component overlapping the transmission area of the display panel, wherein the display panel further comprises: a plurality of first sub-pixel circuits arranged in the first display area and respectively electrically connected to the plurality of first light-emitting diodes; a first pixel circuit electrically connected to the first light-emitting element and in the first area; a plurality of second sub-pixel circuits respectively electrically connected to the plurality of second light-emitting diodes; and a second pixel circuit electrically connected to the second light-emitting element and in [[an other]] another area different from the second area; a plurality of third sub-pixel circuits arranged in the third display area and respectively electrically connected to the plurality of third light-emitting diodes, a third pixel circuit electrically connected to the third light-emitting element and in the third area; 23. The electronic apparatus of claim 15, wherein the display panel further comprises a dummy sub-pixel circuit arranged in the third display area. a dummy pixel circuit in the third area; and wherein the plurality of second sub-pixel circuits are arranged in a peripheral area outside the display area and electrically connected to the plurality of second light-emitting diodes through a plurality of conductive bus lines crossing the third display area between the peripheral area and the second display area. a conductive line electrically connecting the second light-emitting element to the second pixel circuit and crossing the third area. 15. An electronic apparatus comprising: a display panel comprising a display area comprising a first display area, a second display area, and a third display area, 14. An electronic apparatus comprising: a display panel comprising a display area, the display area comprising a first area, a second area, and a third area; and a component overlapping the transmission area of the display panel, a component below the display panel and overlapping a transmission area in the second area of the display panel, the component comprising a sensor or a camera, a plurality of first light-emitting diodes being arranged in the first display area, wherein the display panel further comprises: a first light-emitting element in the first area; a plurality of second light-emitting diodes and a transmission area being arranged in the second display area, and a second light-emitting element in the second area; a plurality of third light-emitting diodes being arranged in the third display area; and a third light-emitting element in the third area; wherein the display panel further comprises: a plurality of first sub-pixel circuits arranged in the first display area and respectively electrically connected to the plurality of first light-emitting diodes; a first pixel circuit electrically connected to the first light-emitting element and in the first area; a plurality of second sub-pixel circuits respectively electrically connected to the plurality of second light-emitting diodes; and a second pixel circuit electrically connected to the second light-emitting element and in [[an other]] another area different from the second area; a plurality of third sub-pixel circuits arranged in the third display area and respectively electrically connected to the plurality of third light-emitting diodes, a third pixel circuit electrically connected to the third light-emitting element and in the third area; and wherein the plurality of second sub-pixel circuits are arranged in a peripheral area outside the display area and electrically connected to the plurality of second light-emitting diodes through a plurality of conductive bus lines crossing the third display area between the peripheral area and the second display area. a conductive line electrically connecting the second light-emitting element to the second pixel circuit and crossing the third area between the other area and the second area. 23. The electronic apparatus of claim 15, wherein the display panel further comprises a dummy sub-pixel circuit arranged in the third display area. 20. The electronic apparatus of claim 14, wherein the display panel further comprises a dummy pixel circuit in the third area. From the comparison above, it is clear that all the elements of the claims in the instant application are found in the aforementioned claims of the 704 Patent, the difference being that the 704 patent includes more elements and is thus much more specific. Therefore, the invention in the 704 patent is in effect a “species” of the generic invention in the instant application. It has been held that a generic invention is “anticipated” by the “species” (see In re Goodman, 29 USPQ2d 2020 (fed. Cir. 1993), In re Slayter, 276 F.2d 408,411,125 USPQ 345, 347 (CCPA 1960)-see MPEP 2131.02), since a later patent to a genus would, necessarily, extend the right to exclude granted by an earlier patent directed to a species or sub-genus (see MPEP 804(II)(B)(1)). Claims 2-3, 5-7, and 15-18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 14 of 704 patent in view of Jung et al. (US Patent 11,659,744 B2), hereinafter Jung. Regarding claims 2 and 15, the 704 patent discloses wherein the first light-emitting element is one of a plurality of first light-emitting elements in the first area, and the second light-emitting element is one of a plurality of second light-emitting elements in the second area, however, the 704 patent does not expressly disclose and a number of the first light-emitting elements is different from a number of the second light-emitting elements. Jung is relied upon to teach and a number of the first light-emitting elements is different from a number of the second light-emitting elements (number of auxiliary pixels PXa per unit area in a component area CA may be less than the number of pixels PXm located in per same size unit area at (e.g., in or on) a main display area-see [col. 9, ll. 2-6] and figs. 1 and 3). Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Jung with the 704 patent such that pixel density in a component area is different (less than) pixel density in a non-component area of a display, in order to provide a transmissive area in the component area in which light and/or sound may be transmitted (see [col. 8, ll. 66-col. 9, ll. 6]). Regarding claims 3 and 16, the 704 patent discloses each and every element but for the limitation wherein an arrangement of the plurality of first light-emitting elements is different from an arrangement of the plurality of second light-emitting elements. Jung is further relied upon to teach wherein an arrangement of the plurality of first light-emitting elements is different from an arrangement of the plurality of second light-emitting elements (see fig. 5). Regarding claims 5 and 17, the 704 patent discloses each and every element but for the limitation wherein a size of the first light-emitting element is different from a size of the second light-emitting element. Jung is further relied upon to teach wherein a size of the first light-emitting element is different from a size of the second light-emitting element (when sizes of the main pixel PXm and the auxiliary pixel PXa that emit light of the same color as each other are compared with each other, the size of the auxiliary pixel PXa may be greater than the size of the main pixel PXm-see [col. 33, ll. 22-29]). Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Jung with the 704 patent such that a size of the first light-emitting element is different from a size of the second light-emitting element, in order to provide a transmissive area in the component area in which light and/or sound may be transmitted (see [col. 8, ll. 66-col. 9, ll. 6]). Regarding claims 6 and 18, the 704 patent discloses each and every element but for the limitation wherein the second light-emitting element overlaps the conductive line. Jung is further relied upon to teach wherein the second light-emitting element overlaps the conductive line (see fig. 7B-PXa overlaps second electrode connection wiring EWL2 (conductive line)). Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Jung with the 704 patent such that the second light emitting element overlaps the conductive line, as taught by Jung, which constitutes combining prior art elements according to known methods to yield predictable results (i.e., allow for easy coupling of the conductive line to the light-emitting element to establish a connection between the light emitting element and a corresponding pixel circuit). Regarding claim 7, the 704 patent discloses each and every element but for the limitation wherein at least a portion of the conductive line comprises indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), indium zinc gallium oxide (IZGO), or aluminum zinc oxide (AZO). Jung is further relied upon to teach wherein at least a portion of the conductive line comprises indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), indium zinc gallium oxide (IZGO), or aluminum zinc oxide (AZO)- )-(second electrode connection wiring may include a transparent conductive material, e.g., ITO, IZO, ZnO, In2O3, IGO, or AZO-see [col. 23, ll. 20-28]). Therefore, it would have been obvious to a person of ordinary skill in the art before the effectively filing date of the claimed invention to incorporate the teachings of Jung with the 704 patent such that at least a portion of the conductive line comprises a transparent conductive material, as taught Jung, in order to ensure transmittance of the transmissive area (see [col. 10, ll. 15-20]). Allowable Subject Matter Claims 4, 8, 10-13, and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The references of record fail to teach or suggest the limitations recited in claims 4, 10, 12, and 19. Claims 11 and 13 respectively depend from claims 10 and 12, and are therefore equally indicated as allowable. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARDIS F AZONGHA whose telephone number is (571)270-7706. The examiner can normally be reached 10AM-7:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at (571)272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SARDIS F AZONGHA/ Primary Examiner, Art Unit 2627
Read full office action

Prosecution Timeline

May 26, 2025
Application Filed
Feb 07, 2026
Non-Final Rejection — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12598830
SOLID-STATE IMAGING ELEMENT AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12597630
BATTERIES WITH NON-RECTANGULAR SHAPES FOR AUGMENTED REALITY DEVICES, AND SYSTEMS AND METHODS OF USE THEREOF
2y 5m to grant Granted Apr 07, 2026
Patent 12578579
EYEWEAR WITH INTEGRATED PERIPHERAL DISPLAY
2y 5m to grant Granted Mar 17, 2026
Patent 12575273
Display Device
2y 5m to grant Granted Mar 10, 2026
Patent 12567371
DISPLAY DRIVING DEVICE
2y 5m to grant Granted Mar 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
79%
With Interview (-1.9%)
1y 11m
Median Time to Grant
Low
PTA Risk
Based on 616 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month