Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and 10-15 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al., US 2022/0199041 A1 (hereinafter “Park ‘041”) in view Park et al., US 2024/0005863 A1 (hereinafter “Park ‘863”).
Regarding claim 1, Park ‘041 discloses a compensation method (FIG. 6 generally and [0086]-[0095] with SS11 through SS32) for a display panel (FIG. 1, 100 at [0045]-[0046]), wherein the display panel comprises a plurality of pixel units (FIGS. 2 and 110 at [0047]-[0048]) each comprising a first sub-pixel (FIGS. 1-3 and P at [0046]-[0053]) and a second sub-pixel (FIGS. 1-3 and P at [0046]-[0053]), the compensation method comprising:
obtaining display data of the display panel (FIG. 4 and image data RGB from an external system received by the controller 400 at [0072] [0077] and [0080] and [0090]);
determining a first compensation value for the first sub-pixel based on a first weight of the first sub-pixel (FIG. 6 and [0088]-[0093] measuring and storing the data for each sub-pixel during commercialization stage at SS21 and SS22 and SS23 compensation value determined based on the characteristics of each pixel), and determining a second compensation value for the second sub-pixel based on a second weight of the second sub-pixel (FIG. 6 and [0088]-[0093] measuring and storing the data for each sub-pixel during commercialization stage at SS21 and SS22 and SS23 compensation value determined based on the characteristics of each pixel); and
compensating for a first luminance of the first sub-pixel based on the first compensation value ([0004] and [0009] and FIG. 6 at SS32 and [0095], and FIG. 4 at [0077]-[0081]), and compensating for a second luminance of the second sub-pixel based on the second compensation value ([0004] and [0009] and FIG. 6 at SS32 and [0095], and FIG. 4 at [0077]-[0081]).
However, Park ‘041 does not explicitly disclose display data is for a current frame;
determining a voltage offset value of the display panel corresponding to the current frame based on the display data;
determining a first and second compensation value based on the respective offset value
In the same field of endeavor, Park ‘863 discloses display data is for a current frame (FIGS. 3-5 and [0045]-[0050] and [0054]-[0060])
determining a voltage offset value of the display panel corresponding to the current frame based on the display data (FIGS. 8-10 and [0079]-[0086]);
determining a first and second compensation value based on offset value (FIGS. 3-5 and [0054]-[0060] and [0068]-[0069])
Before the effective filing date, it would have been obvious to a person of ordinary skill in the art to modify the display compensation method of Park ‘041 to incorporate the offset determination and compensation methods for display correction as disclosed by Park ‘863 because the references are within the same field of endeavor, namely, display pixel correction and compensation and methods thereof. The motivation to combine these references would have been to prevent or reduce luminance distortions when pixels have not correctly or adequately recovered (see Park ‘863 at least at [0006]-[0008]). Therefore, a person of ordinary skill in the art would have been motivated to combine the prior art to achieve the claimed invention and there would have been a reasonable expectation of success.
Regarding claim 2, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 1 (see above), wherein the determining of the voltage offset value comprises:
obtaining a preset relationship representing a relationship between the display data and the voltage offset value (Park ‘863 preset relationship is a look up table at FIG. 10 and [0081]-[0086]); and
determining the voltage offset value based on the display data and the preset relationship (Park ‘863 preset relationship is a look up table at FIG. 10 and [0081]-[0086] offset values determined accordingly).
Regarding claim 3, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 1 (see above), wherein each of the first sub-pixel and the second sub-pixel comprises a light-emitting element (Park ‘041 at FIG. 3 OLED at [0055]-[0056]) and a pixel circuit (Park ‘041 at FIG. 3 circuit diagram generally and at [0049]-[0056]);
the pixel circuit is electrically connected to a first terminal of the light-emitting element through a first node for loading a low-voltage signal (Park ‘041 at ELVSS at FIG. 3), and is electrically connected to a second terminal of the light-emitting element through a second node (Park ‘041 and N2 at FIG. 3) connected to a detector for detecting a potential at the second node (Park ‘041 SEN detector at FIG. 3);
the compensating for the first luminance of the first sub-pixel comprises:
obtaining a first potential at the second node of the first sub-pixel (Park ‘041 at FIG. 3 and [0050]-[0058]); and
compensating for the first luminance of the first sub-pixel based on the first compensation value and the first potential (Park ‘041 at FIG. 3 and [0050]-[0058] and [0067]-[0069]); and
the compensating for the second luminance of the second sub-pixel comprises:
obtaining a second potential at the second node of the second sub-pixel (Park ‘041 at FIG. 3 and [0050]-[0058]); and
compensating for the second luminance of the second sub-pixel based on the second compensation value and the second potential (Park ‘041 at FIG. 3 and [0050]-[0058] and [0067]-[0069]).
Regarding claim 4, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 3 (see above), wherein the current frame is one of a plurality of frames (Park ‘863, FIG. 4-6 and [0066], and each of the frames has a plurality of row write stages (Park ‘863 and FIG. 4-6 and [0066] image writing) and a plurality of horizontal blanking stages respectively following the plurality of row write stages (Park ‘863 blank period at FIGS. 4-6 and [0066], known as blanking period for horizontal/vertical scanning); the compensation method further comprises:
before obtaining the display data of the display panel for the current frame, controlling during the plurality of row write stages of the current frame the display panel to present a display picture of the current frame based on the display data (Park ‘863 and FIGS. 4-6 and [0066]-[0070] image writing);
the determining of the voltage offset value, the determining of the first compensation value, and the determining of the second compensation value are performed during at least one of the plurality of horizontal blanking stages of the current frame (Park ‘863 FIGS. 3-7 and [0057]-[0059] and [0066]-[0067] and [0071]-[0075]); and
the compensating for the first luminance and the compensating for the second luminance are performed during the plurality of row write stages of at least one of the frames following the current frame (Park ‘863 and FIGS. 8-10 at [0079]-[0086]).
Regarding claim 5, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 4 (see above), wherein the display panel comprises a plurality of sub-pixel groups respectively corresponding to the plurality of row write stages, and each of the sub-pixel groups comprises a plurality of sub-pixels each being one of the first sub-pixel and the second sub-pixel (Park ‘041 and FIG. 2 and 110 and [0047]-[0048] with groupings accordingly combinations thereof known in the art);
the display data comprises a plurality of display sub-data groups respectively corresponding to the plurality of sub-pixel groups (Park ‘041 and FIG. 2 and 110 and [0047]-[0048] with groupings accordingly combinations thereof known in the art, image data RGB as known in the art relates to the pixels according to the grouping of the pixel);
the second node is further connected to a reset circuit for controlling the potential at the second node (Park ‘041 at FIG. 3 and [0102] Vprer serves this function with SW3);
the controlling of the display panel to present the display picture of the current frame comprises: controlling, during each of the row write stages of the current frame, one of the sub-pixel groups corresponding to the each of the row write stages to emit light based on one of the display sub-data groups corresponding to the one of the sub-pixel groups (Park ‘863 and FIG. 4-6 and [0066] image writing in view of Park ‘041 image data RGB as known in the art relates to the pixels according to the grouping of the pixel); and
controlling at least two of the sub-pixel groups to maintain emitting of light until an end moment of a last one of the row write stages of the current frame (Park ‘863 and FIG. 4-6 and [0066] image writing in view of Park ‘041 image data RGB as known in the art relates to the pixels according to the grouping of the pixel); and
during one of the horizontal blanking stages of the current frame, for each of the sub-pixels of one of the sub-pixel groups corresponding to the one of the horizontal blanking stages, the potential at the second node of the each of the sub-pixels is controlled to turn off the light-emitting element of the each of the sub-pixels to obtain the first potential at the second node of the first sub-pixel and the second potential at the second node of the second sub-pixel (Park ‘863 FIGS. 3-7 and [0057]-[0059] and [0066]-[0067] and [0071]-[0075] during the blanking period to determine the compensation and voltage of the next frame and sub-pixels therein).
Regarding claim 6, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 3 (see above), wherein the pixel circuit comprises:
a data write circuit having an input terminal for loading a data signal (Park ‘041 FIGS. 1-3 and ST1 at [0054]); and
a drive circuit (Park ‘041 FIGS. 1-3 and ST1 at [0054] and 300 at [0061]-[0065])having a control terminal electrically connected to an output terminal of the data write circuit and an output terminal electrically connected to the second node (Park ‘041 FIGS. 1-3 and ST1 at [0054]-[0057] which is connected to N2);
the compensating for the first luminance of the first sub-pixel comprises: generating a first data signal based on the first compensation value and a first initial data signal for the first sub-pixel, and loading the first data signal to the input terminal of the data write circuit of the first sub-pixel to compensate for the first luminance of the first sub-pixel (Park ‘041 FIGS. 1-3 and ST1 at [0054]-[0060] and FIG. 6 at [0086]-[0095]); and
the compensating for the second luminance of the second sub-pixel comprises: generating a second data signal based on the second compensation value and a second initial data signal for the second sub-pixel, and loading the second data signal to the input terminal of the data write circuit of the second sub-pixel to compensate for the second luminance of the second sub-pixel (Park ‘041 FIGS. 1-3 and ST1 at [0054]-[0060] and FIG. 6 at [0086]-[0095]).
Regarding claim 10, it is similar in scope to claim 1 above, the only difference being claim 10 is directed to a display panel (Park ‘041 and FIG. 1, 100 generally). Therefore, claim 10 is similarly analyzed and rejected as claim 1.
Regarding claim 11, it is similar in scope to claim 2 above. Therefore, claim 11 is similarly analyzed and rejected as claim 2.
Regarding claim 12, it is similar in scope to claim 3 above. Therefore, claim 12 is similarly analyzed and rejected as claim 3.
Regarding claim 13, it is similar in scope to claim 4 above. Therefore, claim 13 is similarly analyzed and rejected as claim 4.
Regarding claim 14, it is similar in scope to claim 5 above. Therefore, claim 14 is similarly analyzed and rejected as claim 5.
Regarding claim 15, it is similar in scope to claim 6 above. Therefore, claim 15 is similarly analyzed and rejected as claim 6.
Claims 7-8 and 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Park ‘041 in view of Park ‘863 as applied to claims 1 and 10 above, and further in view of Lee et al., US 2021/0358426 A1 (hereinafter “Lee”).
Regarding claim 7, Park ‘041 in view of Park ‘863 discloses the compensation method according to claim 1 (see above), wherein the display data comprises first display sub-data corresponding to the first sub-pixel and second display sub-data corresponding to the second sub-pixel (Park ‘041 FIGS. 1-3 and ST1 at [0054]-[0060] and FIG. 6 at [0086]-[0095], the values are compensated for each pixel and the data is based on the data for each sub-pixel as well as each subpixels specific values). However, Park ‘041 in view of Park ‘863 does not explicitly disclose the determining of the voltage offset value comprises: determining a first voltage offset sub-value of the first sub-pixel based on the first display sub-data, and determining a second voltage offset sub-value of the second sub-pixel based on the second display sub-data; and summing the first voltage offset sub-value and the second voltage offset sub-value to obtain the voltage offset value .
In the same field of endeavor, Lee discloses the determining of the voltage offset value comprises: determining a first voltage offset sub-value of the first sub-pixel based on the first display sub-data (FIGS. 5-8 and [0093]-[0100] and [0119]-[0121] describing mean calculation of the offset value), and determining a second voltage offset sub-value of the second sub-pixel based on the second display sub-data (FIGS. 5-8 and [0093]-[0100] and [0119]-[0121] describing mean calculation of the offset value); and summing the first voltage offset sub-value and the second voltage offset sub-value to obtain the voltage offset value (FIGS. 5-8 and [0093]-[0100] and [0119]-[0121] describing mean calculation of the offset value).
Before the effective filing date, it would have been obvious to a person of ordinary skill in the art to modify the display brightness calculation of Park ‘041 in view of Park ’863 to incorporate the offset voltage addition method as disclosed by Lee because the references are within the same field of endeavor, namely, luminance compensation for a display device. The motivation to combine these references would have been to improve the perceptual resolution of images (see Lee at least at [0007]). Therefore, a person of ordinary skill in the art would have been motivated to combine the prior art to achieve the claimed invention and there would have been a reasonable expectation of success.
Regarding claim 8, Park ‘041 in view of Park ‘863 further in view of Lee discloses the compensation method according to claim 7 (see above), wherein the determining of the first compensation value comprises: multiplying the first weight by the voltage offset value to obtain the first compensation value (Lee at FIGS. 5-8 and [0100]-[0110] and [0119]-[0121] describing mean calculation of the offset value is then multiplied by weights of the accordingly); and the determining of the second compensation value comprises: multiplying the second weight by the voltage offset value to obtain the second compensation value (Lee at FIGS. 5-8 and [0100]-[0110] and [0119]-[0121] describing mean calculation of the offset value is then multiplied by weights of the accordingly).
Regarding claim 16, it is similar in scope to claim 7 above. Therefore, claim 16 is similarly analyzed and rejected as claim 7.
Regarding claim 17, it is similar in scope to claim 8 above. Therefore, claim 17 is similarly analyzed and rejected as claim 8.
Claims 9 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Park ‘041 in view of Park ‘863 further in view of Lee as applied to claims 7 and 16 above, and further in view of Nho et al., US 2018/0075798 A1 (hereinafter “Nho”).
Regarding claim 9, Park ‘041 in view of Park ‘863 further in view of Lee discloses the compensation method according to claim 7 (see above).
However, Park ‘041 in view of Park ‘863 further in view of Lee does not explicitly disclose wherein the determining of the first voltage offset sub-value comprises:
obtaining a first mapping table and a first correction curve for the first sub-pixel;
determining based on the first display sub-data and the first mapping table a first current value of the first sub-pixel corresponding to the current frame; and
determining based on the first current value and the first correction curve the first voltage offset sub-value of the first sub-pixel corresponding to the current frame, wherein the first mapping table represents a relationship between the first display sub-data and the first current value, and the first correction curve represents a relationship between the first current value and the first voltage offset sub-value; and
the determining of the second voltage offset sub-value comprises:
obtaining a second mapping table and a second correction curve for the second sub-pixel; determining based on the second display sub-data and the second mapping table a second current value of the second sub-pixel corresponding to the current frame; and
determining based on the second current value and the second correction curve the second voltage offset sub-value of the second sub-pixel corresponding to the current frame, wherein the second mapping table represents a relationship between the second display sub-data and the second current value, and the second correction curve represents a relationship between the second current value and the second voltage offset sub-value.
In the same field of endeavor, Nho discloses wherein the determining of the first voltage offset sub-value comprises:
obtaining a first mapping table (FIGS. 157-159 and [0567]-[0569]) and a first correction curve for the first sub-pixel (FIGS. 139-145 and [0531] and [0548]-[0553]);
determining based on the first display sub-data and the first mapping table a first current value of the first sub-pixel corresponding to the current frame (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of pixel current value); and
determining based on the first current value and the first correction curve the first voltage offset sub-value of the first sub-pixel corresponding to the current frame (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of offset values accordingly), wherein the first mapping table represents a relationship between the first display sub-data and the first current value ([0545]-[0553] and [0555-[0560] and [FIGS. 139-149B), and the first correction curve represents a relationship between the first current value and the first voltage offset sub-value (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of offset values and relationship to current values determination); and
the determining of the second voltage offset sub-value comprises:
obtaining a second mapping table (FIGS. 157-159 and [0567]-[0569]) and a second correction curve for the second sub-pixel (FIGS. 139-145 and [0531] and [0548]-[0553]);
determining based on the second display sub-data and the second mapping table a second current value of the second sub-pixel corresponding to the current frame (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of pixel current value); and
determining based on the second current value and the second correction curve the second voltage offset sub-value of the second sub-pixel corresponding to the current frame (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of offset values accordingly), wherein the second mapping table represents a relationship between the second display sub-data and the second current value ([0545]-[0553] and [0555-[0560] and [FIGS. 139-149B), and the second correction curve represents a relationship between the second current value and the second voltage offset sub-value (FIGS. 139-145 and [0531] and [0548]-[0553] describing determination of offset values and relationship to current values determination).
Before the effective filing date, it would have been obvious to a person of ordinary skill in the art to modify the display brightness calculation of Park ‘041 in view of Park ’863 further in view of Lee to incorporate the compensation methods of Nho because the references are within the same field of endeavor, namely, luminance compensation for a display device. The motivation to combine these references would have been to improve uniformity of the display panels given factors causing deterioration (see Nho at least at [0008]). Therefore, a person of ordinary skill in the art would have been motivated to combine the prior art to achieve the claimed invention and there would have been a reasonable expectation of success.
Regarding claim 18, it is similar in scope to claim 9 above. Therefore, claim 18 is similarly analyzed and rejected as claim 9.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Jung et al., US 2017/0061892 A1;
Lee et al., US 2024/0038186 A1;
Yoon et al., US 2014/0176625 A1;
Chang et al., US 10,388,207 A1;
Nishikawa et al., US 2017/0186373 A1;
Moon et al., US 2017/0206846 A1;
Do et al., US 2019/0035331 A1;
Young et al., US 2024/0404445 A1;
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARVESH J NADKARNI whose telephone number is (571)270-7562. The examiner can normally be reached 8AM-5PM M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LunYi Lao can be reached at (571) 272-7671. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SARVESH J NADKARNI/Examiner, Art Unit 2621