Prosecution Insights
Last updated: October 01, 2026
Application No. 19/224,446

BAD BLOCK REPLACEMENT BY A MEMORY SYSTEM

Non-Final OA §102§103
Filed
May 30, 2025
Priority
Jun 28, 2024 — provisional 63/666,004
Examiner
FARROKH, HASHEM
Art Unit
2138
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
825 granted / 925 resolved
+34.2% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
13 currently pending
Career history
944
Total Applications
across all art units

Statute-Specific Performance

§101
8.0%
-32.0% vs TC avg
§103
40.8%
+0.8% vs TC avg
§102
18.9%
-21.1% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 925 resolved cases

Office Action

§102 §103
DETAIL ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . 2. The instant application having application No. 19/224,446 has a total of 25 claims pending in the application; there are 3 independent claims and 22 dependent claims, all of which are ready for examination by the examiner. INFORMATION CONCERNING DRAWING: 3. The applicant’s drawings submitted on 05/30/2025 are acceptable for examination purposes. RELEVANT PRIOR ART THE EXAMINER: 4. The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c). Huang et al. (US 20210012851 A1) teaches “…incrementing a failure counter for a block in the NAND memory cells where the value was stored...” (claim 13). Liu et al. (US 20210391029 A1) teaches “…populating a replacement block pool 200 for replacing GBBs in a memory device ...” (par. 0035). LEE (US 20210263844 A1) teaches “… a second memory block BLK2 of the memory blocks BLK1 to BLKi which are considered the non-free blocks (NON-FREE_BLK) is found to be a bad block BAD_BLK, the controller 130 may replace the second memory block BLK2 with an i+1 memory block BLKi+1, which is one of the memory blocks BLKi+1 to BLKi+j considered the free blocks…” (par. 0085). INFORMATION CONCERNING CLAIMS: Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – Claims 1, 6-7, 10-11, 16-17, 20-21, and 23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by HEO et al. “Heo” (US 2015/0026449 A1). 5. Regarding claim 1, Heo teaches or suggests: “A memory system, comprising: one or more memory devices;” (e.g., Fig. 10, ¶ 0145, a memory system including a nonvolatile memory device and a computing system). “and processing circuitry (Fig. 10, ¶ 0141, SSD controller 510 includes a CPU 511) coupled with the one or more memory devices and configured to cause the memory system to: determine whether a quantity of replacement blocks of a first memory device satisfies a threshold value in response to detecting a bad block comprising one or more errors;” (e.g., Fig. 05, ¶ 0103, Each of the parameters has threshold value ranges corresponding to a good status, an intermediate status, and a bad status; ¶ 0370, When a specific condition is satisfied, the second embodiment is enabled. For example, when a number of user blocks reaches a threshold value; ¶ 0375, when a bad block arises and a number of reserved blocks is less than a threshold value). Fig. 5 shows a table maintaining various parameters used to determine the status of non-volatile memory. One parameter among the plurality parameters is the parameter “Pa” associated with reserved block count ranges, which used, for example, to determine whether to replace a bad block with a reserved block. “transmit an indication that the quantity of available replacement blocks satisfies the threshold value in response to determining that the quantity of replacement blocks satisfies the threshold value;” (e.g., ¶ 0379, When the number of the reserved blocks is less than a threshold number, the status checking module 125, 225, 415 or 515 displays a message, which asks a determination to convert an user block into a reserved block should be made). “receive an indication to replace the bad block with an available user block of the first memory device in response to transmitting the indication that the quantity of available replacement blocks satisfies the threshold value,” (e.g., ¶ 0379, Based on a response from an user). “wherein the memory system comprises a plurality of user blocks for storing user data;” (e.g., ¶ 0289, converting a user block into a reserved block when reserved blocks are consumed. Thus, a performance in dealing with an occurrence of a bad block is maintained). “and replace the bad block with the available user block in response to receiving the indication to replace the bad block with the available user block.” (e.g., ¶ 0379, the status checking module 125, 225, 415 or 515 selectively converts a user block into a reserved block; ¶ 0157, FIG. 15 illustrates a bad block replacement algorithm during a program fail operation according to inventive concepts of the present invention). 6. Regarding claim 11, Heo teaches or suggests: “A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system (e.g., ¶ 0288) cause the memory system to: determine whether a quantity of replacement blocks of a first memory device satisfies a threshold value in response to detecting a bad block comprising one or more errors;” (e.g., Fig. 05, ¶ 0103, Each of the parameters has threshold value ranges corresponding to a good status, an intermediate status, and a bad status; ¶ 0370, When a specific condition is satisfied, the second embodiment is enabled. For example, when a number of user blocks reaches a threshold value; ¶ 0375, when a bad block arises and a number of reserved blocks is less than a threshold value). Fig. 5 shows a table maintaining various parameters used to determine the status of non-volatile memory. One parameter among the plurality parameters is the parameter “Pa” associated with reserved block count ranges, which used, for example, to determine whether to replace a bad block with a reserved block. “transmit an indication that the quantity of available replacement blocks satisfies the threshold value in response to determining that the quantity of replacement blocks satisfies the threshold value;” (e.g., ¶ 0379, When the number of the reserved blocks is less than a threshold number, the status checking module 125, 225, 415 or 515 displays a message, which asks a determination to convert an user block into a reserved block should be made). “receive an indication to replace the bad block with an available user block of the first memory device in response to transmitting the indication that the quantity of available replacement blocks satisfies the threshold value,” (e.g., ¶ 0379, Based on a response from an user). “wherein the memory system comprises a plurality of user blocks for storing user data;” (e.g., ¶ 0289, converting a user block into a reserved block when reserved blocks “are consumed. Thus, a performance in dealing with an occurrence of a bad block is maintained). “and replace the bad block with the available user block in response to receiving the indication to replace the bad block with the available user block.” (e.g., ¶ 0379, the status checking module 125, 225, 415 or 515 selectively converts a user block into a reserved block; ¶ 0157, FIG. 15 illustrates a bad block replacement algorithm during a program fail operation according to inventive concepts of the present invention). 7. Regarding claim 21, Heo teaches or suggests: “A method by a memory system (e.g., Fig. 15), comprising: determining whether a quantity of replacement blocks of a first memory device satisfies a threshold value in response to detecting a bad block comprising one or more errors;” (e.g., Fig. 05, ¶ 0103, Each of the parameters has threshold value ranges corresponding to a good status, an intermediate status, and a bad status; ¶ 0370, When a specific condition is satisfied, the second embodiment is enabled. For example, when a number of user blocks reaches a threshold value; ¶ 0375, when a bad block arises and a number of reserved blocks is less than a threshold value). Fig. 5 shows a table maintaining various parameters used to determine the status of non-volatile memory. One parameter among the plurality parameters is the parameter “Pa” associated with reserved block count ranges, which used, for example, to determine whether to replace a bad block with a reserved block. “transmitting an indication that the quantity of available replacement blocks satisfies the threshold value in response to determining that the quantity of replacement blocks satisfies the threshold value;” (e.g., ¶ 0379, When the number of the reserved blocks is less than a threshold number, the status checking module 125, 225, 415 or 515 displays a message, which asks a determination to convert an user block into a reserved block should be made). “receiving an indication to replace the bad block with an available user block of the first memory device in response to transmitting the indication that the quantity of available replacement blocks satisfies the threshold value,” (e.g., ¶ 0379, Based on a response from an user). “wherein the memory system comprises a plurality of user blocks for storing user data;” (e.g., ¶ 0289, converting a user block into a reserved block when reserved blocks “are consumed. Thus, a performance in dealing with an occurrence of a bad block is maintained). and replacing the bad block with the available user block in response to receiving the indication to replace the bad block with the available user block.” (e.g., ¶ 0379, the status checking module 125, 225, 415 or 515 selectively converts a user block into a reserved block; ¶ 0157, FIG. 15 illustrates a bad block replacement algorithm during a program fail operation according to inventive concepts of the present invention). 8. Regarding claims 6, 16, and 23 Heo further teaches: “compare a value of a counter to a threshold value.” (e.g., Fig. 5, ¶ 0102, Pa represents a reserved block count; Fig.37, ¶ 0263, determines whether the number of available reserved blocks is less than a reference number in operation S3110) determining whether the determines whether the number of available reserved blocks is less than a reference number comprises comparing the available reserve block count (e.g., a value of counter) to a reference number (e.g., a threshold value). 9. Regarding claims 7 and 17 Heo further teaches: “detect the bad block;” (e.g., ¶ 0083, Parameters for detecting status information of the flash memory 120 include a reserved block count, a runtime bad block count “and increment the value of the counter in response to detecting the bad block.” (e.g., claim 21, determining whether a number of bad blocks of a first memory chip among the plurality of memory chips is higher than a threshold value). Heo teaches bad block count, and the number bad block count compared to a threshold value and as the number or counting of bad block increases the counting of bad memory blocks goes up or counts-up (e.g., increments). Heo inherently teaches increment the value of count. 10. Regarding claims 10 and 20, Heo further teaches” “wherein the replacement blocks are designated for replacing bad blocks of the first memory device.” (e.g., Fig. 15, ¶ 0157, If the number of bad blocks does not exceed that of reserved blocks, the memory controller 1130 allocates new free blocks from the reserve blocks to replace the bad blocks in operation S1320). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 12, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Heo in view of LEE et al. “Lee” (US 2024/0377950 A1) 11. Regarding claims 2, 12, and 22 Heo teaches all limitations included in claims 1, 11, and 21 but does not expressly teach while Lee discloses: “export, to a second memory device, user data from one or more user blocks of the first memory device in response to replacing the bad block with the available user block.” (e.g., Fig. 5, ¶ 0119, When the first memory die DIE_1 is determined to be in the unusable state, the controller 120 may migrate the user data USR_DATA stored in the first memory die DIE_1 to the first overprovisioning block group OP_BLK_GRP_1; ¶ 0120, first overprovisioning block group OP_BLK_GRP_1 may include overprovisioning blocks OP_BLK included in memory dies other than the first memory die DIE_1 among memory dies DIE included in the first memory die group DIE_GRP_1) migrating user data from one or more USER_BLK stored in DIE_1 to a overprovisioning block group OP_BLK_GRP_1 comprising one or more dies not including DIE_1. Disclosures by Heo and Lee are analogous because they are in the same field of endeavor and/or solving a similar or common problem. It would have been obvious to a person of having ordinary skill in the art before the effective filing date of the claimed invention to modify the Method of managing a Solid State Drive taught by Heo to include the migrating (exporting) user data overprovisioning block groups using different dies (e.g., memory devices) disclosed by Lee. The motivation for including the migration of user data by overprovisioning block groups is to reduce performance variance between the memory die groups (e.g., see pars. 0007-0011 of Lee). Therefore, it would have been obvious to combine teaching of Lee with Heo to obtain the invention as specified in the claim. Allowable Subject Matter 12. Claims 3-5, 8-9, 13-15, and 24-25 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Direction OF FUTURE CORRESPONDENCES: 13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HASHEM FARROKH whose telephone number is (571)272-4193. The examiner can normally be reached Monday through Friday from 8:30 am - 5:00 pm. 14. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Mr. Tim Vo can be reached on (571)272-3642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. 15. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see htto://pair-direct.uspto.gov. For questions regarding access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786- 9199 (IN USA OR CANADA) or 571-272-1000. /HASHEM FARROKH/Primary Examiner, Art Unit 2138
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Prosecution Timeline

May 30, 2025
Application Filed
Aug 10, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
92%
With Interview (+2.3%)
2y 3m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 925 resolved cases by this examiner. Grant probability derived from career allowance rate.

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