Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to the application filed June 2, 2025. Claims 1-20 are presented for examination. Claims 1, 11 and 20 are independent claims.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119(a)-(d), and based on application # 10-2024-0079869 filed in Korea on June 19, 2024 which papers have been placed of record in the file.
Oath/Declaration
The Office acknowledges receipt of a properly signed Oath/Declaration submitted June 2, 2025.
Information Disclosure Statement
The Applicant’s Information Disclosure Statement filed (June 2, 2025) has been received, entered into the record, and considered.
Drawings
The drawings filed June 2, 2025 are accepted by the examiner.
Abstract
The abstract filed December 15, 2023 is accepted by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 5, 6, 7, 10, 11, 12, 15, 16, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20230117873 A1) in view of Chae et al. (US 20220358884 A1).
As to Claim 1:
Kim et al. discloses a display device (Kim, see Abstract, where Kim discloses a display device includes a light-emitting device, a first transistor, and a second transistor connected between the
first transistor and the light-emitting device and including a gate electrode which receives the emission control signal. When a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value) comprising: a display panel (Kim, see DA in figure 1 and paragraph [0017], where Kim discloses a display device includes a display panel including a pixel connected to scan lines, an emission control line, and a data line, a scan driving circuit that outputs scan signals respectively to the scan lines, a light emission driving circuit that outputs an emission control signal to the emission control line, and a driving controller that controls the scan driving circuit and the light emission driving circuit) including a pixel (Kim, see PX in figure 1 and paragraph [0017], where Kim discloses that display device includes a display panel including a pixel) configured to emit light in response to an emission signal (Kim, see paragraph [0017], where Kim discloses that the pixel includes a light-emitting device, a first transistor, and a second transistor connected between the first transistor and the light emitting device and including a gate electrode which receives the emission control signal); and a display panel driver (Kim, see driving controller 100 in figure 1) configured to drive the display panel (Kim, see paragraph [0064], where Kim discloses that the driving controller 100 determines a frequency of the input image signal RGB, and outputs the output image signal DATA corresponding to the previous input image signal during a blank period of the input image signal RGB, based on the input image signal RGB and the control signal CTRL. Accordingly, the output image signal DATA may be provided to the display panel DP even in the blank period of the input image signal RGB), wherein the display panel driver is configured to generate the emission signal (Kim, see paragraph [0017], where Kim discloses that a light emission driving circuit that outputs an emission control signal to the emission control line, and a driving controller that controls the scan driving circuit and the light emission driving circuit) of a first frequency in a first period in which image data is received from a processor, and to generate the emission signal of a frequency different from the first frequency in a second period different from the first period (Kim, see paragraphs [0017]-[0018] and [0028], where Kim discloses that a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value. The driving controller may set the pulse width of the emission control signal to the first value during the active period when the driving frequency is the second frequency in a variable frequency mode, and may provide a light emission driving signal which sets the pulse width of the emission control signal to the second value to the light emission driving circuit during the blank period, and the light emission driving circuit may output the emission control signal in response to the light emission driving signal. Further, receiving an emission control signal, includes determining whether an operation mode is a variable frequency mode, determining whether a driving frequency is a second frequency lower than a first frequency,
and a light emission driving operation of setting a pulse width of the emission control signal to a first value during an active period when the operation mode is the variable frequency mode and the driving frequency is the second frequency, and setting the pulse width of the emission control signal to a second value different from the first value during a blank period. When the driving frequency is the second frequency, one frame includes the active period and the blank period).
Kim differs from the claimed subject matter in that Kim does not explicitly disclose input image data. However in an analogous art, Chae discloses input image data (Chae, see paragraph [0050], where Chae discloses that the timing controller 600 may be supplied with input image data IRGB and control signals (Sync and DE) from a host system, such as an application processor (AP), through a predetermined interface).
It would have been obvious to one of ordinary skill in the art at the time of invention to modify the invention of Kim with Chae. One would be motivated to modify Kim by disclosing input image data as taught by Chae and thereby improving image quality by using a single frame period of a pixel PX to include a single active period and at least one blank period depending on the frame frequency (Chae, paragraph [0047]).
As to Claim 2:
Kim in view of Chae discloses that the display device of claim 1, wherein the display panel driver is configured to: predict an input of next input image data based on a first synchronization signal corresponding to an input of the input image data to generate a second synchronization signal; and determines a frequency of the emission signal based on the second synchronization signal (Kim, see paragraph [0141] and [0142], where Kim discloses that while the mode signal MD indicates the variable frequency mode, the first counter 130 may be reset in synchronization with a vertical synchronization signal (not illustrated) within the control signal CTRL and may perform
a count in synchronization with a horizontal synchronization signal (not illustrated). When the driving time of the pixels PX arranged in the first direction DR1 of the display panel DP (refer to FIG. 1) is 1H, the horizontal synchronization signal may be a signal that transitions to an active level every 1H. The vertical sync signal may be a signal that transitions to the active level at the beginning of every frame. In an embodiment, when the number (i.e., resolution) of the pixels PX
arranged on the display panel DP is 3840x2160, the driving time for all the pixels PX for one frame may be 2160H, and a vertical blank interval may be 40H. In this case, the count value of the first counter 130 may increase up to 2160+40, that is, 2200 during one frame, for example. Therefore, in
each of the frames F11, F12, F13, and F14, the count value of the first counter 130 may increase up to 2200).
As to Claim 5:
Kim in view of Chae discloses that the display device of claim 1, wherein a frequency of the emission signal in the second period gradually increases (Kim, see paragraph [0127], where Kim discloses that when the driving frequency of the display device DD is the first frequency (e.g., 240 Hz), the amount of light of the light-emitting device ED (refer to FIG. 2) is different from the amount of light of the light-emitting device ED when the driving frequency of the display device DD is the third frequency ( e.g., 60 Hz). In particular, it may be seen that the deviation in the amount of light of the light-emitting device ED increases in a section corresponding to the blank period BP of the frame F31 illustrated in FIG. 6).
As to Claim 6:
Kim in view of Chae discloses that the display device of claim 1, wherein a frequency of the emission signal in the first period following the second period gradually decreases to the first frequency (Kim, see paragraph [0103], where Kim discloses that referring to FIGS. 1, 2, 4A, 4B and 4C, for convenience of description, although the display device DD operates at a first frequency (e.g., 240 hertz (Hz)), a second frequency (e.g., 120 Hz), and a third frequency (e.g., 60 Hz) in an embodiment, the invention is not limited thereto. The driving frequency of the display device DD may be variously changed. In an embodiment, the driving frequency of the display device DD may be selected from among the first frequency, the second frequency, and the third frequency. In addition, the display device DD may change the driving frequency to any one of the first to third frequencies at any time without fixing the driving frequency to a predetermined frequency during operation. In an embodiment, the driving frequency of the display device DD may be determined depending on the frequency of the input image signal RGB. In an embodiment, the driving frequency of the display device DD may be set to a maximum frequency at which the display panel DP is operable regardless of the frequency of the input image signal RGB).
As to Claim 7:
Kim in view of Chae discloses that the display device of claim 1, wherein the display panel driver is configured to compensate for a gamma voltage in the second period (Chae, see paragraph [0125], where Chae discloses that the scan driver 200 may supply a third scan signal Gli to the third scan line S3i in the second period P2. The seventh transistor M7 may be turned on in response to the third scan signal Gii. When the seventh transistor M7 is turned on, the voltage of the first initialization power Vintl may be supplied to the gate electrode of the first transistor Ml. For instance, in the second period P2, the gate voltage of the first transistor Ml may be initialized based on the voltage of the first initialization power Vintl).
As to Claim 10:
Kim in view of Chae discloses that the display device of claim 1, wherein the display panel driver is configured to increase a bias voltage that refreshes a source electrode of a driving transistor of the pixel in the second period (Chae, see paragraph [0079], where Chae discloses that a third voltage level may be higher than the second voltage level. Accordingly, in a low-frequency driving state in which the length of a single frame period increases, the voltage level of the on-bias power (Vobs) for applying an on-bias voltage to the first electrode (e.g., the source electrode) of the first transistor M1 is changed, whereby display quality degradation arising from a change in the hysteresis characteristic of the first transistor M1).
As to Claim 11:
Kim et al. discloses a method of driving a display device (Kim, see Abstract, where Kim discloses a display device includes a light-emitting device, a first transistor, and a second transistor connected between the first transistor and the light-emitting device and including a gate electrode which receives the emission control signal. When a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value), comprising: generating an emission signal (Kim, see paragraph [0017], where Kim discloses that a light emission driving circuit that outputs an emission control signal to the emission control line, and a driving controller that controls the scan driving circuit and the light emission driving circuit) of a first frequency in a first period in which image data is received from a processor; generating the emission signal of a frequency different from the first frequency in a second period different from the first period (Kim, see paragraphs [0017]-[0018] and [0028], where Kim discloses that a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value. The driving controller may set the pulse width of the emission control signal to the first value during the active period when the driving frequency is the second frequency in a variable frequency mode, and may provide a light emission driving signal which sets the pulse width of the emission control signal to the second value to the light emission driving circuit during the blank period, and the light emission driving circuit may output the emission control signal in response to the light emission driving signal. Further, receiving an emission control signal, includes determining whether an operation mode is a variable frequency mode, determining whether a driving frequency is a second frequency lower than a first frequency, and a light emission driving operation of setting a pulse width of the emission control signal to a first value during an active period when the operation mode is the variable frequency mode and the driving frequency is the second frequency, and setting the pulse width of the emission control signal to a second value different from the first value during a blank period. When the driving frequency is the second frequency, one frame includes the active period and the blank period); and providing the emission signal (Kim, emission signals EML1 through EMLn provided to pixels PX in figure 1) to a pixel (Kim, see PX in figure 1).
Kim differs from the claimed subject matter in that Kim does not explicitly disclose input image data. However in an analogous art, Chae discloses input image data (Chae, see paragraph [0050], where Chae discloses that the timing controller 600 may be supplied with input image data IRGB and control signals (Sync and DE) from a host system, such as an application processor (AP), through a predetermined interface).
It would have been obvious to one of ordinary skill in the art at the time of invention to modify the invention of Kim with Chae. One would be motivated to modify Kim by disclosing input image data as taught by Chae and thereby improving image quality by using a single frame period of a pixel PX to include a single active period and at least one blank period depending on the frame frequency (Chae, paragraph [0047]).
As to Claim 12:
Kim in view of Chae discloses that the method of driving the display device of claim 11, further comprising predicting an input of next input image data based on a first synchronization signal corresponding to an input of the input image data to generate a second synchronization signal, wherein a frequency of the emission signal is determined based on the second synchronization signal (Kim, see paragraph [0141] and [0142], where Kim discloses that while the mode signal MD indicates the variable frequency mode, the first counter 130 may be reset in synchronization with a vertical synchronization signal (not illustrated) within the control signal CTRL and may perform a count in synchronization with a horizontal synchronization signal (not illustrated). When the driving time of the pixels PX arranged in the first direction DR1 of the display panel DP (refer to FIG. 1) is 1H, the horizontal synchronization signal may be a signal that transitions to an active level every 1H. The vertical sync signal may be a signal that transitions to the active level at the beginning of every frame. In an embodiment, when the number (i.e., resolution) of the pixels PX arranged on the display panel DP is 3840x2160, the driving time for all the pixels PX for one frame may be 2160H, and a vertical blank interval may be 40H. In this case, the count value of the first counter 130 may increase up to 2160+40, that is, 2200 during one frame, for example. Therefore, in each of the frames F11, F12, F13, and F14, the count value of the first counter 130 may increase up to 2200).
As to Claim 15:
Kim in view of Chae discloses that the method of driving the display device of claim 11, wherein a frequency of the emission signal in the second period gradually increases (Kim, see paragraph [0127], where Kim discloses that when the driving frequency of the display device DD is the first frequency (e.g., 240 Hz), the amount of light of the light-emitting device ED (refer to FIG. 2) is different from the amount of light of the light-emitting device ED when the driving frequency of the display device DD is the third frequency ( e.g., 60 Hz). In particular, it may be seen that the deviation in the amount of light of the light-emitting device ED increases in a section corresponding to the blank period BP of the frame F31 illustrated in FIG. 6).
As to Claim 16:
Kim in view of Chae discloses that the method of driving the display device of claim 11, wherein a frequency of the emission signal in the first period following the second period gradually decreases to the first frequency (Kim, see paragraph [0103], where Kim discloses that referring to FIGS. 1, 2, 4A, 4B and 4C, for convenience of description, although the display device DD operates at a first frequency (e.g., 240 hertz (Hz)), a second frequency (e.g., 120 Hz), and a third frequency (e.g., 60 Hz) in an embodiment, the invention is not limited thereto. The driving frequency of the display device DD may be variously changed. In an embodiment, the driving frequency of the display device DD may be selected from among the first frequency, the second frequency, and the third frequency. In addition, the display device DD may change the driving frequency to any one of the first to third frequencies at any time without fixing the driving frequency to a predetermined frequency during operation. In an embodiment, the driving frequency of the display device DD may be determined depending on the frequency of the input image signal RGB. In an embodiment, the driving frequency of the display device DD may be set to a maximum frequency at which the display panel DP is operable regardless of the frequency of the input image signal RGB).
As to Claim 19:
Kim in view of Chae discloses that the method of driving the display device of claim 11, further comprising increasing a bias voltage that refreshes a source electrode of a driving transistor of the pixel in the second period (Chae, see paragraph [0079], where Chae discloses that a third voltage level may be higher than the second voltage level. Accordingly, in a low-frequency driving state in which the length of a single frame period increases, the voltage level of the on-bias power (Vobs) for applying an on-bias voltage to the first electrode (e.g., the source electrode) of the first transistor M1 is changed, whereby display quality degradation arising from a change in the hysteresis characteristic of the first transistor M1).
As to Claim 20:
Kim et al. discloses an electronic device (Kim, see Abstract, where Kim discloses a display device includes a light-emitting device, a first transistor, and a second transistor connected between the first transistor and the light-emitting device and including a gate electrode which receives the emission control signal. When a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value), comprising: a processor to provide image data (Kim, see paragraph [0063], where Kim discloses that the driving controller 100 receives an image signal (also referred to as an input image signal) RGB and a control signal CTRL); and a display device including a display panel configured to display an image based on the image data (Kim, see paragraph [0064], where Kim discloses that the driving controller 100 determines a frequency of the input image signal RGB, and outputs the output image signal DATA corresponding to the previous input image signal during a blank period of the input image signal RGB, based on the input image signal RGB and the control signal CTRL. Accordingly, the output image signal DATA may be provided to the display panel DP even in the blank period of the input image signal RGB), wherein the display device comprising a display panel driver configured to drive the display panel (Kim, see paragraph [0017], where Kim discloses that a light emission driving circuit that outputs an emission control signal to the emission control line, and a driving controller that controls the scan driving circuit and the light emission driving circuit), wherein the display panel driver is configured to generate an emission signal of a first frequency in a first period in which the image data is received from the processor, and to generate the emission signal of a frequency different from the first frequency in a second period different from the first period (Kim, see paragraphs [0017]-[0018] and [0028], where Kim discloses that a driving frequency is a second frequency less than a first frequency, one frame includes an active period and a blank period, and during the active period, a pulse width of the emission control signal has a first value, and during the blank period, the pulse width of the emission control signal has a second value different from the first value. The driving controller may set the pulse width of the emission control signal to the first value during the active period when the driving frequency is the second frequency in a variable frequency mode, and may provide a light emission driving signal which sets the pulse width of the emission control signal to the second value to the light emission driving circuit during the blank period, and the light emission driving circuit may output the emission control signal in response to the light emission driving signal. Further, receiving an emission control signal, includes determining whether an operation mode is a variable frequency mode, determining whether a driving frequency is a second frequency lower than a first frequency, and a light emission driving operation of setting a pulse width of the emission control signal to a first value during an active period when the operation mode is the variable frequency mode and the driving frequency is the second frequency, and setting the pulse width of the emission control signal to a second value different from the first value during a blank period. When the driving frequency is the second frequency, one frame includes the active period and the blank period).
Kim differs from the claimed subject matter in that Kim does not explicitly disclose input image data. However in an analogous art, Chae discloses input image data (Chae, see paragraph [0050], where Chae discloses that the timing controller 600 may be supplied with input image data IRGB and control signals (Sync and DE) from a host system, such as an application processor (AP), through a predetermined interface).
It would have been obvious to one of ordinary skill in the art at the time of invention to modify the invention of Kim with Chae. One would be motivated to modify Kim by disclosing input image data as taught by Chae and thereby improving image quality by using a single frame period of a pixel PX to include a single active period and at least one blank period depending on the frame frequency (Chae, paragraph [0047]).
Allowable Subject Matter
Claims 3, 4, 8, 9, 13, 14, 17 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Referring to claim 3 the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein based on the first synchronization signal not being enabled while the second synchronization signal is enabled, the display panel driver is configured to generate the emission signal of the frequency different from the first frequency”.
Referring to claim 4, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein the display panel driver is configured to generate the emission signal of the first frequency based on the first synchronization signal and the second synchronization signal being simultaneously enabled”.
Referring to claim 8, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein the display panel driver is configured to compensate for the gamma voltage in a direction of increasing luminance in the second period”.
Referring to claim 9, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein the display panel driver is configured to: predict an input of next input image data based on a first synchronization signal corresponding to an input of the input image data to generate a second synchronization signal; determine a frequency of the emission signal based on the second synchronization signal; and compensate for the gamma voltage when the first synchronization signal is not enabled while the second synchronization signal is enabled”.
Referring to claim 13, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein the display panel driver is configured to: predict an input of next input image data based on a first synchronization signal corresponding to an input of the input image data to generate a second synchronization signal; determine a frequency of the emission signal based on the second synchronization signal; and compensate for the gamma voltage when the first synchronization signal is not enabled while the second synchronization signal is enabled”.
Referring to claim 14, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “wherein generating the emission signal of the first frequency includes generating the emission signal of the first frequency based on the first synchronization signal and the second synchronization signal being simultaneously enabled”.
Referring to claim 17, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “further comprising compensating for a gamma voltage in the second period, wherein the gamma voltage is compensated in a direction of increasing luminance in the second period”.
Referring to claim 18, the following is a statement of reasons for the indication of allowable subject matter: the prior art fail to suggest limitations “further comprising: predicting an input of next input image data based on a first synchronization signal corresponding to an input of the input image data to generate a second synchronization signal, wherein a frequency of the emission signal is determined based on the second synchronization signal, and the compensating of the gamma voltage includes compensating for the gamma voltage when the first synchronization signal is not enabled while the second synchronization signal is enabled”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to
applicant's disclosure. Pyo (US 10854144 B2) discloses that the dimming controller generates at least one temporary voltage set by performing a first interpolating operation using a (j)th band voltage set and a (j+1)th band voltage set among first through (i)th band voltage sets corresponding to first through (i)th dimming bands, respectively, and generates a grayscale gamma voltage set corresponding to target luminance by performing a second interpolating operation using the temporary voltage set and the (j)th band voltage set. The panel driver drives the display panel by converting image data into a data signal based on the grayscale gamma voltage set and by providing the data signal to the pixels.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NELSON ROSARIO whose telephone number is (571)270-1866. The examiner can normally be reached on Monday through Friday, 7:30am- 5:00pm EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached on (571) 270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/NELSON M ROSARIO/ Primary Examiner, Art Unit 2624
.
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