Prosecution Insights
Last updated: April 19, 2026
Application No. 19/227,262

Through Package Vertical Interconnect and Method of Making Same

Final Rejection §102§103§112
Filed
Jun 03, 2025
Examiner
NGUYEN, DONGHAI D
Art Unit
3729
Tech Center
3700 — Mechanical Engineering & Manufacturing
Assignee
Chipletz Inc.
OA Round
2 (Final)
75%
Grant Probability
Favorable
3-4
OA Rounds
3y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allow Rate
661 granted / 878 resolved
+5.3% vs TC avg
Strong +29% interview lift
Without
With
+29.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
21 currently pending
Career history
899
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
46.6%
+6.6% vs TC avg
§102
33.0%
-7.0% vs TC avg
§112
17.0%
-23.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 878 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed on November 12, 2025 has been entered and considered; however, the application is not in condition for allowance because of the following: Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: --METHOD OF MAKING A COAXIAL INTERCONNECTOR IN A CIRCUIT BOARD--. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. “said second dielectric material” (line 27 of each of claims 6 and 7) lacks antecedent basis. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 6-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent 7,679,006 to Nakamura. Nakamura discloses methods of forming a cylindrical coaxial structure in an insulative semiconductor substrate core (16) having a first substantially planar first surface and a second substantially planar second surface substantially parallel to said first surface and spaced therefrom by a first predefined thickness, said method comprising the steps of: depositing a first dielectric layer (top/upper layer 15) comprising a first selected dielectric material on said first surface of said substrate core (16), said first dielectric layer (15) having a third substantially planar surface in contact with at least a selected first portion of the first surface of the substrate core and a fourth substantially planar surface having at least a selected second portion substantially parallel to, and generally aligned with, said first portion of said third surface and spaced therefrom by a second predetermined thickness (see Fig. 1); depositing a second dielectric layer (bottom/lower layer 15) comprising a second selected dielectric material on said second surface of said substrate core (16), said second dielectric layer having a fifth substantially planar surface in contact with at least a selected third portion of the second surface of the substrate core and generally aligned with the second portion of said first dielectric layer, and a sixth surface having at least a selected fourth portion substantially parallel to, and generally aligned with, said third portion of said fifth surface and spaced therefrom by a third predetermined thickness; forming a cylindrical hole (see Fig. 3) through said first dielectric layer (15), said substrate core (16) and said second dielectric layer (15), said hole having a substantially cylindrical inner surface extending: entirely through said first dielectric layer, entirely within said first and second portions of said first dielectric layer; entirely through said substrate core from said first surface of said substrate core to said second surface of said substrate core; and entirely through said second dielectric layer, entirely within said third and fourth portions of said second dielectric layer; depositing over said inner surface of said hole in said second dielectric material (of first/second and core substrate) a selected electrically conductive material (copper) to form a cylindrical reference (27) structure extending: entirely through said first dielectric layer, entirely within said first and second portions of said first dielectric layer; entirely through said substrate core from said first surface of said substrate core to said second surface of said substrate core; and entirely through said second dielectric layer entirely within said third and fourth portions of said second dielectric layer (see Fig. 4); depositing, entirely within said reference structure, a second selected dielectric material (35) to substantially fill said cylindrical reference structure; and forming a first through-via and a second through-via (38) through said second dielectric material in said reference structure, each through-via extending entirely through said reference structure from said fourth surface of said first dielectric layer to said sixth surface of said second dielectric layer; whereby both the first through-via and the second through-via (ground lines) are entirely within, but electrically isolated from, said reference structure (signal line, see Fig. 6). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-5 are rejected under 35 U.S.C. 103 as being unpatentable over Nakamura in view Uematsu et al. Regarding claims 2-5, Nakamura does not disclose the material of the dielectric layers and using conductive ink-fill techniques to form the hole and through-vias and the core substrate is conductive core. Uematsu et al teach the method of forming a cylindrical coaxial structure in core substrate having said first dielectric material and said second dielectric material are the same dielectric material (see Col 4, lines 59-60); said first dielectric material and said second dielectric material are different dielectric materials (see Col. 4, lines 61-65); and depositing over said inner surface of said hole a conductive material to form said concentric reference structure and forming of said first and second through-via are by conductive ink-fill techniques (plating) for matching/controlling the impedance of the wiring patterns (see Col. 6, lines 45-47). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the invention Nakamura by utilizing the dielectric materials and conductive ink-fill techniques as taught by Uematsu et al for matching/controlling the impedance of the wiring patterns. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Nakamura. It would have been an obvious matter of designed choice to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the invention by choosing any desired material for the substrate core such as conductive core, since it has been held that to be entitled to weight in method claims the recited structure limitations (conductive core) must affect the method in a manipulative sense, and not amount to the mere claiming of a use of a particular structure. Ex parte Pfeiffer, 1962, C.D. 408. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONGHAI D NGUYEN whose telephone number is (571)272-4566. The examiner can normally be reached M-F 9:00-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas J. Hong can be reached at 571-272-0993. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DN/ /DONGHAI D NGUYEN/February 21, 2026 Primary Examiner, Art Unit 3729
Read full office action

Prosecution Timeline

Jun 03, 2025
Application Filed
Jul 12, 2025
Non-Final Rejection — §102, §103, §112
Nov 12, 2025
Response Filed
Feb 21, 2026
Final Rejection — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+29.4%)
3y 2m
Median Time to Grant
Moderate
PTA Risk
Based on 878 resolved cases by this examiner. Grant probability derived from career allow rate.

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