DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a) because they fail to show element [262] in fig. 3A or fig. 3B as described in the specification [par. 0021-0022] and element [213] in fig. 3A or fig. 3B as described in the specification [par. 0021].
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: [261 in fig. 3B].
Corrected drawing sheets in compliance with 37 CFR 1.121 (d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as "amended." If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either "Replacement Sheet" or "New Sheet" pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will bc notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7 are rejected under 35 U.S.C. 103 as being unpatentable over Ching (US 2015/0380556) in view of Paak et al. (US 2023/0378356 and Paak hereinafter) further in view of Ishibashi et al (US 2022/0173001 and Ishibashi hereinafter).
Regarding claim 1, Ching discloses a method of operating a fuse structure [fig. 17B], comprising: providing the fuse structure comprising: first and second transistors [302/304], wherein each of the first and the second transistors have an epitaxial source/drain structure [1502]; a first source/drain contact [110, fig. 1] disposed on the epitaxial source/drain structure of the first transistor; a second source/drain contact [110 on 304] disposed on the epitaxial source/drain structure of the second transistor; an insulator [1602] disposed laterally between each of the first and the second source/drain contacts; and a source/drain contact [112] via disposed on the first source/drain contact; and applying a potential across the source/drain contact via and the epitaxial source/drain structure of the second transistor [par. 0014]. Ching does not explicitly disclose providing a program line connected to the source/drain contact via and wherein the providing the potential causes the insulator to break down.
However, Paak discloses a program line [fig. 31-32] connected to the source/drain contact via [180F, fig. 3A]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Ching as taught in Paak in order to provide a program line connected to the source/drain contact via. Ching in view of Paak does not explicitly disclose providing the potential causes the insulator to break down.
However, Ishibashi discloses SiC epitaxial wafers has an insulation breakdown [par. 0003]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the invention of Ching by incorporating a program line connected to source/drain as taught in Paak in order to utilize known use of SiC epitaxial provide insulator breakdown.
Regarding claim 2, Ching in view of Paak further in view of Ishibashi discloses wherein the applying the potential electrically shorts [connect] the epitaxial source/drain structure of the first transistor to the epitaxial source/drain structure of the second transistor [par. 0014].
Regarding claim 3, Ching in view of Paak further in view of Ishibashi discloses [fig. 3A] wherein the applying the potential uses the program line [fig. 31-32].
Regarding claim 4, Ching in view of Paak further in view of Ishibashi discloses [fig. 17B] wherein prior to applying the potential, the insulator insulates the epitaxial source/drain structure of the first transistor and the epitaxial source/drain structure of the second transistor.
Regarding claim 5, Ching in view of Paak further in view of Ishibashi discloses providing an operating voltage to a gate terminal of the first transistor and a gate terminal of the second transistor [114, par. 0050].
Regarding claim 6, Ching in view of Paak further in view of Ishibashi discloses wherein the first transistor is an n- type transistor [302, NMOS, par. 0019].
Regarding claim 7, Ching in view of Paak further in view of Ishibashi discloses wherein the second transistor is p- type transistor [304, PMOS, par. 0019].
Allowable Subject Matter
Claims 8-20 are allowed.
Conclusion
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/METASEBIA T RETEBO/ Primary Examiner, Art Unit 2836