Prosecution Insights
Last updated: April 19, 2026
Application No. 19/240,110

DATA DRIVER AND DISPLAY DEVICE INCLUDING THE SAME

Non-Final OA §DP
Filed
Jun 17, 2025
Examiner
XAVIER, ANTONIO J
Art Unit
2622
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
89%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
411 granted / 582 resolved
+8.6% vs TC avg
Strong +18% interview lift
Without
With
+18.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
12 currently pending
Career history
594
Total Applications
across all art units

Statute-Specific Performance

§101
2.9%
-37.1% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
15.4%
-24.6% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 582 resolved cases

Office Action

§DP
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1, 2, 6, 10-16 and 19 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of U.S. Patent No. 12,347,362 in view of Bae et al. (USPN 2020/0388205). Claim 1 instant application Claim 1 of USPN 12,347,362 A display device comprising: a display panel including first light emitting elements that display a first color, first pixel driving circuits that drive the first light emitting elements, second light emitting elements that display a second color, second pixel driving circuits that drive the second light emitting elements, third light emitting elements that display a third color, and third pixel driving circuits that drive the third light emitting elements; a data driver configured to output first data voltages corresponding the first color to the first pixel driving circuits, output second data voltages corresponding to the second color to the second pixel driving circuits, and output third data voltages corresponding to the third color to the third pixel driving circuits; and a timing controller configured to control the data driver, wherein the data driver includes: a first amplifier configured to output the first data voltages to a data line connected to the first pixel driving circuits arranged in a first column and output the first data voltages to a data line connected to the first pixel driving circuits arranged in a second column; and second amplifiers configured to output the first data voltages to data lines connected to the first pixel driving circuits arranged in a first set of third columns, output the second data voltages to data lines connected to the second pixel driving circuits arranged in a second set of the third columns, and output the third data voltages to data lines connected to the third pixel driving circuits arranged in a third set of the third columns, the third columns being disposed between the first column and the second column, wherein the first pixel driving circuits arranged in the first column are configured to drive the first light emitting elements arranged in the first column, and wherein the first pixel driving circuits arranged in the second column are configured to drive the first light emitting elements arranged in at least one of the third columns. A display device comprising: a display panel including pixel driving circuits and light emitting elements; a data driver configured to output data voltages to the pixel driving circuits; and a timing controller configured to control the data driver, wherein the data driver includes: a first amplifier configured to output first data voltages to a first data line connected to first pixel driving circuits arranged in a first column and output second data voltages to a second data line connected to second pixel driving circuits arranged in a second column; and second amplifiers configured to output third data voltages to third data lines connected to third pixel driving circuits arranged in third columns which are disposed between the first column and the second column, wherein the pixel driving circuits arranged in the first column are configured to drive the light emitting elements arranged in the first column, and wherein the pixel driving circuits arranged in the second column are configured to drive the light emitting elements arranged in at least one of the third columns. However, USPN 12,347,362 fails to teach a display device comprising: a display panel including first light emitting elements that display a first color, first pixel driving circuits that drive the first light emitting elements, second light emitting elements that display a second color, second pixel driving circuits that drive the second light emitting elements, third light emitting elements that display a third color, and third pixel driving circuits that drive the third light emitting elements; a data driver configured to output first data voltages corresponding the first color to the first pixel driving circuits, output second data voltages corresponding to the second color to the second pixel driving circuits, and output third data voltages corresponding to the third color to the third pixel driving circuits; and a timing controller configured to control the data driver, wherein the data driver includes: a first amplifier configured to output the first data voltages to a data line connected to the first pixel driving circuits arranged in a first column and output the first data voltages to a data line connected to the first pixel driving circuits arranged in a second column; and second amplifiers configured to output the first data voltages to data lines connected to the first pixel driving circuits arranged in a first set of third columns, output the second data voltages to data lines connected to the second pixel driving circuits arranged in a second set of the third columns, and output the third data voltages to data lines connected to the third pixel driving circuits arranged in a third set of the third columns, the third columns being disposed between the first column and the second column, wherein the first pixel driving circuits arranged in the first column are configured to drive the first light emitting elements arranged in the first column (emphasis added). Bae teaches a known technique using amplifiers with different colors and different columns (Figs. 1-3A). Specifically, Bae teaches a display device (Figs. 1-3A) comprising: a display panel including first light emitting elements that display a first color, first pixel driving circuits that drive the first light emitting elements, second light emitting elements that display a second color, second pixel driving circuits that drive the second light emitting elements, third light emitting elements that display a third color, and third pixel driving circuits that drive the third light emitting elements (Figs. 1-3A and paragraphs [0034]-[0036] teach a display including a first color G, a second color B and a third color R); a data driver configured to output first data voltages corresponding the first color to the first pixel driving circuits, output second data voltages corresponding to the second color to the second pixel driving circuits, and output third data voltages corresponding to the third color to the third pixel driving circuits (Figs. 1-3A. At least Fig. 2, item 206 teaches a source/data driver); and a timing controller configured to control the data driver (Figs. 1-3A and paragraph [0048]), wherein the data driver includes: a first amplifier configured to output the first data voltages to a data line connected to the first pixel driving circuits arranged in a first column and output the first data voltages to a data line connected to the first pixel driving circuits arranged in a second column (Fig. 3A, item 312 teaches a first amplifier outputting first data voltages for color G in a first column and second); and second amplifiers configured to output the first data voltages to data lines connected to the first pixel driving circuits arranged in a first set of third columns (Fig. 3A, item 314 teaches a second amplifier outputting first data voltages for color G), output the second data voltages to data lines connected to the second pixel driving circuits arranged in a second set of the third columns (Fig. 3A, item 313 teaches a different second amplifier outputting second data voltages for color B), and output the third data voltages to data lines connected to the third pixel driving circuits arranged in a third set of the third columns (Fig. 3A, item 321 teaches a different second amplifier outputting third data voltages for color R), the third columns being disposed between the first column and the second column (Fig. 3A teaches columns for 313, 314 and 321 are between 312 and 322). USPN 12,347,362 teaches a base process/product of a display including amplifiers and columns which the claimed invention can be seen as an improvement in that the amplifiers and columns include first through third colors identified above. Bae teaches a known technique of using amplifiers with different colors and different columns that is comparable to the base process/product. Bae’s known technique of using amplifiers with different colors and different columns would have been recognized by one skilled in the art as applicable to the base process/product of USPN 12,347,362 and the results would have been predictable and resulted in a display device comprising: a display panel including first light emitting elements that display a first color, first pixel driving circuits that drive the first light emitting elements, second light emitting elements that display a second color, second pixel driving circuits that drive the second light emitting elements, third light emitting elements that display a third color, and third pixel driving circuits that drive the third light emitting elements; a data driver configured to output first data voltages corresponding the first color to the first pixel driving circuits, output second data voltages corresponding to the second color to the second pixel driving circuits, and output third data voltages corresponding to the third color to the third pixel driving circuits; and a timing controller configured to control the data driver, wherein the data driver includes: a first amplifier configured to output the first data voltages to a data line connected to the first pixel driving circuits arranged in a first column and output the first data voltages to a data line connected to the first pixel driving circuits arranged in a second column; and second amplifiers configured to output the first data voltages to data lines connected to the first pixel driving circuits arranged in a first set of third columns, output the second data voltages to data lines connected to the second pixel driving circuits arranged in a second set of the third columns, and output the third data voltages to data lines connected to the third pixel driving circuits arranged in a third set of the third columns, the third columns being disposed between the first column and the second column, wherein the first pixel driving circuits arranged in the first column are configured to drive the first light emitting elements arranged in the first column, and wherein the first pixel driving circuits arranged in the second column are configured to drive the first light emitting elements arranged in at least one of the third columns which results in an improved process/product. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. With respect to claim 2, USPN 12,347,362 in view of Bae teach the display device of claim 1, discussed above, wherein only the second light emitting elements are arranged in each of the second set of the third columns (Bae, Fig. 3A). With respect to claim 6, USPN 12,347,362 in view of Bae teach the display device of claim 1, discussed above, wherein only the first pixel driving circuits are arranged in each of the first set of the third columns, wherein only the second pixel driving circuits are arranged in each of the second set of the third columns, and wherein only the third pixel driving circuits are arranged in each of the third set of the third columns (Bae, Fig. 3A). With respect to claim 10, USPN 12,347,362 in view of Bae teach the display device of claim 1, discussed above, wherein the first amplifier is configured to alternately output the first data voltages to the data line connected to the first pixel driving circuits arranged in the first column and the data line connected to the first pixel driving circuits arranged in the second column (Bae, Fig. 3A). With respect to claim 11, USPN 12,347,362 in view of Bae teach the display device of claim 10, discussed above, wherein the data line connected to the first pixel driving circuits arranged in the first column is connected to the data line connected to the first pixel driving circuits arranged in the second column through a connection line, and wherein the first amplifier is connected to the connection line (Bae, Fig. 3A, item 312b is a connection line for first amplifier 312). With respect to claim 12, USPN 12,347,362 in view of Bae teach the display device of claim 11, discussed above, wherein the display panel includes a display part configured to display an image and a peripheral part disposed adjacent to the display part, and wherein the connection line is disposed in the peripheral part (Bae, Fig. 3A teaches connection line 312b is located in a peripheral part outside the pixel display part). With respect to claim 13, USPN 12,347,362 in view of Bae teach the display device of claim 12, discussed above, wherein the first amplifier and the second amplifiers are disposed adjacent to a first side of the display part, and wherein the connection line is disposed adjacent to the first side of the display part (Bae, Fig. 3A. Examiner notes a reasonably broad interpretation of the term “adjacent” includes both directly adjacent and indirectly adjacent). With respect to claim 14, USPN 12,347,362 in view of Bae teach the display device of claim 12, discussed above, wherein the first amplifier and the second amplifiers are disposed adjacent to a first side of the display part, and wherein the connection line is disposed adjacent to a second side of the display part that is opposite to the first side of the display part (Bae, Fig. 3A. Examiner notes a reasonably broad interpretation of the term “adjacent” includes both directly adjacent and indirectly adjacent). With respect to claim 15, USPN 12,347,362 in view of Bae teach the display device of claim 11, discussed above, wherein the display panel includes a display part configured to display an image and a peripheral part disposed adjacent to the display part, and wherein the connection line is disposed in the display part (Bae, Fig. 3A teaches a pixel display part and a peripheral part outside the pixel display part. Examiner notes a reasonably broad interpretation of the term “adjacent” includes both directly adjacent and indirectly adjacent). Claim 16, an electronic device, corresponds to and is analyzed and rejected for substantially the same reasons as the display device of Claim 1, discussed above. Examiner notes claim 19 of USPN 12,347,362 teaches the additional limitations of a main processor. With respect to claim 19, USPN 12,347,362 in view of Bae teach the electronic device of claim 16, discussed above, wherein only the first pixel driving circuits are arranged in each of the first set of the third columns, wherein only the second pixel driving circuits are arranged in each of the second set of the third columns, and wherein only the third pixel driving circuits are arranged in each of the third set of the third columns (Bae, Fig. 3A). Allowable Subject Matter Claims 3-5, 7-9, 17, 18 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art of record teaches a display including amplifiers and colors and columns (see at least Fig. 3A of Bae et al. USPN 2020/0388205). However, the prior art of record fails to teach or suggest Applicant’s specifically claimed “display device of claim 2, wherein the first light emitting elements and the third light emitting elements are arranged in each of the first set of the third columns, and wherein the first light emitting elements and the third light emitting elements are arranged in each of the third set of the third columns” (claim 3); “display device of claim 6, wherein the first pixel driving circuits and first-column dummy driving circuits are arranged in the first column, and wherein the first pixel driving circuits and second-column dummy driving circuits are arranged in the second column” (claim 7); “electronic device of claim 16, wherein only the second light emitting elements are arranged in each of the second set of the third columns, wherein the first light emitting elements and the third light emitting elements are arranged in each of the first set of the third columns, and wherein the first light emitting elements and the third light emitting elements are arranged in each of the third set of the third columns” (claim 17); and “electronic device of claim 19, wherein the first pixel driving circuits and first-column dummy driving circuits are arranged in the first column, and wherein the first pixel driving circuits and second-column dummy driving circuits are arranged in the second column” (claim 20). Claims 4-5, 8-9 and 18 are dependent on claims 3, 7, and 17, respectively, and allowable for substantially the same reasons, discussed above. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Pertinent Art The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure: Bae et al. (USPN 2017/0336851) teaches multiple pixels in each column including same and different color combinations; and Bauer et al. (USPN 2020/0084442) teaches directly adjacent or indirectly adjacent pixels. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONIO J XAVIER whose telephone number is (571)270-7688. The examiner can normally be reached on M-F 830am-5pm PST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, PATRICK EDOUARD can be reached on 571-272-7603. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTONIO XAVIER/ Primary Examiner, Art Unit 2622
Read full office action

Prosecution Timeline

Jun 17, 2025
Application Filed
Mar 06, 2026
Non-Final Rejection — §DP (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
89%
With Interview (+18.4%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 582 resolved cases by this examiner. Grant probability derived from career allow rate.

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