CTNF 19/243,052 CTNF 99918 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement The prior art documents submitted by applicant in the Information Disclosure Statements received 06/19/2025, 06/19/2025, 07/01/2025, 12/23/2025, and 03/06/2026 have all been considered and made of record. Joint Inventors 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Drawings 06-36 AIA The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “…first input/output (I/O) structure in the first dielectric structure and under the plurality of photonic devices …” of claim 21 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 07-30-01 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 07-31-02 Claims 21-25 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA), first paragraph, as failing to comply with the enablement requirement. The claim contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. With regards to claim 21, the claim recites “A semiconductor device, comprising: … a first input/output (I/O) structure in the first dielectric structure and under the plurality of photonic devices … a second I/O structure overlying the insulator structure and laterally offset from the device region; and a deflector structure in the first dielectric structure and underlying the second I/O structure, wherein the deflector structure is adjacent to the first I/O structure and comprises a second material different from the first material…”. The specification discloses the term “(I/O) structure” as being drawn to elements such as elements 214 and 120, and the term “photonic devices” as being drawn to elements such as elements 904-912. The specification and drawings do not describe a first I/O structure that is under the plurality of photonic devices . It would appear from the instant specification and drawings that a first I/O structure such as that of claim 21 would directly conflict with all current embodiments since the position and structural interactions of said first I/O structure with other elements would conflict with positions and structural interactions of and between other elements within all existing embodiments (For example, with respect to the embodiment discussed in paragraphs 12, 61, and 67, and shown in figure 9, it is unclear how a first I/O structure could be implemented within the relevant embodiment in a functional or advantageous way). Examiner’s note: For the purposes of further examination and the application of relevant prior art, examiner has interpreted the above limitations generally and at face value within the claims. Claims 22-25 inherit the indefiniteness of claim 21 on which they depend. 07-34-01 Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. With regards to claim 9, the claim recites “…the deflector structure has a spherical shape when viewed in cross section …”. A sphere is explicitly a 3-dimensional structure and the shape of a sphere is traditionally understood to only be defined in an environment with three dimensions. A cross section is traditionally understood to be an environment with only two dimensions. A structure with a spherical shape would have a circular shape when viewed in cross section. It is unclear if the deflector structure must include some portion with a circular cross section, must include a portion that is spherically shaped, must include a portion that is cylindrically shaped, or some other structural limitation. The claim is indefinite because the is a great deal of confusion regarding the bounds associated with the shape of the deflector structure. Examiner’s note: For the purposes of further examination, examiner is generally interpreting claim 9 as requiring a shape known to be circular when viewed in at least one cross section to exist within or itself be the deflector structure. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1 and 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) in view of Lebby (US 20220187637 A1) . With regards to claim 1 , Kim discloses a semiconductor device, comprising: a dielectric structure (Kim/Fig2e/Dielectric structure 102) disposed on a first substrate (Figs2a&2f/First substrate 104); an edge coupler (Fig2f/Edge coupler 112) disposed within the dielectric structure; and a deflector structure (Fig2f/Deflector structure 111) disposed within the dielectric structure and laterally adjacent to the edge coupler, wherein the deflector structure is configured to redirect an optical signal traveling along a first direction to a second direction towards the edge couplers (Kim/Fig2f/First direction and second direction [Vertical direction and horizontal direction respectively as indicated below]) wherein the deflector structure is laterally offset from the edge coupler by a non-zero distance. PNG media_image1.png 214 357 media_image1.png Greyscale Kim is silent regarding whether or not the edge coupler comprises a plurality of optical core segments. However, the edge coupler of Kim is an optical modulator. The practice of configuring an optical modulator that it comprises a plurality of optical core segments exists in the art as exemplified by Lebby. Kim and Lebby are considered to be analogous in the field of optical coupling structures. Kim discloses a semiconductor device including an edge coupler that is an optical modulator. Lebby discloses an optical modulator comprising a plurality of optical core segments (Lebby/Fig1/Plurality of cores 26 and 28). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the edge coupler of Kim such that it comprises a plurality of optical core segments since doing so would facilitate higher data rates. With regards to claim 3, Kim and Lebby together disclose the semiconductor device of claim 1, wherein the first direction is orthogonal to the second direction (Kim/Fig2f). With regards to claim 4, Kim and Lebby together disclose the semiconductor device of claim 1, further comprising: a first input/output (I/O) structure (Fig2f/First I/O structure 120) disposed over the first substrate, wherein the first I/O structure comprises a first lens directly overlying the deflector structure, wherein the first lens has a curved upper surface (Fig2f/First lens 122). With regards to claim 5, Kim and Lebby together disclose the semiconductor device of claim 4, further comprising: an optical receiver or transmitter overlying the first I/O structure (Fig2f/Optical receiver or transmitter 130), wherein the optical receiver or transmitter comprises a plurality of optical fibers (Kim/Paragraph 54/Lines 7-11) overlying a second I/O structure (Kim/Second I/O structure [Lower portion of element 130]), wherein the optical fibers are configured to transmit the optical signal along the second direction, and wherein the optical receiver or transmitter is configured to transmit the optical signal along the first direction through the second I/O structure towards the first I/O structure (Kim/Fig2f). With regards to claim 6, Kim and Lebby together disclose the semiconductor device of claim 5, wherein the second I/O structure comprises a second lens directly over the first lens (Kim/Second lens 132), wherein a width of the first lens is different from a width of the second lens (Kim/Fig2f) . PNG media_image2.png 408 221 media_image2.png Greyscale 07-21-aia AIA Claim s 2 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) and Lebby (US 20220187637 A1) as applied to claim 1 above, in further view of Wei (US 20090214170 A1) . With regards to claim 2, Kim and Lebby together disclose the semiconductor device of claim 1, wherein sidewalls of the optical core segments continuously extend in the first direction (Kim/Fig2f; Lebby/Fig1), but are silent regarding the deflector structure comprising an angled surface relative to the first direction. However, the practice of configuring a deflector structure such that it comprises an angled surface exists in the art as exemplified by Wei. Kim, Lebby, and Wei are considered to be analogous in the field of optical coupling structures. Kim and Lebby disclose a semiconductor device with a deflector structure oriented with respect to a first direction. Wei discloses a semiconductor device with a deflector structure comprising an upper surface angled relative to a first direction (Wei/Fig14a [First direction as indicated below]). PNG media_image3.png 373 547 media_image3.png Greyscale It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the deflector structure of Kim such that it comprised an upper surface angled relative to a first direction as suggested by Wei since doing so would facilitate selection of and control over the angles at which light within the semiconductor device is deflected. With regards to claim 7, Kim and Lebby together disclose the semiconductor device of claim 1, but are silent regarding the deflector structure comprising a plurality of first deflector layers alternatingly stacked with a plurality of second deflector layers, wherein the first deflector layers comprise a first material and the second deflector layers comprise a second material different from the first material. However, the practice of configuring a deflector in the above manner exists in the art as exemplified by Wei. Kim, Lebby, and Wei are considered to be analogous in the field of optical coupling structures. Kim and Lebby disclose a semiconductor device with a deflector structure. Wei discloses a deflector structure comprising a plurality of first deflector layers alternatingly stacked with a plurality of second deflector layers, wherein the first deflector layers comprise a first material and the second deflector layers comprise a second material different from the first material (Wei/Fig14a/First deflector layers 42&46 and second deflector layers 32&52; Paragraph 25/Lines 9-10; Paragraph 36/Lines 2-4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the deflector structure of Kim and Lebby such that it comprises a plurality of first deflector layers alternatingly stacked with a plurality of second deflector layers, wherein the first deflector layers comprise a first material and the second deflector layers comprise a second material different from the first material as suggested by Wei since doing so would further facilitate control over the redirecting properties of the deflector structure. With regards to claim 8, Kim and Lebby together disclose the semiconductor device of claim 1, but are silent regarding the deflector structure comprises a curved upper surface facing the edge coupler. However, the practice of configuring a deflector structure such that a curved upper surface faces an edge coupler exists in the art as exemplified by Wei. Kim, Lebby, and Wei are considered to be analogous in the field of optical coupling structures. Kim and Lebby disclose a semiconductor device with a deflector structure and an edge coupler. Wei discloses a deflector structure comprising a curved upper surface facing the edge coupler (Wei/Fig14a/Curved upper surface of element 36). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the deflector structure of Kim and Lebby such that it comprises a curved upper surface facing the edge coupler as suggested by Wei since doing so would further facilitate control over the redirecting properties of the deflector structure . 07-21-aia AIA Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) and Lebby (US 20220187637 A1) as applied to claim 1 above, in further view of Krichevsky (US 12517312 B2) . With regards to claim 9, Kim and Lebby together disclose the semiconductor device of claim 1, but are silent regarding the deflector structure having a spherical shape when viewed in cross section. However, the practice of configuring a deflector structure such that it has a spherical shape when viewed in cross section exists in the art as exemplified by Krichevsky. Kim, Lebby, and Krichevsky are considered to be analogous in the field of optical coupling structures. Kim and Lebby disclose a semiconductor device comprising a deflector structure. Krichevsky discloses a deflector structure having a spherical shape when viewed in cross section (Krichevsky/Fig3/Deflector structure 300 having element 315 [Light pipe]; See the 35 USC 112 section of this office action). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the deflector structure of Kim and Lebby such that it has a spherical shape when viewed in cross section as suggested by Krichevsky since doing so would further facilitate control over the redirecting properties of the deflector structure . 07-21-aia AIA Claim s 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) and Karhade (US 20230092821 A1) . With regards to claim 10 , Kim discloses a semiconductor package, comprising: a lower substrate (Kim/Fig27/Lower substrate 2700); a second IC chip overlying the lower substrate; and a photonic chip overlying the lower substrate (Kim/Fig2f/Photonic chip 110), wherein the photonic chip is adjacent to the second IC chip, wherein the second IC chip and the photonic chip are electrically coupled to one another by one or more metallization layers (Kim/Fig2f/One or more metallization layers 104), wherein the photonic chip comprises an edge coupler disposed in an inner device region (Kim/Fig2f/Edge coupler 112) and a deflector structure disposed in a peripheral region adjacent to the inner device region, wherein a surface of the deflector structure faces the edge coupler (Kim/Fig2f/Deflector structure 111 and surface of deflector structure [Surface closest to element 112]). Kim is silent regarding a first integrated circuit (IC) chip being laterally adjacent to the second IC chip. However, the practice of incorporating two (IC) chips adjacent to each other within a semiconductor package exists in the art as exemplified by Karhade. Kim and Karhade are considered to be analogous in the field of semiconductor packages. Kim discloses a semiconductor package with an IC chip adjacent to a photonic chip. Karhade teaches a semiconductor package with a first IC chip laterally adjacent a second IC chip, and a photonic chip adjacent the second IC chip (Karhade/Fig1a/First and second IC chips 118 and 114). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate a first IC chip adjacent the second IC chip within the semiconductor package of Kim as suggested by Karhade since doing so would facilitate the inclusion of additional functions within the package of Kim. With regards to claim 11, Kim and Lebby together disclose the semiconductor package of claim 10, wherein the photonic chip is configured to receive an optical signal and convert the optical signal to an electrical signal, wherein the first and second IC chips are configured to receive the electrical signal from the photonic chip by way of the one or more metallization layers (Kim/Fig2f; Paragraph 58/Lines 5-7) . 07-21-aia AIA Claim s 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) and Karhade (US 20230092821 A1) as applied to claim 10 above in view of Nagarajan (US 7877016 B2) . With regards to claim 12, Kim and Karhade together disclose the semiconductor package of claim 10, but are silent regarding a plurality of first waveguides are disposed in the inner device region, wherein the first waveguides are optically coupled to the edge coupler and are laterally separated from the deflector structure by the edge coupler. However, the practice of disposing a plurality of first waveguides in an inner device region, wherein the first waveguides are optically coupled to an edge coupler and are laterally separated from a deflector structure by the edge coupler exists in the art as exemplified by Nagarajan. Kim, Karhade, and Nagarajan are considered to be analogous in the field of semiconductor packages. Kim and Karhade together disclose a semiconductor package with an edge coupler and a deflector structure. Nagarajan discloses a plurality of first waveguides in the inner device region of a semiconductor package, wherein the first waveguides are optically coupled to an edge coupler and are laterally separated from a deflector structure by the edge coupler (Nagarajan/Figs2&3/Plurality of first waveguides 12 and edge coupler 22). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a plurality of first waveguides in the inner device region of the semiconductor package of Kim and Karhade as suggested by Nagarajan since doing so would facilitate low loss optical communication to other portions of the device . With regards to claim 13, Kim, Karhade, and Nagarajan together disclose the semiconductor package of claim 12, further comprising: an optical receiver or transmitter overlying the photonic chip and configured to transmit an optical signal in a first direction (Kim/Fig2f/Transmitter 120), wherein the deflector structure is configured to deflect the optical signal from the first direction a second direction towards the edge coupler (Kim/Fig2f), wherein the edge coupler is configured to receive the optical signal deflected by the deflector structure (Kim/Fig2f). With regards to claim 14, Kim, Karhade, and Nagarajan together disclose the semiconductor package of claim 13, wherein the first waveguides are configured to receive the optical signal from the edge coupler (Nagarajan/Figs2&3) . 07-21-aia AIA Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 20230204879 A1) and Karhade (US 20230092821 A1) as applied to claim 10 above in view of Lebby (US 20220187637 A1) . With regards to claim 15, Kim and Karhade together disclose the semiconductor package of claim 10, but are silent regarding the edge coupler comprising a plurality of optical core segments having sidewalls facing the surface of the deflector structure, wherein the optical core segments are arranged in a cross-like layout when viewed in cross section. However, the edge coupler of Kim is an optical modulator with a sidewall facing the deflector structure. The practice of configuring an optical modulator such that it comprises a plurality of optical core segments wherein the optical core segments are arranged in a cross-like layout when viewed in cross section exists in the art as exemplified by Lebby. Kim, Karhade, and Lebby are considered to be analogous in the field of optical coupling structures. Kim and Karhade together disclose a semiconductor device including an edge coupler that is an optical modulator with a sidewall facing a deflector structure. Lebby discloses an optical modulator comprising a plurality of optical core segments with sidewalls facing a respective sidewall of the modulator (Lebby/Fig1/Plurality of cores 26 and 28) wherein the optical core segments are arranged in a cross-like layout when viewed in cross section (Lebby/Paragraph 44/Lines 7-9). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the edge coupler of Kim such that it comprises a plurality of optical core segments arranged in a cross-like layout when viewed in cross section since doing so would facilitate higher data rates . 07-21-aia AIA Claim s 21-25 are rejected under 35 U.S.C. 103 as being unpatentable over Menezo (US 20210333491 A1) . With regards to claim 21 , Menezo discloses a semiconductor device, comprising: a plurality of photonic devices in an insulator structure and disposed within a device region (Fig4/Photonic devices 121 and 123, Insulator structure [110 and 120], and device region [device region as indicated below]), wherein the plurality of photonic devices are laterally offset from one another (Fig4); PNG media_image4.png 458 690 media_image4.png Greyscale a first structure on the insulator structure and underlying the plurality of photonic devices (Fig1/First structure 100); a first input/output (I/O) structure in the first dielectric structure and under the plurality of photonic devices, wherein the first I/O structure comprises a first material (Fig4/First I/O structure 160; Paragraph 55/Lines 7-10 [“…silicon nitride…”]; Paragraph 64/Lines 10-13); a second I/O structure overlying the insulator structure and laterally offset from the device region (Fig4/Second I/O structure 15); and a deflector structure in the first dielectric structure and underlying the second I/O structure (Fig4/Deflector structure 122’), wherein the deflector structure is adjacent to the first I/O structure (Fig4/[Element 122’ is vertically adjacent to element 160]). Menezo is silent regarding the first structure being a dielectric and the first I/O structure comprising a second material different from the first material. However, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a dielectric material for the first structure of Menezo and a material other than silicon nitride for the deflector structure of Menezo since doing so would further electrically isolate the first I/O structure from electrical components within the device and would further simplify device fabrication, respectively. With regards to claim 22, Menezo discloses the semiconductor device of claim 21, wherein at least a portion of the deflector structure is vertically aligned with the first I/O structure and the deflector structure is offset from the first I/O structure by a first distance (Fig4/[Vertical distance between first I/O structure and deflector]). With regards to claim 23, Menezo discloses the semiconductor device of claim 22, but is silent regarding the first distance being less than a height of the deflector structure. However, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to configure the semiconductor device of Menezo such that the first distance is less than a height of the deflector structure since doing so would reduce optical losses from communication between the first I/O structure and the deflector structure. With regards to claim 24, Menezo discloses the semiconductor device of claim 21, wherein a height of the deflector structure is greater than a height of the first I/O structure (Fig4). With regards to claim 25, Menezo discloses the semiconductor device of claim 21, further comprising: a second dielectric structure overlying the insulator structure (Second dielectric structure 140); and a plurality of conductive interconnect structures in the second dielectric structure and disposed laterally within the device region (Fig4/Conductive interconnect structures 124), wherein the second I/O structure is above and laterally offset from the plurality of conductive interconnect structures (Fig4). Conclusion This prior art, made of record, but not relied upon, is considered pertinent to applicant’s disclosure since the following references have similar structure and/or use similar structure and/or similar optical elements to what is disclosed and/or claimed in the instant application: [Kim] (US 20230194778 A1) [Figs16&22] [Zarbock] (US 9570883 B2) [Fig10] [Rosinski] (US 20050201694 A1) [Fig1a] [Kim] (US 20050100264 A1) [Fig1] Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MARC E MANHEIM/Examiner, Art Unit 2874 /THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874 Application/Control Number: 19/243,052 Page 2 Art Unit: 2874 Application/Control Number: 19/243,052 Page 3 Art Unit: 2874 Application/Control Number: 19/243,052 Page 4 Art Unit: 2874 Application/Control Number: 19/243,052 Page 5 Art Unit: 2874 Application/Control Number: 19/243,052 Page 6 Art Unit: 2874 Application/Control Number: 19/243,052 Page 7 Art Unit: 2874 Application/Control Number: 19/243,052 Page 8 Art Unit: 2874 Application/Control Number: 19/243,052 Page 9 Art Unit: 2874 Application/Control Number: 19/243,052 Page 10 Art Unit: 2874 Application/Control Number: 19/243,052 Page 11 Art Unit: 2874 Application/Control Number: 19/243,052 Page 12 Art Unit: 2874 Application/Control Number: 19/243,052 Page 13 Art Unit: 2874 Application/Control Number: 19/243,052 Page 14 Art Unit: 2874 Application/Control Number: 19/243,052 Page 15 Art Unit: 2874 Application/Control Number: 19/243,052 Page 16 Art Unit: 2874 Application/Control Number: 19/243,052 Page 17 Art Unit: 2874 Application/Control Number: 19/243,052 Page 18 Art Unit: 2874 Application/Control Number: 19/243,052 Page 19 Art Unit: 2874 Application/Control Number: 19/243,052 Page 20 Art Unit: 2874
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