Prosecution Insights
Last updated: July 17, 2026
Application No. 19/244,421

POWER CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

Non-Final OA §102
Filed
Jun 20, 2025
Priority
Jun 19, 2024 — RE 10-2024-0079594 +1 more
Examiner
FLORES, ROBERTO W
Art Unit
2621
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
50%
Grant Probability
Moderate
1-2
OA Rounds
1y 11m
Est. Remaining
63%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allowance Rate
269 granted / 543 resolved
-12.5% vs TC avg
Moderate +14% lift
Without
With
+13.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
23 currently pending
Career history
585
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
92.1%
+52.1% vs TC avg
§102
1.9%
-38.1% vs TC avg
§112
1.4%
-38.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 543 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 11, 12 and 20 is/are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Seo et al. U.S. Patent Publication No. 2013/0235016 (hereinafter Seo). Consider claim 1, Seo teaches a power circuit comprising: a first power supply comprising a first power output terminal configured to provide a first power supply voltage (Figure 3, elements 110, 130-140, ELVDD), a first abnormal output terminal configured to provide a first abnormal signal based on the occurrence of an abnormality (Figure 3 and [0064], Out1), and a first reset input terminal (Figure 3, Fst); and a second power supply comprising a second power output terminal which outputs a second power supply voltage (Figure 3, 120, 130 and 150, ELVSS), a second abnormal output terminal configured to provide a second abnormal signal based on the occurrence of an abnormality (Figure 3 and [0065], Out2), and a second reset input terminal (Figure 3, Fst), wherein the first power supply is configured to stop providing the first power supply voltage and provide the first abnormal signal based on the first reset input terminal receiving the second abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120), and wherein the second power supply is configured to stop providing the second power supply voltage and provide the second abnormal signal based on the second reset input terminal receiving the first abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120). Consider claim 2, Seo teaches all the limitations of claim 1. In addition, Seo teaches wherein the first power supply further comprises a first enable input terminal configured to receive a first enable signal (Figure 3, En1), wherein the second power supply further comprises a second enable input terminal configured to receive a second enable signal (Figure 3, En2), wherein the first power supply is further configured to stop providing the first abnormal signal based on the reception of the first enable signal being stopped ([0063-0064], the first short sensing unit 140 may operate, for example, to correspond to a first operation signal En1 supplied from the controller 130), and wherein the second power supply is further configured to stop providing the second abnormal signal based on the reception of the second enable signal being stopped ([0063] and [0065], the second short sensing unit 150 may operate, for example, to correspond to a second operation signal En2 supplied from the controller 130). Consider claim 11, Seo teaches a display device comprising (Figure 1): a first power supply comprising a first power output terminal configured to provide a first power supply voltage (Figure 3, elements 110, 130-140, ELVDD), a first abnormal output terminal configured to provide a first abnormal signal based on the occurrence of an abnormality (Figure 3, Out1), and a first reset input terminal (Figure 3, Fst); a second power supply comprising a second power output terminal configured to provide a second power supply voltage (Figure 3, 120, 130 and 150, ELVSS), a second abnormal output terminal configured to provide a second abnormal signal when an abnormality occurs (Figure 3, Out2), and a second reset input terminal (Figure 3, Fst); and a display panel connected to the first power output terminal and the second power output terminal (Figure 1, ELVDD and ELVSS and 60-70 (see also figure 3)), wherein the first power supply is configured to stop providing the first power supply voltage and provide the first abnormal signal based on the first reset input terminal receiving the second abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120), and wherein the second power supply is configured to stop providing the second power supply voltage and provides the second abnormal signal based on the second reset input terminal receiving the first abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120). Consider claim 12, it includes the limitations of claim 2 and thus rejected by the same reasoning. Consider claim 20, Seo teaches an electronic device comprising: a display device configured to display an image (Figure 1 and [0045-0046]); and a power circuit configured to provide power to the display device (Figure 1, elements 60-70), and comprising: a first power supply comprising a first power output terminal configured to provide a first power supply voltage(Figure 3, elements 110, 130-140, ELVDD), a first abnormal output terminal configured to provide a first abnormal signal based on the occurrence of an abnormality (Figure 3, Out1), and a first reset input terminal (Figure 3, Fst); and a second power supply comprising a second power output terminal which outputs a second power supply voltage (Figure 3, 120, 130 and 150, ELVSS), a second abnormal output terminal configured to provide a second abnormal signal based on the occurrence of an abnormality (Figure 3, Out2), and a second reset input terminal (Figure 3, Fst), wherein the first power supply is configured to stop providing the first power supply voltage and provide the first abnormal signal based on the first reset input terminal receiving the second abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120), and wherein the second power supply is configured to stop providing the second power supply voltage and provide the second abnormal signal based on the second reset input terminal receiving the first abnormal signal ([0063], when a short circuit is sensed by the first short sensing unit 140 or the second short sensing unit 150, the controller 130 supplies a driving stop signal Fst to the first power source generating unit 110 and/or the second power source generating unit 120 to stop the driving of the first power source generating unit 110 and/or the second power source generating unit 120). Allowable Subject Matter Claims 3-10 and 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: Prior arts do not appear to disclose the limitations in claim 3 (or claim 13) in combination to other limitations of the base claim and any intervening claims. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERTO W FLORES whose telephone number is (571)272-5512. The examiner can normally be reached Monday-Friday, 7am-4pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMR A AWAD can be reached at (571)272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ROBERTO W FLORES/ Primary Examiner, Art Unit 2621
Read full office action

Prosecution Timeline

Jun 20, 2025
Application Filed
May 22, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
50%
Grant Probability
63%
With Interview (+13.6%)
3y 0m (~1y 11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 543 resolved cases by this examiner. Grant probability derived from career allowance rate.

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