DETAILED ACTION
This office action addresses Applicant’s response filed on 11 March 2026. Claims 1-20 are pending.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to abstract ideas without significantly more. The claim(s) recite(s) the abstract idea of applying known machine learning techniques to the environment of network-on-chip (NoC) optimization, similarly to the claims found ineligible in Recentive Analytics, Inc. v. Fox Corp, 134 F.4th 1205 (Fed. Cir. 2025), comprising steps of loading the NoC topology and performing known reinforcement learning (RL) to identify topology transformations by using a machine learning (ML) model to apply transformations based on a policy, computing a cost of the topology after applying the transformations, and updating the policy based on the cost. Notably, as discussed in Recentive, Applicant’s claims do not set forth any specific improved ML technique, but merely applies known ML techniques such as RL to the context of NoC optimization. All recited features are either known in the art of ML or known in the art of NoC design. Although the claims have been amended to recite “improving a machine learning model by training the machine learning model to avoid dynamic determination of one or more constraints including at least one or more of connectivity and packet routing”, these limitations are not supported by the originally-filed disclosure, as discussed below.
Claim 2 further recites applying transformations using the finally updated policy after training, which is the entire point of RL and ML generally. Claim 3 further recites that the NoC topology includes initiator and target network unit interfaces and adding switches to the NoC topology, which are basic features of NoC topology design. Claims 4 and 5 recite known constraints on NoC design of disallowing unrouting existing routes, moving NoC elements out of free space, or introducing cyclic dependencies. Claim 6 recites the typical circuit optimization metric/target of wire length. Claim 7 recites a continuous-space algorithm used to optimize discrete action space, which is a known RL technique. Claim 8 recites a graph neural network (GNN) model that applies the transformations to produce graphs generating current and next states of the NoC, which is a known ML technique (graphs representing current and next states) using a known ML model (GNNs). Claims 9 and 10 recite a search algorithm to find transformations predicted to reduce cost, returns transformations in a sub-tree and the position of the transformation, which is a known ML technique applied to the context of NoC. Claims 11-20 are analogous to claims 1-10 in different statutory classes.
This judicial exception is not integrated into a practical application because aside from the abstract idea itself, the claims merely recite generic computer implementation of the abstract idea, which does not qualify as integration into a practical application. Similarly, the claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because generic computer implementation does not qualify as ‘significantly more’.
Claims 11-18 are further rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because the claims are directed to an “electric computer aided design (ECAD) tool”, which is disclosed to be software per se at ¶112 of the Specification, and software per se does not fall within the four statutory categories. See MPEP § 2106.03(I).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1, 11, and 19 have been amended to recite, improving a machine learning model by training the machine learning model to avoid dynamic determination of one or more constraints including at least one or more of connectivity and packet routing, which is not supported by the originally-filed disclosure. The relevant corresponding disclosure is at ¶92 of the Specification as filed, which states that “Advantageously, the agent avoids having to ‘learn’ certain difficult concepts in NoC design, such as connectivity, packet routing and deadlock avoidance. The agent also avoids having to dynamically determine whether these constraints are satisfied.” However, the cited disclosure differs significantly from the new claim limitation of “training the machine learning model to avoid dynamic determination of one or more constraints”.
First, determining whether constraints are satisfied is completely different from determining the constraints themselves. Second, “avoids having to dynamically determine …” is different from “training … to avoid dynamic determination”. The former (from the disclosure) is saying that the agent does not need to perform dynamic determination, not that the agent is expressly trained to avoid such determination, as required by the claim. Read in context, ¶90-92 make clear that “avoiding having to dynamically determine whether constraints are satisfied” is simply an advantage that arises from disallowing transformations that make routed routes unrouted, moving NoC elements outside of free space, or introducing cyclic dependencies. As stated in ¶92, fully-routed and deadlock-free NoC topologies remain fully-routed and deadlock-free, due to those transformations not being allowed. Thus, the agent itself is not trained to avoid dynamically determining constraints, as recited in the claims; instead, transformations are disallowed so that a design which already satisfies constraints continues to satisfy constraints, and thus does not need to be dynamically checked for constraint satisfaction.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 4-12, and 14-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nath (US 2022/0229960) in view of Cai (CN 117880224), Arslan (US 8,196,081), Ouyang (CN 116738923), and Shaikh (US 12,400,063).
Regarding claim 1, Nath discloses a computer-implemented method (Fig. 9) comprising: loading a simplistic topology that is fully routed (¶51, Method 1); and performing reinforcement learning on the simplistic topology to identify a sequence of topology transformations that will produce a more optimal topology compared to the simplistic topology (¶35), wherein performing the reinforcement learning includes running a plurality of training sessions (¶43), wherein running each of the plurality of training sessions includes: using a machine learning model to apply a set of transformations to the topology according to a policy (¶38); computing a cost of the topology after the set of transformations has been applied (¶40); and updating the policy in response to the cost (¶43).
Nath does not appear to explicitly disclose that the topology is a network-on-chip (NoC) topology. Cai discloses the same (¶109). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Nath and Cai, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of optimizing NoCs using reinforcement learning (RL). KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Nath discloses RL for optimizing VLSI designs. Cai teaches that RL optimization of VLSI designs is applied specifically to NoCs. The teachings of Cai are directly applicable to Nath in the same way, so that Nath would similarly using RL for optimization of NoCs.
Nath does not appear to explicitly disclose improving a machine learning model by training the machine learning model to avoid dynamic determination of one or more constraints including at least one or more of connectivity and packet routing. However, as discussed above in the rejections under § 112, these limitations are merely advantages arising from disallowing transformations that make existing routes unrouted, move elements outside of free space, or introduce cyclic dependencies. Arslan discloses that the transformations are not allowed to make existing routes unrouted (Fig. 2, blocks 202, 204, 206). Ouyang discloses that the transformations are not allowed to make existing routes unrouted and are not allowed to move elements outside of free space (¶¶79-81). Shaikh discloses that the NoC is deadlock-free and the transformations are not allowed to introduce cyclic dependencies (col. 5, lines 18-23).
It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Nath, Cai, Arslan, and Ouyang, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of minimizing redesign and ensuring legal optimizations. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Nath discloses adjusting designs. Such adjustments preferably preserve existing design features to minimize redesign, and any adjustments must also be legal to ensure a physically realizable/working device, as taught by Arslan and Ouyang. The teachings of Arslan and Ouyang are directly applicable to Nath in the same way, so that Nath’s adjustments would similarly preserve existing design feature and ensure a working device.
It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Nath, Cai, Arslan, Ouyang, and Shaikh, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of maintaining correct design operation. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Nath discloses RL-based optimization of VLSI designs, which Cai teaches is applied to NoCs. Shaikh teaches that NoCs must remain deadlock-free by disallowing cyclic dependencies. The teachings of Shaikh are directly applicable to Nath and Cai in the same way, so that Nath’s optimization of an NoC would maintain deadlock-free operation.
Regarding claim 2, Nath discloses, after the training sessions have concluded and the policy has been finally updated, applying a set of transformations to the simplistic topology according to the finally updated policy (¶¶35, 43, 44). As discussed above with regard to claim 1, Nath does not appear to explicitly disclose that the topology is an NoC topology, which is disclosed by Cai (¶109). Motivation to combine remains consistent with claim 1.
Regarding claim 4, Nath does not appear to explicitly disclose that the transformations are not allowed to make existing routes unrouted and are not allowed to move NoC elements outside of free space. Cai discloses the NoC (¶109). Motivation to combine remains consistent with claim 1. Arslan discloses that the transformations are not allowed to make existing routes unrouted (Fig. 2, blocks 202, 204, 206). Ouyang discloses that the transformations are not allowed to make existing routes unrouted and are not allowed to move elements outside of free space (¶¶79-81). Motivation to combine remains consistent with claim 1.
Regarding claim 5, Nath does not appear to explicitly disclose that the simplistic topology is deadlock-free; and wherein the transformations are not allowed to introduce cyclic dependencies. Cai discloses the NoC (¶109). Motivation to combine remains consistent with claim 1. Shaikh discloses that the NoC is deadlock-free and the transformations are not allowed to introduce cyclic dependencies (col. 5, lines 18-23). Motivation to combine remains consistent with claim 1.
Regarding claim 6, Nath does not appear to explicitly disclose that the cost is based on wire length. Cai discloses these limitations (¶¶43-44); if Cai is found to be unclear regarding these limitations, Ouyang also discloses the same (¶¶74, 88). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Nath, Cai, Arslan, Shaikh, and Ouyang, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of improving design performance by minimizing wire length. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. Cai discloses RL-based adjustment of VLSI designs to optimize various metrics using a reward/cost function. Cai and Ouyang teach that a design metric to optimize is wire length. The teachings of Cai and Ouyang are directly applicable to Nath in the same way, so that Nath would similarly adjust VLSI designs to optimize wire length.
Regarding claim 7, Nath discloses that possible transformations to perform on a current state of a topology form a discrete action space; and wherein a continuous-space algorithm is used to optimize the discrete action space (Fig. 3; ¶¶33, 58). As discussed above with regard to claim 1, Nath does not appear to explicitly disclose that the topology is an NoC topology, which is disclosed by Cai (¶109). Motivation to combine remains consistent with claim 1.
Regarding claim 8, Nath discloses that the machine learning model is a graph neural network (GNN) that receives a current graph representing a current state of the NoC topology; wherein the GNN applies a transformation or set of transformations, and produces a graph representing a next state of the design; and wherein the cost of the next state is determined (Fig. 3; ¶¶35, 58-59). As discussed above with regard to claim 1, Nath does not appear to explicitly disclose that the design is an NoC, which is disclosed by Cai (¶109). Motivation to combine remains consistent with claim 1.
Regarding claim 9, Nath discloses that running each training session further includes using a search algorithm and the cost from a previous training session result to find transformations that are predicted to reduce the cost in a current training session (¶35).
Regarding claim 10, Nath discloses that a tree search algorithm is used to return a selected transformation in a sub-tree, and also a position on the NoC topology with respect to the selected transformation (¶¶35, 46-47).
Claims 11, 12, and 14-18 are directed to an electronic computer aided design (ECAD) tool comprising computer-readable memory encoded with code for designing a network-on-chip (NoC) topology, wherein the code, when executed by a computer system, causes the computer system to perform the method of claims 1, 2, 8, and 9, and are rejected under the same reasoning. Nath discloses an electronic computer aided design (ECAD) tool comprising computer-readable memory encoded with code for designing a network-on-chip (NoC) topology, wherein the code, when executed by a computer system, causes the computer system to perform the claimed methods (¶¶2, 86).
Claims 19 and 20 is directed to a computer system comprising a processing unit; and computer memory encoded with code that, when executed by the processing unit, causes the computer system to perform the method of claims 1 and 5, and is rejected under the same reasoning. Nath discloses a computer system comprising a processing unit; and computer memory encoded with code that, when executed by the processing unit, causes the computer system to perform the claimed method (Fig. 9).
Claim(s) 3 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nath in view of Cai, Arslan, Ouyang, Shaikh, and de Lescure (US 2017/0177778; hereinafter, “Lescure”).
Regarding claims 3 and 13, Nath does not appear to explicitly disclose that the simplistic NoC topology includes a plurality of initiator and target network unit interfaces; and wherein the transformations according to the finally updated policy add a plurality of switches to the simplistic NoC topology. Lescure discloses these limitations (Abstract; ¶41). It would have been obvious to persons having ordinary skill in the art before the effective filing date of the application to combine the teachings of Nath, Cai, Arslan, Ouyang, Shaikh, and Lescure, because doing so would have involved merely the routine use of a known technique to improve similar devices in the same way to achieve the predictable results of optimizing an NoC through NoC-specific adjustments. KSR Int’l Co. v. Teleflex Inc., 82 U.S.P.Q.2d 1385, 1396. As discussed above with regard to claim 1, Nath discloses RL-based optimization of designs through various adjustments, which Cai teaches is applied to NoCs. Lescure further provides explicit disclosure of standard NoC features and adjustments. The teachings of Lescure are directly applicable to Nath in the same way, so that Nath would perform RL-based optimization of NoCs through NoC-specific adjustments.
Response to Arguments
Applicant's arguments filed 11 March 2026 have been fully considered but they are not persuasive.
Applicant asserts that the “efficiency resulting from controlling future decision making, using RL for feedback, is a significant improvement in the application of ML models to NoC design optimization”. The examiner disagrees. Reinforcement learning (RL) is well-known, so applying reinforcement learning to the known environment of NoC optimization is unpatentable under the reasoning in Recentive Analytics. Applicant has not improved RL, only used known RL to perform NoC optimization.
Applicant further asserts that the prior art fails to disclose new limitations; these limitations are addressed above in the new grounds of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARIC LIN whose telephone number is (571)270-3090. The examiner can normally be reached M-F 07:30-17:00 ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 571-272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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20 March 2026
/ARIC LIN/ Examiner, Art Unit 2851
/JACK CHIANG/ Supervisory Patent Examiner, Art Unit 2851