DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 3/18/26, was filed is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(b) the invention was patented or described in a printed publication in this or a foreign country or in public use or on sale in this country, more than one year prior to the date of application for patent in the United States.
Claims 2, 3, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 18, 19 and 20 are rejected under pre-AIA 35 U.S.C. 102b as being anticipated by Posamentier (US 2006/0267717).
Regarding claim 2, Posamentier in [Figs. 1 and 3] discloses a tunable inductor[ see Fig. 3, impedance matching system 300 comprising a tunable MEM inductor node 302 which may be implemented by MEMS node 100 in Fig. 1, see 0022], comprising:
a first terminal and a second terminal [such that the impedance matching system 300 comprises the tunable MEM inductor node 302 has a first terminal node located where the resistor 304 and capacitor 306 are connected together and a second terminal node located where the resistor 310 and capacitor 308 are connected together] ;
a single, continuous inductive element having a first end coupled to the first terminal and a second end, wherein said inductive element defines a plurality of taps at intermediate positions between the first end and the second end [such that the impedance matching system 300 comprises the tunable MEMS inductor node 302 which may be implemented by the MEMS node 100 in Fig. 1, includes a single continuous inductor element 104 as shown in Fig. 1 having a first end coupled to the first terminal and a second end, wherein said inductive element 104 defines a plurality of taps at intermediate positions as shown in Fig. 1 via switching mechanism 108 between the first end and second end, see 0010 and 0012]; and
a plurality of switches [see switch element 108 including MEMS switch armatures 110-1 thru 110-4], each switch connected between one of the plurality of taps and the second terminal [see 0012-0013]; wherein a total inductance between the first terminal and the second terminal is configured to be adjusted by selectively closing one or more of the plurality of switches to create a short circuit path that bypasses a portion of the single, continuous inductive element [see 0015].
Regarding claim 3, Posamentier in [Figs. 1 and 3] discloses the tunable inductor of claim 2, wherein the single, continuous inductive element is a spiral inductor [such that the impedance matching system 300 comprises the tunable MEMS inductor node 302 which may be implemented by the MEMS node 100 in Fig. 1, includes a single continuous spiral inductor element 104 as shown in Fig. 1 and 0010].
Regarding claim 7, Posamentier in [Figs. 1 and 3] discloses the tunable inductor of claim 2, wherein a maximum inductance is achieved when all switches in the plurality of switches [see switch element 108 including MEMS switch armatures 110-1 thru 110-4 in Fig. 1] are in an open state, causing a current to flow through an entire length of the single, continuous inductive element [see, the single continuous spiral inductor element 104 as shown in Fig. 1 and 0010, and 0013-0015].
Regarding claim 8, Posamentier in [Figs. 1 and 3] discloses the tunable inductor of claim 2, wherein the single, continuous inductive element [see 104 in Fig. 1] and the plurality of switches [see switch element 108 including MEMS switch armatures 110-1 thru 110-4] are monolithically integrated on a silicon-on-insulator (SOI) substrate [see 102 and 0009].
Regarding claim 9, Posamentier in [Fig. 1 and 3] discloses a method for tuning an inductance of a device [see 0012-0015], the method comprising: providing a tunable inductor comprising a single, continuous inductive element having a plurality of taps [such that the impedance matching system 300 comprises the tunable MEMS inductor node 302 which may be implemented by the MEMS node 100 in Fig. 1, includes a single continuous inductor element 104 as shown in Fig. 1 having a first end coupled to the first terminal and a second end, wherein said inductive element 104 defines a plurality of taps at intermediate positions as shown in Fig. 1 via switching mechanism 108 between the first end and second end, see 0010 and 0012], and a plurality of switches coupled to the plurality of taps [see switch element 108 including MEMS switch armatures 110-1 thru 110-4 and 0012-0015]; and applying one or more control signals to the plurality of switches to change a state of at least one switch from an open state to a closed state [see 0014-0015], thereby bypassing a selected portion of the single, continuous inductive element [see 104 in Fig. 1] to adjust a total inductance of the device [see 0014-0015].
Regarding claim 10, Posamentier in [Fig. 1 and 3] discloses the method of claim 9, wherein the step of providing a tunable inductor comprises providing an inductor wherein the single, continuous inductive element is a spiral inductor [see inductor 104 in Fig. 1].
Regarding claim 11, Posamentier in [Fig. 1 and 3] discloses the method of claim 9, further comprising the step of: placing all switches in an open state to achieve a maximum inductance value [see switch element 108 including MEMS switch armatures 110-1 thru 110-4 and 0012-0015].
Regarding claim 13, Posamentier in [Fig. 1 and 3] discloses the method of claim 9, further comprising the steps of: fabricating the single, continuous inductive element [see 104 in Fig. 1] on a monolithic substrate [see 102]; and fabricating the plurality of switch [see switch element 108 including MEMS switch armatures 110-1 thru 110-4] on the same monolithic substrate [see 0009].
Regarding claim 14, Posamentier in [Fig. 1 and 3] discloses a method of tuning an inductance in a device, the method comprising: (a) identifying, in response to a control input, at least one selected intermediate node along a continuous inductive conductor that extends between a first terminal and a second terminal and includes inductive portions [[such that the impedance matching system 300 comprises the tunable MEM inductor node 302 has a first terminal node located where the resistor 304 and capacitor 306 are connected together and a second terminal node located where the resistor 310 and capacitor 308 are connected together. The impedance matching system 300 comprises the tunable MEMS inductor node 302 which may be implemented by the MEMS node 100 in Fig. 1, includes a single continuous inductor element 104 as shown in Fig. 1 having a first end coupled to the first terminal and a second end, wherein said inductive element 104 defines a plurality of taps at intermediate positions as shown in Fig. 1 via switching mechanism 108 between the first end and second end, see 0010 and 0012-0015]; and (b) electrically connecting only each selected intermediate node to the second terminal so as to bypass the inductive portion or portions located between the first terminal and the corresponding selected intermediate node [see 0012-0015], wherein an effective inductance between the first and second terminals is established according to which intermediate node or nodes are electrically connected to the second terminal [see 0012-0015].
Regarding claim 15, Posamentier in [Fig. 1 and 3] discloses the method of claim 14, wherein identifying comprises decoding a multi-bit control word to determine the selected intermediate node or nodes [see 0013-0015].
Regarding claim 16, Posamentier in [Fig. 1 and 3] discloses the method of claim 14, wherein the step of electrically connecting comprises actuating a switch that is electrically coupled between each selected intermediate node and the second terminal while leaving every switch coupled to a non-selected intermediate node in a non-conductive state [see 0012-0015].
Regarding claim 17, Posamentier in [Fig. 1 and 3] discloses the method of claim 14, wherein the inductive portions are proportioned with binary-weighted inductance values [see 0012-0015], and the method selects intermediate nodes to perform monotonic inductance steps [see 0012-0015].
Regarding claim 18 , Posamentier in [Fig. 1 and 3] discloses the method of claim 16, further comprising placing each actuated switch into a non-conductive state so that the previously selected intermediate node becomes electrically isolated from the second terminal [see 0012-0015], thereby forcing current to flow through all of the inductive portions and increasing the effective inductance between the first and second terminals [see 0012-0015].
Regarding claim 19 , Posamentier in [Fig. 1 and 3] discloses the method of claim 14, wherein identifying includes using a lookup table that maps desired inductance values to corresponding intermediate-node selections [see 0022-0025].
Regarding claim 20 , Posamentier in [Fig. 1 and 3] discloses the method of claim 14, wherein the continuous inductive conductor is formed as a planar spiral layout [see 104 in Fig. 1].
Claim Rejections - 35 USC § 103
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 5, 6, 12 and 21 are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Posamentier (US 2006/0267717) and in view of Bauder et al. (US 7,864,491).
Regarding claim 4 , Posamentier in [Fig. 1 and 3] discloses the tunable inductor of claim 2, except for wherein the plurality of switches comprises Field Effect Transistors (FETs).
However, Bauder et al. discloses it is well known to one of ordinary skill in the prior art that MEMS switches can be replaced with field effect transistor (FET’s). See col. 1, ll. 18-28.
Therefore, it would have been obvious to one of ordinary skill in the art to have modified the MEMS type switches as taught by Posamentier with the type of FET’s switches as taught by in order to save cost in the reduction of size and FET’s can perform adequately better in lower frequency and lower power application.
Regarding claim 5, Posamentier in [Fig. 1 and 3] discloses the tunable inductor of claim 4, except for wherein at least one of the plurality of switches comprises a stack of two or more serially connected FETs.
However, Bauder et al. discloses it is well known to one of ordinary skill in the prior art that MEMS switches can be replaced with field effect transistor (FET’s). See col. 1, ll. 18-28.
Therefore, it would have been obvious to one of ordinary skill in the art to have modified the MEMS type switches which are stacked two or more serially as taught by Posamentier with the type of FET’s switches as taught by in order to save cost in the reduction of size and FET’s can perform adequately better in lower frequency and lower power application.
Regarding claim 6 , Posamentier in [Fig. 1 and 3] discloses the tunable inductor of claim 4, except for wherein each of the plurality of FETs is configured to receive a digital control signal to control an on-state or an off-state of the FET.
However, Bauder et al. discloses it is well known to one of ordinary skill in the prior art that MEMS switches can be replaced with field effect transistor (FET’s). See col. 1, ll. 18-28.
Therefore, it would have been obvious to one of ordinary skill in the art to have modified the plurality of MEMS switches configured to receiver a digital control signal to control an on and off state of the respective MEMs switch as taught by Posamentier with the type of FET’s switches as taught by in order to save cost in the reduction of size and FET’s can perform adequately better in lower frequency and lower power application.
Regarding claim 12 , Posamentier in [Fig. 1 and 3] discloses the method of claim 9, except for wherein the step of applying one or more control signals comprises applying digital control signals to gates of Field Effect Transistors (FETs) to selectively turn the FETs on or off.
However, Bauder et al. discloses it is well known to one of ordinary skill in the prior art that MEMS switches can be replaced with field effect transistor (FET’s). See col. 1, ll. 18-28.
Therefore, it would have been obvious to one of ordinary skill in the art to have modified the plurality of MEMS switches configured to receiver a digital control signal to control an on and off state of the respective MEMs switch as taught by Posamentier with the type of FET’s switches as taught by in order to save cost in the reduction of size and FET’s can perform adequately better in lower frequency and lower power application.
Regarding claim 21 , Posamentier in [Fig. 1 and 3] discloses the method of claim 14, except for wherein step of electrically connecting is performed by applying gate voltages to field-effect transistors disposed between respective intermediate nodes and the second terminal.
However, Bauder et al. discloses it is well known to one of ordinary skill in the prior art that MEMS switches can be replaced with field effect transistor (FET’s). See col. 1, ll. 18-28.
Therefore, it would have been obvious to one of ordinary skill in the art to have modified the plurality of MEMS switches configured to receiver a digital control signal to control an on and off state of the respective MEMs switch disposed between intermediate node and the second terminal as taught by Posamentier with the type of FET’s switches as taught by in order to save cost in the reduction of size and FET’s can perform adequately better in lower frequency and lower power application.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TERRENCE RONIQUE WILLOUGHBY whose telephone number is (571)272-2725. The examiner can normally be reached M-F 9:30-5:30pm.
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/TERRENCE R WILLOUGHBY/Examiner, Art Unit 2836 7/25/26
/REXFORD N BARNIE/Supervisory Patent Examiner, Art Unit 2836